* (the second one is a monitor/tee pipe, valid only for serial input).
*
* The mmcodec is connected via the CHI bus and needs the data & some
- * parameters (volume, balance, output selection) timemultiplexed in 8 byte
+ * parameters (volume, output selection) timemultiplexed in 8 byte
* chunks. It also has a control mode, which serves for audio format setting.
*
* Looking at the CS4215 data sheet it is easy to set up 2 or 4 codecs on
struct dbri_pipe {
u32 sdp; /* SDP command word */
- enum in_or_out direction;
int nextpipe; /* Next pipe in linked list */
- int prevpipe;
int cycle; /* Offset of timeslot (bits) */
int length; /* Length of timeslot (bits) */
int first_desc; /* Index of first descriptor */
int pipe; /* Data pipe used */
int left_gain; /* mixer elements */
int right_gain;
- int balance;
};
/* This structure holds the information for both chips (DBRI & CS4215) */
struct snd_dbri {
struct snd_card *card; /* ALSA card */
- struct snd_pcm *pcm;
int regs_size, irq; /* Needed for unload */
struct sbus_dev *sdev; /* SBUS device info */
u32 dma_dvma; /* DBRI visible DMA address */
void __iomem *regs; /* dbri HW regs */
- int dbri_version; /* 'e' and up is OK */
int dbri_irqp; /* intr queue pointer */
int wait_send; /* sequence of command buffers send */
int wait_ackd; /* sequence of command buffers acknowledged */
#define DBRI_MAX_VOLUME 63 /* Output volume */
#define DBRI_MAX_GAIN 15 /* Input gain */
-#define DBRI_RIGHT_BALANCE 255
-#define DBRI_MID_BALANCE (DBRI_RIGHT_BALANCE >> 1)
/* DBRI Reg0 - Status Control Register - defines. (Page 17) */
#define D_P (1<<15) /* Program command & queue pointer valid */
dbri->pipes[pipe].sdp = sdp;
dbri->pipes[pipe].desc = -1;
dbri->pipes[pipe].first_desc = -1;
- if (sdp & D_SDP_TO_SER)
- dbri->pipes[pipe].direction = PIPEoutput;
- else
- dbri->pipes[pipe].direction = PIPEinput;
reset_pipe(dbri, pipe);
}
int left_gain = info->left_gain % 64;
int right_gain = info->right_gain % 64;
- if (info->balance < DBRI_MID_BALANCE) {
- right_gain *= info->balance;
- right_gain /= DBRI_MID_BALANCE;
- } else {
- left_gain *= DBRI_RIGHT_BALANCE - info->balance;
- left_gain /= DBRI_MID_BALANCE;
- }
-
dbri->mm.data[0] &= ~0x3f; /* Reset the volume bits */
dbri->mm.data[1] &= ~0x3f;
dbri->mm.data[0] |= (DBRI_MAX_VOLUME - left_gain);
pcm->private_data = dbri;
pcm->info_flags = 0;
strcpy(pcm->name, dbri->card->shortname);
- dbri->pcm = pcm;
if ((err = snd_pcm_lib_preallocate_pages_for_all(pcm,
SNDRV_DMA_TYPE_CONTINUOUS,
for (idx = DBRI_REC; idx < DBRI_NO_STREAMS; idx++) {
dbri->stream_info[idx].left_gain = 0;
dbri->stream_info[idx].right_gain = 0;
- dbri->stream_info[idx].balance = DBRI_MID_BALANCE;
}
return 0;
struct dbri_pipe *pptr = &dbri->pipes[pipe];
snd_iprintf(buffer,
"Pipe %d: %s SDP=0x%x desc=%d, "
- "len=%d @ %d prev: %d next %d\n",
+ "len=%d @ %d next %d\n",
pipe,
- (pptr->direction ==
- PIPEinput ? "input" : "output"), pptr->sdp,
- pptr->desc, pptr->length, pptr->cycle,
- pptr->prevpipe, pptr->nextpipe);
+ ((pptr->sdp & D_SDP_TO_SER) ? "output" : "input"),
+ pptr->sdp, pptr->desc,
+ pptr->length, pptr->cycle, pptr->nextpipe);
}
}
}
dbri->card = card;
dbri->sdev = sdev;
dbri->irq = irq->pri;
- dbri->dbri_version = sdev->prom_name[9];
dbri->dma = sbus_alloc_consistent(sdev, sizeof(struct dbri_dma),
&dbri->dma_dvma);
printk(KERN_INFO "audio%d at %p (irq %d) is DBRI(%c)+CS4215(%d)\n",
dev, dbri->regs,
- dbri->irq, dbri->dbri_version, dbri->mm.version);
+ dbri->irq, sdev->prom_name[9], dbri->mm.version);
dev++;
return 0;