RESTORE_ALL_SYS
p0 = reti;
jump (p0);
+ENDPROC(_ret_from_fork)
ENTRY(_sys_fork)
r0 = -EINVAL;
rts;
+ENDPROC(_sys_fork)
ENTRY(_sys_vfork)
r0 = sp;
SP += 12;
rets = [sp++];
rts;
+ENDPROC(_sys_vfork)
ENTRY(_sys_clone)
r0 = sp;
SP += 12;
rets = [sp++];
rts;
+ENDPROC(_sys_clone)
ENTRY(_sys_rt_sigreturn)
r0 = sp;
SP += 12;
rets = [sp++];
rts;
+ENDPROC(_sys_rt_sigreturn)
*/
.global ___divsi3;
+.type ___divsi3, STT_FUNC;
#ifdef CONFIG_ARITHMETIC_OPS_L1
.section .l1.text
.Lret_zero:
R0 = 0;
RTS;
+
+.size ___divsi3, .-___divsi3
.Llong_loop_e: NOP;
sti R3;
RTS;
-
+ENDPROC(_insl)
ENTRY(_insw)
P0 = R0; /* P0 = port */
.Lword_loop_e: NOP;
sti R3;
RTS;
+ENDPROC(_insw)
ENTRY(_insb)
P0 = R0; /* P0 = port */
.Lbyte_loop_e: NOP;
sti R3;
RTS;
+ENDPROC(_insb)
R0 += -1;
RTS;
-.size _memchr,.-_memchr
+ENDPROC(_memchr)
P3 = I1;
RTS;
-.size _memcmp,.-_memcmp
+ENDPROC(_memcmp)
B[P0--] = R1;
RTS;
+
+ENDPROC(_memcpy)
P3 = I1;
RTS;
-.size _memmove,.-_memmove
+ENDPROC(_memmove)
B[P0++] = R1;
JUMP .Laligned;
-.size _memset,.-_memset
+ENDPROC(_memset)
R0 = 0;
.LRETURN_R0:
RTS;
+
+.size ___modsi3, .-___modsi3
.Llong_loop_s: R0 = [P1++];
.Llong_loop_e: [P0] = R0;
RTS;
+ENDPROC(_outsl)
ENTRY(_outsw)
P0 = R0; /* P0 = port */
.Lword_loop_s: R0 = W[P1++];
.Lword_loop_e: W[P0] = R0;
RTS;
+ENDPROC(_outsw)
ENTRY(_outsb)
P0 = R0; /* P0 = port */
.Lbyte_loop_s: R0 = B[P1++];
.Lbyte_loop_e: B[P0] = R0;
RTS;
+ENDPROC(_outsb)
R0 = R0 + R1;
RTS;
+
+.size ___smulsi3_highpart, .-___smulsi3_highpart
R1 = R0 - R3;
IF CC R0 = R1;
RTS;
+
+ENDPROC(___udivsi3)
#endif
.extern ___udivsi3;
+.type ___udivsi3, STT_FUNC;
.globl ___umodsi3
+.type ___umodsi3, STT_FUNC;
___umodsi3:
CC=R0==0;
R0 = 0;
.LRETURN_R0:
RTS;
+
+.size ___umodsi3, .-___umodsi3
R1 = PACK(R1.l,R0.h);
R0 = R1 + R2;
RTS;
+
+.size ___umulsi3_highpart, .-___umulsi3_highpart
.Lno_dcache_b:
R7 = [SP++];
RTS;
+ENDPROC(_cache_invalidate)
/* Invalidate the Entire Instruction cache by
* disabling IMC bit
( R7:5) = [SP++];
RTS;
+ENDPROC(_invalidate_entire_icache)
+ENDPROC(_icache_invalidate)
/*
* blackfin_cache_flush_range(start, end)
IFLUSH [P0];
SSYNC;
RTS;
+ENDPROC(_blackfin_icache_flush_range)
/*
* blackfin_icache_dcache_flush_range(start, end)
FLUSH [P0];
SSYNC;
RTS;
+ENDPROC(_blackfin_icache_dcache_flush_range)
/* Throw away all D-cached data in specified region without any obligation to
* write them back. However, we must clean the D-cached entries around the
FLUSHINV[P0];
SSYNC;
RTS;
+ENDPROC(_blackfin_dcache_invalidate_range)
/* Invalidate the Entire Data cache by
* clearing DMC[1:0] bits
( R7:6) = [SP++];
RTS;
+ENDPROC(_dcache_invalidate)
+ENDPROC(_invalidate_entire_dcache)
ENTRY(_blackfin_dcache_flush_range)
R2 = -L1_CACHE_BYTES;
FLUSH[P0];
SSYNC;
RTS;
+ENDPROC(_blackfin_dcache_flush_range)
ENTRY(_blackfin_dflush_page)
P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT);
.Lfl1: FLUSH [P0++];
SSYNC;
RTS;
+ENDPROC(_blackfin_dflush_page)
SSYNC;
STI R2;
RTS;
+
+ENDPROC(_bfin_icache_init)
#endif
#if defined(CONFIG_BLKFIN_DCACHE)
SSYNC;
STI R2;
RTS;
+
+ENDPROC(_bfin_dcache_init)
#endif
.align 2
-.global __cplb_hdr;
-.type __cplb_hdr, STT_FUNC;
ENTRY(__cplb_hdr)
R2 = SEQSTAT;
call _panic_cplb_error;
SP += 12;
JUMP _handle_bad_cplb;
+
+ENDPROC(__cplb_hdr)
( R7:4,P5:3 ) = [SP++];
R0 = CPLB_RELOADED;
RTS;
+ENDPROC(_cplb_mgr)
.data
.align 4;
if !cc jump _return_from_exception;
/* fall through */
#endif
+ENDPROC(_ex_dcplb)
ENTRY(_ex_icplb)
(R7:6,P5:4) = [sp++];
RESTORE_ALL_SYS
SP = RETN;
rtx;
+ENDPROC(_ex_icplb)
ENTRY(_ex_spinlock)
/* Transform this into a syscall - twiddle the syscall vector. */
[p5] = r7;
csync;
/* Fall through. */
+ENDPROC(_ex_spinlock)
ENTRY(_ex_syscall)
DEBUG_START_HWTRACE
raise 15; /* invoked by TRAP #0, for sys call */
sp = retn;
rtx
+ENDPROC(_ex_syscall)
ENTRY(_spinlock_bh)
SAVE_ALL_SYS
[SP + PT_R0] = R0;
RESTORE_ALL_SYS
rti;
+ENDPROC(_spinlock_bh)
ENTRY(_ex_soft_bp)
r7 = retx;
r7 += -2;
retx = r7;
jump.s _ex_trap_c;
+ENDPROC(_ex_soft_bp)
ENTRY(_ex_single_step)
r7 = retx;
ASTAT = [sp++];
sp = retn;
rtx;
+ENDPROC(_ex_soft_bp)
ENTRY(_handle_bad_cplb)
/* To get here, we just tried and failed to change a CPLB
SP = RETN;
raise 5;
rtx;
+ENDPROC(_ex_trap_c)
ENTRY(_exception_to_level5)
SAVE_ALL_SYS
call _ret_from_exception;
RESTORE_ALL_SYS
rti;
+ENDPROC(_exception_to_level5)
ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
/* Since the kernel stack can be anywhere, it's not guaranteed to be
r7 = -ENOSYS; /* signextending enough */
[sp + PT_R0] = r7; /* return value from system call */
jump .Lsyscall_really_exit;
+ENDPROC(_trap)
ENTRY(_kernel_execve)
link SIZEOF_PTREGS;
1:
unlink;
rts;
+ENDPROC(_kernel_execve)
ENTRY(_system_call)
/* Store IPEND */
r5 = [sp + PT_RESERVED];
rets = r5;
rts;
+ENDPROC(_system_call)
_sys_trace:
call _syscall_trace;
call _syscall_trace;
jump .Lresume_userspace;
+ENDPROC(_sys_trace)
ENTRY(_resume)
/*
* in "new" task.
*/
rts;
+ENDPROC(_resume)
ENTRY(_ret_from_exception)
p2.l = lo(IPEND);
syscfg = r0;
5:
rts;
+ENDPROC(_ret_from_exception)
ENTRY(_return_from_int)
/* If someone else already raised IRQ 15, do nothing. */
rti;
2:
rts;
+ENDPROC(_return_from_int)
ENTRY(_lower_to_irq14)
#if defined(ANOMALY_05000281)
1:
RESTORE_CONTEXT
rti;
+ENDPROC(_lower_to_irq14)
/* Make sure when we start, that the circular buffer is initialized properly
* R0 and P0 are call clobbered, so we can use them here.
p0.l = _out_ptr_excause;
[p0] = r0;
rts;
+ENDPROC(_init_exception_buff)
/*
* Put these in the kernel data section - that should always be covered by
SP += 12;
/* - GDB stub fills this in by itself (if defined) */
rte;
+ENDPROC(_evt_emulation)
#endif
/* Common interrupt entry code. First we do CLI, then push
#endif
call _system_call;
jump .Lcommon_restore_context;
+ENDPROC(_evt_system_call)
( R7:0,P5:0 ) = [SP++];
RTS;
+ENDPROC(_cache_grab_lock)
/* After the execution of critical code, the code is now locked into
* the cache way. Now we need to set ILOC.
( R7:0,P5:0 ) = [SP++];
RTS;
+ENDPROC(_cache_lock)
#endif /* BLKFIN_CACHE_LOCK */
*/
ENTRY(_read_iloc)
-
P1.H = (IMEM_CONTROL >> 16);
P1.L = (IMEM_CONTROL & 0xFFFF);
R1 = 0xF;
R0 = R0 & R1;
RTS;
+ENDPROC(_read_iloc)