};
soc5200@f0000000 {
- model = "fsl,mpc5200b";
- compatible = "fsl,mpc5200b";
- revision = ""; // from bootloader
- device_type = "soc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200b-cdm","mpc5200-cdm";
+ compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>;
};
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
- compatible = "mpc5200b-pic","mpc5200-pic";
+ compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <600 10>;
interrupts = <1 9 0>;
fsl,has-wdt;
};
- gpt@610 { // General Purpose Timer
+ timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@620 { // General Purpose Timer
+ timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@630 { // General Purpose Timer
+ timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@640 { // General Purpose Timer
+ timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@650 { // General Purpose Timer
+ timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <650 10>;
interrupts = <1 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@660 { // General Purpose Timer
+ timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <660 10>;
interrupts = <1 f 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@670 { // General Purpose Timer
+ timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <670 10>;
interrupts = <1 10 0>;
};
rtc@800 { // Real time clock
- compatible = "mpc5200b-rtc","mpc5200-rtc";
+ compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
gpio@b00 {
- compatible = "mpc5200b-gpio","mpc5200-gpio";
+ compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpio-wkup@c00 {
- compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup";
+ gpio@c00 {
+ compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>;
};
spi@f00 {
- compatible = "mpc5200b-spi","mpc5200-spi";
+ compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- device_type = "usb-ohci-be";
- compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
- compatible = "mpc5200b-bestcomm","mpc5200-bestcomm";
+ compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
};
xlb@1f00 {
- compatible = "mpc5200b-xlb","mpc5200-xlb";
+ compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
reg = <2000 100>;
interrupts = <2 1 0>;
serial@2200 { // PSC2
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <1>; // Logical port assignment
reg = <2200 100>;
interrupts = <2 2 0>;
serial@2400 { // PSC3
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <2>; // Logical port assignment
reg = <2400 100>;
interrupts = <2 3 0>;
serial@2c00 { // PSC6
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <5>; // Logical port assignment
reg = <2c00 100>;
interrupts = <2 4 0>;
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200b-fec","mpc5200-fec";
+ compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 800>;
- local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
};
i2c@3d40 {
- compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <&mpc5200_pic>;
};
sram@8000 {
- compatible = "mpc5200b-sram","mpc5200-sram";
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <8000 4000>;
};
};
* option) any later version.
*/
-/*
- * WARNING: Do not depend on this tree layout remaining static just yet.
- * The MPC5200 device tree conventions are still in flux
- * Keep an eye on the linuxppc-dev mailing list for more details
- */
-
/ {
model = "fsl,lite5200";
- // revision = "1.0";
compatible = "fsl,lite5200";
#address-cells = <1>;
#size-cells = <1>;
};
soc5200@f0000000 {
- model = "fsl,mpc5200";
- compatible = "mpc5200";
- revision = ""; // from bootloader
- device_type = "soc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc5200-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200-cdm";
+ compatible = "fsl,mpc5200-cdm";
reg = <200 38>;
};
- mpc5200_pic: pic@500 {
+ mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
- compatible = "mpc5200-pic";
+ compatible = "fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <0>;
reg = <600 10>;
fsl,has-wdt;
};
- gpt@610 { // General Purpose Timer
+ timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <1>;
reg = <610 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@620 { // General Purpose Timer
+ timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <2>;
reg = <620 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@630 { // General Purpose Timer
+ timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <3>;
reg = <630 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@640 { // General Purpose Timer
+ timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <4>;
reg = <640 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@650 { // General Purpose Timer
+ timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <5>;
reg = <650 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@660 { // General Purpose Timer
+ timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <6>;
reg = <660 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@670 { // General Purpose Timer
+ timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
cell-index = <7>;
reg = <670 10>;
};
rtc@800 { // Real time clock
- compatible = "mpc5200-rtc";
+ compatible = "fsl,mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
- mscan@900 {
- device_type = "mscan";
- compatible = "mpc5200-mscan";
+ can@900 {
+ compatible = "fsl,mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <&mpc5200_pic>;
reg = <900 80>;
};
- mscan@980 {
- device_type = "mscan";
- compatible = "mpc5200-mscan";
+ can@980 {
+ compatible = "fsl,mpc5200-mscan";
cell-index = <1>;
interrupts = <2 12 0>;
interrupt-parent = <&mpc5200_pic>;
};
gpio@b00 {
- compatible = "mpc5200-gpio";
+ compatible = "fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpio-wkup@c00 {
- compatible = "mpc5200-gpio-wkup";
+ gpio@c00 {
+ compatible = "fsl,mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>;
};
spi@f00 {
- device_type = "spi";
- compatible = "mpc5200-spi";
+ compatible = "fsl,mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- device_type = "usb-ohci-be";
- compatible = "mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
- bestcomm@1200 {
+ dma-controller@1200 {
device_type = "dma-controller";
- compatible = "mpc5200-bestcomm";
+ compatible = "fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
};
xlb@1f00 {
- compatible = "mpc5200-xlb";
+ compatible = "fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <2000 100>;
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
- // device_type = "sound";
- // compatible = "mpc5200-psc-ac97";
+ // compatible = "fsl,mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
// PSC3 in CODEC mode example
//i2s@2400 { // PSC3
- // device_type = "sound";
- // compatible = "mpc5200-psc-i2s";
+ // compatible = "fsl,mpc5200-psc-i2s";
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
// PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
- // compatible = "mpc5200-psc-uart";
+ // compatible = "fsl,mpc5200-psc-uart";
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
// PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
- // compatible = "mpc5200-psc-uart";
+ // compatible = "fsl,mpc5200-psc-uart";
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
// PSC6 in spi mode example
//spi@2c00 { // PSC6
- // device_type = "spi";
- // compatible = "mpc5200-psc-spi";
+ // compatible = "fsl,mpc5200-psc-spi";
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200-fec";
+ compatible = "fsl,mpc5200-fec";
reg = <3000 800>;
- mac-address = [ 02 03 04 05 06 07 ]; // Bad!
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
};
ata@3a00 {
device_type = "ata";
- compatible = "mpc5200-ata";
+ compatible = "fsl,mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>;
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200-i2c","fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200-i2c","fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
fsl5200-clocking;
};
sram@8000 {
- device_type = "sram";
- compatible = "mpc5200-sram","sram";
+ compatible = "fsl,mpc5200-sram","sram";
reg = <8000 4000>;
};
};
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
- compatible = "mpc5200-pci";
+ compatible = "fsl,mpc5200-pci";
reg = <f0000d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
/ {
model = "fsl,lite5200b";
- // revision = "1.0";
compatible = "fsl,lite5200b";
#address-cells = <1>;
#size-cells = <1>;
};
soc5200@f0000000 {
- model = "fsl,mpc5200b";
- compatible = "mpc5200";
- revision = ""; // from bootloader
- device_type = "soc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200b-cdm","mpc5200-cdm";
+ compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>;
};
- mpc5200_pic: pic@500 {
+ mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
- compatible = "mpc5200b-pic","mpc5200-pic";
+ compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <0>;
reg = <600 10>;
fsl,has-wdt;
};
- gpt@610 { // General Purpose Timer
+ timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <1>;
reg = <610 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@620 { // General Purpose Timer
+ timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <2>;
reg = <620 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@630 { // General Purpose Timer
+ timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <3>;
reg = <630 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@640 { // General Purpose Timer
+ timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <4>;
reg = <640 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@650 { // General Purpose Timer
+ timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <5>;
reg = <650 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@660 { // General Purpose Timer
+ timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <6>;
reg = <660 10>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@670 { // General Purpose Timer
+ timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <7>;
reg = <670 10>;
};
rtc@800 { // Real time clock
- compatible = "mpc5200b-rtc","mpc5200-rtc";
+ compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
- mscan@900 {
- device_type = "mscan";
- compatible = "mpc5200b-mscan","mpc5200-mscan";
+ can@900 {
+ compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <&mpc5200_pic>;
reg = <900 80>;
};
- mscan@980 {
- device_type = "mscan";
- compatible = "mpc5200b-mscan","mpc5200-mscan";
+ can@980 {
+ compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
cell-index = <1>;
interrupts = <2 12 0>;
interrupt-parent = <&mpc5200_pic>;
};
gpio@b00 {
- compatible = "mpc5200b-gpio","mpc5200-gpio";
+ compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpio-wkup@c00 {
- compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup";
+ gpio@c00 {
+ compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>;
};
spi@f00 {
- device_type = "spi";
- compatible = "mpc5200b-spi","mpc5200-spi";
+ compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- device_type = "usb-ohci-be";
- compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
- bestcomm@1200 {
+ dma-controller@1200 {
device_type = "dma-controller";
- compatible = "mpc5200b-bestcomm","mpc5200-bestcomm";
+ compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
};
xlb@1f00 {
- compatible = "mpc5200b-xlb","mpc5200-xlb";
+ compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <2000 100>;
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
- // device_type = "sound";
- // compatible = "mpc5200b-psc-ac97","mpc5200-psc-ac97";
+ // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
// PSC3 in CODEC mode example
//i2s@2400 { // PSC3
- // device_type = "sound";
- // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
+ // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
// PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
- // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
// PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
- // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
// PSC6 in spi mode example
//spi@2c00 { // PSC6
- // device_type = "spi";
- // compatible = "mpc5200b-psc-spi","mpc5200-psc-spi";
+ // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200b-fec","mpc5200-fec";
+ compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 400>;
- mac-address = [ 02 03 04 05 06 07 ]; // Bad!
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
phy-handle = <&phy0>;
mdio@3000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "mpc5200b-fec-phy";
+ compatible = "fsl,mpc5200b-mdio";
reg = <3000 400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
interrupt-parent = <&mpc5200_pic>;
ata@3a00 {
device_type = "ata";
- compatible = "mpc5200b-ata","mpc5200-ata";
+ compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>;
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
i2c@3d40 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
fsl5200-clocking;
};
sram@8000 {
- device_type = "sram";
- compatible = "mpc5200b-sram","mpc5200-sram","sram";
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
reg = <8000 4000>;
};
};
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
- compatible = "mpc5200b-pci","mpc5200-pci";
+ compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <f0000d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
* option) any later version.
*/
-/*
- * WARNING: Do not depend on this tree layout remaining static just yet.
- * The MPC5200 device tree conventions are still in flux
- * Keep an eye on the linuxppc-dev mailing list for more details
- */
-
/ {
model = "promess,motionpro";
compatible = "promess,motionpro";
};
soc5200@f0000000 {
- model = "fsl,mpc5200b";
- compatible = "fsl,mpc5200b";
- revision = ""; // from bootloader
- device_type = "soc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200b-cdm","mpc5200-cdm";
+ compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>;
};
- mpc5200_pic: pic@500 {
+ mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
- compatible = "mpc5200b-pic","mpc5200-pic";
+ compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <600 10>;
interrupts = <1 9 0>;
fsl,has-wdt;
};
- gpt@610 { // General Purpose Timer
+ timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@620 { // General Purpose Timer
+ timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@630 { // General Purpose Timer
+ timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@640 { // General Purpose Timer
+ timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpt@650 { // General Purpose Timer
+ timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <650 10>;
interrupts = <1 e 0>;
};
rtc@800 { // Real time clock
- compatible = "mpc5200b-rtc","mpc5200-rtc";
+ compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
mscan@980 {
- compatible = "mpc5200b-mscan","mpc5200-mscan";
+ compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
interrupts = <2 12 0>;
interrupt-parent = <&mpc5200_pic>;
reg = <980 80>;
};
gpio@b00 {
- compatible = "mpc5200b-gpio","mpc5200-gpio";
+ compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
- gpio-wkup@c00 {
- compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup";
+ gpio@c00 {
+ compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>;
spi@f00 {
- compatible = "mpc5200b-spi","mpc5200-spi";
+ compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
- compatible = "mpc5200b-bestcomm","mpc5200-bestcomm";
+ compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
};
xlb@1f00 {
- compatible = "mpc5200b-xlb","mpc5200-xlb";
+ compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
reg = <2000 100>;
interrupts = <2 1 0>;
// PSC2 in spi master mode
spi@2200 { // PSC2
- compatible = "mpc5200b-psc-spi","mpc5200-psc-spi";
+ compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
cell-index = <1>;
reg = <2200 100>;
interrupts = <2 2 0>;
// PSC5 in uart mode
serial@2800 { // PSC5
device_type = "serial";
- compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <4>; // Logical port assignment
reg = <2800 100>;
interrupts = <2 c 0>;
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200b-fec","mpc5200-fec";
+ compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 800>;
- local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
};
ata@3a00 {
- compatible = "mpc5200b-ata","mpc5200-ata";
+ compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
i2c@3d40 {
- compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <&mpc5200_pic>;
};
sram@8000 {
- compatible = "mpc5200b-sram","mpc5200-sram";
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <8000 4000>;
};
};
lpb {
- model = "fsl,lpb";
compatible = "fsl,lpb";
#address-cells = <2>;
#size-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
- compatible = "mpc5200b-pci","mpc5200-pci";
+ compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
reg = <f0000d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
* option) any later version.
*/
-/*
- * WARNING: Do not depend on this tree layout remaining static just yet.
- * The MPC5200 device tree conventions are still in flux
- * Keep an eye on the linuxppc-dev mailing list for more details
- */
-
/ {
model = "tqc,tqm5200";
compatible = "tqc,tqm5200";
};
soc5200@f0000000 {
- model = "fsl,mpc5200";
- compatible = "fsl,mpc5200";
- revision = ""; // from bootloader
- device_type = "soc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc5200-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200-cdm";
+ compatible = "fsl,mpc5200-cdm";
reg = <200 38>;
};
- mpc5200_pic: pic@500 {
+ mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
- compatible = "mpc5200-pic";
+ compatible = "fsl,mpc5200-pic";
reg = <500 80>;
};
- gpt@600 { // General Purpose Timer
+ timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200-gpt";
reg = <600 10>;
interrupts = <1 9 0>;
};
gpio@b00 {
- compatible = "mpc5200-gpio";
+ compatible = "fsl,mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
usb@1000 {
- compatible = "mpc5200-ohci","ohci-be";
+ compatible = "fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};
dma-controller@1200 {
- compatible = "mpc5200-bestcomm";
+ compatible = "fsl,mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
};
xlb@1f00 {
- compatible = "mpc5200-xlb";
+ compatible = "fsl,mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
reg = <2000 100>;
interrupts = <2 1 0>;
serial@2200 { // PSC2
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <1>; // Logical port assignment
reg = <2200 100>;
interrupts = <2 2 0>;
serial@2400 { // PSC3
device_type = "serial";
- compatible = "mpc5200-psc-uart";
+ compatible = "fsl,mpc5200-psc-uart";
port-number = <2>; // Logical port assignment
reg = <2400 100>;
interrupts = <2 3 0>;
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200-fec";
+ compatible = "fsl,mpc5200-fec";
reg = <3000 800>;
- local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
};
ata@3a00 {
- compatible = "mpc5200-ata";
+ compatible = "fsl,mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <&mpc5200_pic>;
};
i2c@3d40 {
- compatible = "mpc5200-i2c","fsl-i2c";
+ compatible = "fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <&mpc5200_pic>;
};
sram@8000 {
- compatible = "mpc5200-sram";
+ compatible = "fsl,mpc5200-sram";
reg = <8000 4000>;
};
};
dt_is_compatible(devp, "fsl,cpm2-scc-uart") ||
dt_is_compatible(devp, "fsl,cpm2-smc-uart"))
rc = cpm_console_init(devp, &serial_cd);
- else if (dt_is_compatible(devp, "mpc5200-psc-uart"))
+ else if (dt_is_compatible(devp, "fsl,mpc5200-psc-uart"))
rc = mpc5200_psc_console_init(devp, &serial_cd);
else if (dt_is_compatible(devp, "xlnx,opb-uartlite-1.00.b") ||
dt_is_compatible(devp, "xlnx,xps-uartlite-1.00.a"))
#endif
#ifdef CONFIG_PPC_EFIKA
-/* The current fw of the Efika has a device tree needs quite a few
- * fixups to be compliant with the mpc52xx bindings. It's currently
- * unknown if it will ever be compliant (come on bPlan ...) so we do fixups.
- * NOTE that we (barely) tolerate it because the EFIKA was out before
- * the bindings were finished, for any new boards -> RTFM ! */
-
-struct subst_entry {
- char *path;
- char *property;
- void *value;
- int value_len;
-};
-
-static void __init fixup_device_tree_efika(void)
+/*
+ * The MPC5200 FEC driver requires an phy-handle property to tell it how
+ * to talk to the phy. If the phy-handle property is missing, then this
+ * function is called to add the appropriate nodes and link it to the
+ * ethernet node.
+ */
+static void __init fixup_device_tree_efika_add_phy(void)
{
- /* Substitution table */
- #define prop_cstr(x) x, sizeof(x)
- int prop_sound_irq[3] = { 2, 2, 0 };
- int prop_bcomm_irq[3*16] = { 3,0,0, 3,1,0, 3,2,0, 3,3,0,
- 3,4,0, 3,5,0, 3,6,0, 3,7,0,
- 3,8,0, 3,9,0, 3,10,0, 3,11,0,
- 3,12,0, 3,13,0, 3,14,0, 3,15,0 };
- struct subst_entry efika_subst_table[] = {
- { "/", "device_type", prop_cstr("efika") },
- { "/builtin", "device_type", prop_cstr("soc") },
- { "/builtin/ata", "compatible", prop_cstr("mpc5200b-ata\0mpc5200-ata"), },
- { "/builtin/bestcomm", "compatible", prop_cstr("mpc5200b-bestcomm\0mpc5200-bestcomm") },
- { "/builtin/bestcomm", "interrupts", prop_bcomm_irq, sizeof(prop_bcomm_irq) },
- { "/builtin/ethernet", "compatible", prop_cstr("mpc5200b-fec\0mpc5200-fec") },
- { "/builtin/pic", "compatible", prop_cstr("mpc5200b-pic\0mpc5200-pic") },
- { "/builtin/serial", "compatible", prop_cstr("mpc5200b-psc-uart\0mpc5200-psc-uart") },
- { "/builtin/sound", "compatible", prop_cstr("mpc5200b-psc-ac97\0mpc5200-psc-ac97") },
- { "/builtin/sound", "interrupts", prop_sound_irq, sizeof(prop_sound_irq) },
- { "/builtin/sram", "compatible", prop_cstr("mpc5200b-sram\0mpc5200-sram") },
- { "/builtin/sram", "device_type", prop_cstr("sram") },
- {}
- };
- #undef prop_cstr
-
- /* Vars */
u32 node;
char prop[64];
- int rv, i;
+ int rv;
- /* Check if we're really running on a EFIKA */
- node = call_prom("finddevice", 1, 1, ADDR("/"));
+ /* Check if /builtin/ethernet exists - bail if it doesn't */
+ node = call_prom("finddevice", 1, 1, ADDR("/builtin/ethernet"));
if (!PHANDLE_VALID(node))
return;
- rv = prom_getprop(node, "model", prop, sizeof(prop));
- if (rv == PROM_ERROR)
- return;
- if (strcmp(prop, "EFIKA5K2"))
+ /* Check if the phy-handle property exists - bail if it does */
+ rv = prom_getprop(node, "phy-handle", prop, sizeof(prop));
+ if (!rv)
return;
- prom_printf("Applying EFIKA device tree fixups\n");
-
- /* Process substitution table */
- for (i=0; efika_subst_table[i].path; i++) {
- struct subst_entry *se = &efika_subst_table[i];
-
- node = call_prom("finddevice", 1, 1, ADDR(se->path));
- if (!PHANDLE_VALID(node)) {
- prom_printf("fixup_device_tree_efika: ",
- "skipped entry %x - not found\n", i);
- continue;
- }
-
- rv = prom_setprop(node, se->path, se->property,
- se->value, se->value_len );
- if (rv == PROM_ERROR)
- prom_printf("fixup_device_tree_efika: ",
- "skipped entry %x - setprop error\n", i);
- }
+ /*
+ * At this point the ethernet device doesn't have a phy described.
+ * Now we need to add the missing phy node and linkage
+ */
- /* Make sure ethernet mdio bus node exists */
+ /* Check for an MDIO bus node - if missing then create one */
node = call_prom("finddevice", 1, 1, ADDR("/builtin/mdio"));
if (!PHANDLE_VALID(node)) {
prom_printf("Adding Ethernet MDIO node\n");
" new-device"
" 1 encode-int s\" #address-cells\" property"
" 0 encode-int s\" #size-cells\" property"
- " s\" mdio\" 2dup device-name device-type"
- " s\" mpc5200b-fec-phy\" encode-string"
+ " s\" mdio\" device-name"
+ " s\" fsl,mpc5200b-mdio\" encode-string"
" s\" compatible\" property"
" 0xf0003000 0x400 reg"
" 0x2 encode-int"
" finish-device");
};
- /* Make sure ethernet phy device node exist */
- node = call_prom("finddevice", 1, 1, ADDR("/builtin/mdio/ethernet-phy"));
+ /* Check for a PHY device node - if missing then create one and
+ * give it's phandle to the ethernet node */
+ node = call_prom("finddevice", 1, 1,
+ ADDR("/builtin/mdio/ethernet-phy"));
if (!PHANDLE_VALID(node)) {
prom_printf("Adding Ethernet PHY node\n");
call_prom("interpret", 1, 1,
" s\" phy-handle\" property"
" device-end");
}
+}
+
+static void __init fixup_device_tree_efika(void)
+{
+ int sound_irq[3] = { 2, 2, 0 };
+ int bcomm_irq[3*16] = { 3,0,0, 3,1,0, 3,2,0, 3,3,0,
+ 3,4,0, 3,5,0, 3,6,0, 3,7,0,
+ 3,8,0, 3,9,0, 3,10,0, 3,11,0,
+ 3,12,0, 3,13,0, 3,14,0, 3,15,0 };
+ u32 node;
+ char prop[64];
+ int rv, len;
+
+ /* Check if we're really running on a EFIKA */
+ node = call_prom("finddevice", 1, 1, ADDR("/"));
+ if (!PHANDLE_VALID(node))
+ return;
+
+ rv = prom_getprop(node, "model", prop, sizeof(prop));
+ if (rv == PROM_ERROR)
+ return;
+ if (strcmp(prop, "EFIKA5K2"))
+ return;
+
+ prom_printf("Applying EFIKA device tree fixups\n");
+
+ /* Claiming to be 'chrp' is death */
+ node = call_prom("finddevice", 1, 1, ADDR("/"));
+ rv = prom_getprop(node, "device_type", prop, sizeof(prop));
+ if (rv != PROM_ERROR && (strcmp(prop, "chrp") == 0))
+ prom_setprop(node, "/", "device_type", "efika", sizeof("efika"));
+
+ /* Fixup bestcomm interrupts property */
+ node = call_prom("finddevice", 1, 1, ADDR("/builtin/bestcomm"));
+ if (PHANDLE_VALID(node)) {
+ len = prom_getproplen(node, "interrupts");
+ if (len == 12) {
+ prom_printf("Fixing bestcomm interrupts property\n");
+ prom_setprop(node, "/builtin/bestcom", "interrupts",
+ bcomm_irq, sizeof(bcomm_irq));
+ }
+ }
+
+ /* Fixup sound interrupts property */
+ node = call_prom("finddevice", 1, 1, ADDR("/builtin/sound"));
+ if (PHANDLE_VALID(node)) {
+ rv = prom_getprop(node, "interrupts", prop, sizeof(prop));
+ if (rv == PROM_ERROR) {
+ prom_printf("Adding sound interrupts property\n");
+ prom_setprop(node, "/builtin/sound", "interrupts",
+ sound_irq, sizeof(sound_irq));
+ }
+ }
+ /* Make sure ethernet phy-handle property exists */
+ fixup_device_tree_efika_add_phy();
}
#else
#define fixup_device_tree_efika()
config PPC_MPC52xx
- bool
+ bool "52xx-based boards"
+ depends on PPC_MULTIPLATFORM && PPC32
select FSL_SOC
select PPC_CLOCK
- default n
-
-config PPC_MPC5200
- bool
- select PPC_MPC52xx
- default n
-
-config PPC_MPC5200_BUGFIX
- bool "MPC5200 (L25R) bugfix support"
- depends on PPC_MPC5200
- default n
- help
- Enable workarounds for original MPC5200 errata. This is not required
- for MPC5200B based boards.
-
- It is safe to say 'Y' here
config PPC_MPC5200_SIMPLE
bool "Generic support for simple MPC5200 based boards"
- depends on PPC_MULTIPLATFORM && PPC32
- select PPC_MPC5200
+ depends on PPC_MPC52xx
select DEFAULT_UIMAGE
select WANT_DEVICE_TREE
- default n
help
This option enables support for a simple MPC52xx based boards which
do not need a custom platform specific setup. Such boards are
config PPC_EFIKA
bool "bPlan Efika 5k2. MPC5200B based computer"
- depends on PPC_MULTIPLATFORM && PPC32
+ depends on PPC_MPC52xx
select PPC_RTAS
select RTAS_PROC
- select PPC_MPC52xx
select PPC_NATIVE
- default n
config PPC_LITE5200
bool "Freescale Lite5200 Eval Board"
- depends on PPC_MULTIPLATFORM && PPC32
- select PPC_MPC5200
+ depends on PPC_MPC52xx
select DEFAULT_UIMAGE
select WANT_DEVICE_TREE
- default n
+
+config PPC_MPC5200_BUGFIX
+ bool "MPC5200 (L25R) bugfix support"
+ depends on PPC_MPC52xx
+ help
+ Enable workarounds for original MPC5200 errata. This is not required
+ for MPC5200B based boards.
+
+ It is safe to say 'Y' here
+
{
rtas_initialize();
+ /* Map important registers from the internal memory map */
+ mpc52xx_map_common_devices();
+
efika_pcisetup();
#ifdef CONFIG_PM
*
*/
+/* mpc5200 device tree match tables */
+static struct of_device_id mpc5200_cdm_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-cdm", },
+ { .compatible = "mpc5200-cdm", },
+ {}
+};
+
+static struct of_device_id mpc5200_gpio_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-gpio", },
+ { .compatible = "mpc5200-gpio", },
+ {}
+};
+
/*
* Fix clock configuration.
*
{
struct device_node *np;
struct mpc52xx_cdm __iomem *cdm;
-
/* Map zones */
- np = of_find_compatible_node(NULL, NULL, "mpc5200-cdm");
+ np = of_find_matching_node(NULL, mpc5200_cdm_ids);
cdm = of_iomap(np, 0);
of_node_put(np);
if (!cdm) {
struct mpc52xx_gpio __iomem *gpio;
u32 port_config;
- np = of_find_compatible_node(NULL, NULL, "mpc5200-gpio");
+ np = of_find_matching_node(NULL, mpc5200_gpio_ids);
gpio = of_iomap(np, 0);
of_node_put(np);
if (!gpio) {
if (ppc_md.progress)
ppc_md.progress("lite5200_setup_arch()", 0);
- /* Fix things that firmware should have done. */
- lite5200_fix_clock_config();
- lite5200_fix_port_config();
+ /* Map important registers from the internal memory map */
+ mpc52xx_map_common_devices();
/* Some mpc5200 & mpc5200b related configuration */
mpc5200_setup_xlb_arbiter();
- /* Map wdt for mpc52xx_restart() */
- mpc52xx_map_wdt();
+ /* Fix things that firmware should have done. */
+ lite5200_fix_clock_config();
+ lite5200_fix_port_config();
#ifdef CONFIG_PM
mpc52xx_suspend.board_suspend_prepare = lite5200_suspend_prepare;
static int lite5200_pm_prepare(void)
{
struct device_node *np;
+ const struct of_device_id immr_ids[] = {
+ { .compatible = "fsl,mpc5200-immr", },
+ { .compatible = "fsl,mpc5200b-immr", },
+ { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
+ { .type = "builtin", .compatible = "mpc5200", }, /* efika */
+ {}
+ };
/* deep sleep? let mpc52xx code handle that */
if (lite5200_pm_target_state == PM_SUSPEND_STANDBY)
return -EINVAL;
/* map registers */
- np = of_find_compatible_node(NULL, NULL, "mpc5200");
+ np = of_find_matching_node(NULL, immr_ids);
mbar = of_iomap(np, 0);
of_node_put(np);
if (!mbar) {
if (ppc_md.progress)
ppc_md.progress("mpc5200_simple_setup_arch()", 0);
+ /* Map important registers from the internal memory map */
+ mpc52xx_map_common_devices();
+
/* Some mpc5200 & mpc5200b related configuration */
mpc5200_setup_xlb_arbiter();
- /* Map wdt for mpc52xx_restart() */
- mpc52xx_map_wdt();
-
mpc52xx_setup_pci();
}
#undef DEBUG
#include <linux/kernel.h>
+#include <linux/spinlock.h>
#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/mpc52xx.h>
+/* MPC5200 device tree match tables */
+static struct of_device_id mpc52xx_xlb_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-xlb", },
+ { .compatible = "mpc5200-xlb", },
+ {}
+};
+static struct of_device_id mpc52xx_bus_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-immr", },
+ { .compatible = "fsl,mpc5200b-immr", },
+ { .compatible = "fsl,lpb", },
+
+ /* depreciated matches; shouldn't be used in new device trees */
+ { .type = "builtin", .compatible = "mpc5200", }, /* efika */
+ { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
+ {}
+};
+
/*
* This variable is mapped in mpc52xx_map_wdt() and used in mpc52xx_restart().
* Permanent mapping is required because mpc52xx_restart() can be called
* from interrupt context while node mapping (which calls ioremap())
* cannot be used at such point.
*/
-static volatile struct mpc52xx_gpt *mpc52xx_wdt = NULL;
+static spinlock_t mpc52xx_lock = SPIN_LOCK_UNLOCKED;
+static struct mpc52xx_gpt __iomem *mpc52xx_wdt;
+static struct mpc52xx_cdm __iomem *mpc52xx_cdm;
/**
* mpc52xx_find_ipb_freq - Find the IPB bus frequency for a device
struct device_node *np;
struct mpc52xx_xlb __iomem *xlb;
- np = of_find_compatible_node(NULL, NULL, "mpc5200-xlb");
+ np = of_find_matching_node(NULL, mpc52xx_xlb_ids);
xlb = of_iomap(np, 0);
of_node_put(np);
if (!xlb) {
iounmap(xlb);
}
-static struct of_device_id mpc52xx_bus_ids[] __initdata= {
- { .compatible = "fsl,mpc5200-immr", },
- { .compatible = "fsl,lpb", },
-
- /* depreciated matches; shouldn't be used in new device trees */
- { .type = "builtin", .compatible = "mpc5200", }, /* efika */
- { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
- {},
-};
-
+/**
+ * mpc52xx_declare_of_platform_devices: register internal devices and children
+ * of the localplus bus to the of_platform
+ * bus.
+ */
void __init
mpc52xx_declare_of_platform_devices(void)
{
"Error while probing of_platform bus\n");
}
+/*
+ * match tables used by mpc52xx_map_common_devices()
+ */
+static struct of_device_id mpc52xx_gpt_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-gpt", },
+ { .compatible = "mpc5200-gpt", }, /* old */
+ {}
+};
+static struct of_device_id mpc52xx_cdm_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-cdm", },
+ { .compatible = "mpc5200-cdm", }, /* old */
+ {}
+};
+
+/**
+ * mpc52xx_map_common_devices: iomap devices required by common code
+ */
void __init
-mpc52xx_map_wdt(void)
+mpc52xx_map_common_devices(void)
{
- const void *has_wdt;
struct device_node *np;
/* mpc52xx_wdt is mapped here and used in mpc52xx_restart,
* possibly from a interrupt context. wdt is only implement
* on a gpt0, so check has-wdt property before mapping.
*/
- for_each_compatible_node(np, NULL, "fsl,mpc5200-gpt") {
- has_wdt = of_get_property(np, "fsl,has-wdt", NULL);
- if (has_wdt) {
+ for_each_matching_node(np, mpc52xx_gpt_ids) {
+ if (of_get_property(np, "fsl,has-wdt", NULL) ||
+ of_get_property(np, "has-wdt", NULL)) {
mpc52xx_wdt = of_iomap(np, 0);
of_node_put(np);
- return;
+ break;
}
}
- for_each_compatible_node(np, NULL, "mpc5200-gpt") {
- has_wdt = of_get_property(np, "has-wdt", NULL);
- if (has_wdt) {
- mpc52xx_wdt = of_iomap(np, 0);
- of_node_put(np);
- return;
- }
+ /* Clock Distribution Module, used by PSC clock setting function */
+ np = of_find_matching_node(NULL, mpc52xx_cdm_ids);
+ mpc52xx_cdm = of_iomap(np, 0);
+ of_node_put(np);
+}
+
+/**
+ * mpc52xx_set_psc_clkdiv: Set clock divider in the CDM for PSC ports
+ *
+ * @psc_id: id of psc port; must be 1,2,3 or 6
+ * @clkdiv: clock divider value to put into CDM PSC register.
+ */
+int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
+{
+ unsigned long flags;
+ u16 __iomem *reg;
+ u32 val;
+ u32 mask;
+ u32 mclken_div;
+
+ if (!mpc52xx_cdm)
+ return -ENODEV;
+
+ mclken_div = 0x8000 | (clkdiv & 0x1FF);
+ switch (psc_id) {
+ case 1: reg = &mpc52xx_cdm->mclken_div_psc1; mask = 0x20; break;
+ case 2: reg = &mpc52xx_cdm->mclken_div_psc2; mask = 0x40; break;
+ case 3: reg = &mpc52xx_cdm->mclken_div_psc3; mask = 0x80; break;
+ case 6: reg = &mpc52xx_cdm->mclken_div_psc6; mask = 0x10; break;
+ default:
+ return -ENODEV;
}
+
+ /* Set the rate and enable the clock */
+ spin_lock_irqsave(&mpc52xx_lock, flags);
+ out_be16(reg, mclken_div);
+ val = in_be32(&mpc52xx_cdm->clk_enables);
+ out_be32(&mpc52xx_cdm->clk_enables, val | mask);
+ spin_unlock_irqrestore(&mpc52xx_lock, flags);
+
+ return 0;
}
+/**
+ * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer
+ */
void
mpc52xx_restart(char *cmd)
{
u8 reserved6[4]; /* PCI + 0xFC */
};
+/* MPC5200 device tree match tables */
+const struct of_device_id mpc52xx_pci_ids[] __initdata = {
+ { .type = "pci", .compatible = "fsl,mpc5200-pci", },
+ { .type = "pci", .compatible = "mpc5200-pci", },
+ {}
+};
/* ======================================================================== */
/* PCI configuration acess */
{
struct device_node *pci;
- pci = of_find_compatible_node(NULL, NULL, "fsl,mpc5200-pci");
- if (!pci)
- pci = of_find_compatible_node(NULL, NULL, "mpc5200-pci");
+ pci = of_find_matching_node(NULL, mpc52xx_pci_ids);
if (!pci)
return;
*
*/
+/* MPC5200 device tree match tables */
+static struct of_device_id mpc52xx_pic_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-pic", },
+ { .compatible = "mpc5200-pic", },
+ {}
+};
+static struct of_device_id mpc52xx_sdma_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-bestcomm", },
+ { .compatible = "mpc5200-bestcomm", },
+ {}
+};
+
static struct mpc52xx_intr __iomem *intr;
static struct mpc52xx_sdma __iomem *sdma;
static struct irq_host *mpc52xx_irqhost = NULL;
struct device_node *np;
/* Remap the necessary zones */
- picnode = of_find_compatible_node(NULL, NULL, "mpc5200-pic");
+ picnode = of_find_matching_node(NULL, mpc52xx_pic_ids);
intr = of_iomap(picnode, 0);
if (!intr)
panic(__FILE__ ": find_and_map failed on 'mpc5200-pic'. "
"Check node !");
- np = of_find_compatible_node(NULL, NULL, "mpc5200-bestcomm");
+ np = of_find_matching_node(NULL, mpc52xx_sdma_ids);
sdma = of_iomap(np, 0);
of_node_put(np);
if (!sdma)
int mpc52xx_pm_prepare(void)
{
struct device_node *np;
+ const struct of_device_id immr_ids[] = {
+ { .compatible = "fsl,mpc5200-immr", },
+ { .compatible = "fsl,mpc5200b-immr", },
+ { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
+ { .type = "builtin", .compatible = "mpc5200", }, /* efika */
+ {}
+ };
/* map the whole register space */
- np = of_find_compatible_node(NULL, NULL, "mpc5200");
+ np = of_find_matching_node(NULL, immr_ids);
mbar = of_iomap(np, 0);
of_node_put(np);
if (!mbar) {
#define DRIVER_NAME "bestcomm-core"
+/* MPC5200 device tree match tables */
+static struct of_device_id mpc52xx_sram_ids[] __devinitdata = {
+ { .compatible = "fsl,mpc5200-sram", },
+ { .compatible = "mpc5200-sram", },
+ {}
+};
+
struct bcom_engine *bcom_eng = NULL;
EXPORT_SYMBOL_GPL(bcom_eng); /* needed for inline functions */
-
/* ======================================================================== */
/* Public and private API */
/* ======================================================================== */
of_node_get(op->node);
/* Prepare SRAM */
- ofn_sram = of_find_compatible_node(NULL, "sram", "mpc5200-sram");
+ ofn_sram = of_find_matching_node(NULL, mpc52xx_sram_ids);
if (!ofn_sram) {
printk(KERN_ERR DRIVER_NAME ": "
"No SRAM found in device tree\n");
}
static struct of_device_id mpc52xx_bcom_of_match[] = {
- {
- .type = "dma-controller",
- .compatible = "mpc5200-bestcomm",
- },
+ { .type = "dma-controller", .compatible = "fsl,mpc5200-bestcomm", },
+ { .type = "dma-controller", .compatible = "mpc5200-bestcomm", },
{},
};
*/
+#include <linux/spinlock.h>
#include <asm/io.h>
#include <asm/time.h>
#include <asm/mpc52xx.h>
return 0;
}
+
+int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
+{
+ static spinlock_t lock = SPIN_LOCK_UNLOCKED;
+ struct mpc52xx_cdm __iomem *cdm;
+ unsigned long flags;
+ u16 mclken_div;
+ u16 __iomem *reg;
+ u32 mask;
+
+ cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
+ if (!cdm) {
+ printk(KERN_ERR __FILE__ ": Error mapping CDM\n");
+ return -ENODEV;
+ }
+
+ mclken_div = 0x8000 | (clkdiv & 0x1FF);
+ switch (psc_id) {
+ case 1: reg = &cdm->mclken_div_psc1; mask = 0x20; break;
+ case 2: reg = &cdm->mclken_div_psc2; mask = 0x40; break;
+ case 3: reg = &cdm->mclken_div_psc3; mask = 0x80; break;
+ case 6: reg = &cdm->mclken_div_psc6; mask = 0x10; break;
+ default:
+ return -ENODEV;
+ }
+
+ /* Set the rate and enable the clock */
+ spin_lock_irqsave(&lock, flags);
+ out_be16(reg, mclken_div);
+ out_be32(&cdm->clk_enables, in_be32(&cdm->clk_enables) | mask);
+ spin_unlock_irqrestore(&lock, flags);
+
+ iounmap(cdm);
+ return 0;
+}
static struct of_device_id mpc52xx_ata_of_match[] = {
- {
- .type = "ata",
- .compatible = "mpc5200-ata",
- },
+ { .compatible = "fsl,mpc5200-ata", },
+ { .compatible = "mpc5200-ata", },
{},
};
#endif
static struct of_device_id mpc52xx_fec_match[] = {
- {
- .type = "network",
- .compatible = "mpc5200-fec",
- },
+ { .type = "network", .compatible = "fsl,mpc5200-fec", },
+ { .type = "network", .compatible = "mpc5200-fec", },
{ }
};
static struct of_device_id mpc52xx_fec_mdio_match[] = {
- {
- .type = "mdio",
- .compatible = "mpc5200b-fec-phy",
- },
- {},
+ { .compatible = "fsl,mpc5200b-mdio", },
+ { .compatible = "mpc5200b-fec-phy", },
+ {}
};
struct of_platform_driver mpc52xx_fec_mdio_driver = {
#if defined(CONFIG_PPC_MERGE)
static struct of_device_id mpc52xx_uart_of_match[] = {
- { .type = "serial", .compatible = "mpc5200-psc-uart", },
+ { .type = "serial", .compatible = "fsl,mpc5200-psc-uart", },
+ { .type = "serial", .compatible = "mpc5200-psc-uart", }, /* lite5200 */
+ { .type = "serial", .compatible = "mpc5200-serial", }, /* efika */
{},
};
#endif
static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
{
- struct device_node *np;
- struct mpc52xx_cdm __iomem *cdm;
- struct mpc52xx_gpio __iomem *gpio;
struct mpc52xx_psc __iomem *psc = mps->psc;
- u32 ul;
u32 mclken_div;
int ret = 0;
-#if defined(CONFIG_PPC_MERGE)
- np = of_find_compatible_node(NULL, NULL, "mpc5200-cdm");
- cdm = of_iomap(np, 0);
- of_node_put(np);
- np = of_find_compatible_node(NULL, NULL, "mpc5200-gpio");
- gpio = of_iomap(np, 0);
- of_node_put(np);
-#else
- cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
- gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
-#endif
- if (!cdm || !gpio) {
- printk(KERN_ERR "Error mapping CDM/GPIO\n");
- ret = -EFAULT;
- goto unmap_regs;
- }
-
/* default sysclk is 512MHz */
- mclken_div = 0x8000 |
- (((mps->sysclk ? mps->sysclk : 512000000) / MCLK) & 0x1FF);
-
- switch (psc_id) {
- case 1:
- ul = in_be32(&gpio->port_config);
- ul &= 0xFFFFFFF8;
- ul |= 0x00000006;
- out_be32(&gpio->port_config, ul);
- out_be16(&cdm->mclken_div_psc1, mclken_div);
- ul = in_be32(&cdm->clk_enables);
- ul |= 0x00000020;
- out_be32(&cdm->clk_enables, ul);
- break;
- case 2:
- ul = in_be32(&gpio->port_config);
- ul &= 0xFFFFFF8F;
- ul |= 0x00000060;
- out_be32(&gpio->port_config, ul);
- out_be16(&cdm->mclken_div_psc2, mclken_div);
- ul = in_be32(&cdm->clk_enables);
- ul |= 0x00000040;
- out_be32(&cdm->clk_enables, ul);
- break;
- case 3:
- ul = in_be32(&gpio->port_config);
- ul &= 0xFFFFF0FF;
- ul |= 0x00000600;
- out_be32(&gpio->port_config, ul);
- out_be16(&cdm->mclken_div_psc3, mclken_div);
- ul = in_be32(&cdm->clk_enables);
- ul |= 0x00000080;
- out_be32(&cdm->clk_enables, ul);
- break;
- case 6:
- ul = in_be32(&gpio->port_config);
- ul &= 0xFF8FFFFF;
- ul |= 0x00700000;
- out_be32(&gpio->port_config, ul);
- out_be16(&cdm->mclken_div_psc6, mclken_div);
- ul = in_be32(&cdm->clk_enables);
- ul |= 0x00000010;
- out_be32(&cdm->clk_enables, ul);
- break;
- default:
- ret = -EINVAL;
- goto unmap_regs;
- }
+ mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK;
+ mpc52xx_set_psc_clkdiv(psc_id, mclken_div);
/* Reset the PSC into a known state */
out_8(&psc->command, MPC52xx_PSC_RST_RX);
mps->bits_per_word = 8;
-unmap_regs:
- if (cdm)
- iounmap(cdm);
- if (gpio)
- iounmap(gpio);
-
return ret;
}
}
static struct of_device_id mpc52xx_psc_spi_of_match[] = {
- { .type = "spi", .compatible = "mpc5200-psc-spi", },
- {},
+ { .compatible = "fsl,mpc5200-psc-spi", },
+ { .compatible = "mpc5200-psc-spi", }, /* old */
+ {}
};
MODULE_DEVICE_TABLE(of, mpc52xx_psc_spi_of_match);
ohci = hcd_to_ohci(hcd);
if (is_bigendian) {
ohci->flags |= OHCI_QUIRK_BE_MMIO | OHCI_QUIRK_BE_DESC;
+ if (of_device_is_compatible(dn, "fsl,mpc5200-ohci"))
+ ohci->flags |= OHCI_QUIRK_FRAME_NO;
if (of_device_is_compatible(dn, "mpc5200-ohci"))
ohci->flags |= OHCI_QUIRK_FRAME_NO;
}
#ifndef __ASSEMBLY__
+/* mpc52xx_common.c */
extern unsigned int mpc52xx_find_ipb_freq(struct device_node *node);
extern void mpc5200_setup_xlb_arbiter(void);
extern void mpc52xx_declare_of_platform_devices(void);
+extern void mpc52xx_map_common_devices(void);
+extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv);
+extern void mpc52xx_restart(char *cmd);
+/* mpc52xx_pic.c */
extern void mpc52xx_init_irq(void);
extern unsigned int mpc52xx_get_irq(void);
+/* mpc52xx_pci.c */
#ifdef CONFIG_PCI
extern int __init mpc52xx_add_bridge(struct device_node *node);
extern void __init mpc52xx_setup_pci(void);
static inline void mpc52xx_setup_pci(void) { }
#endif
-extern void __init mpc52xx_map_wdt(void);
-extern void mpc52xx_restart(char *cmd);
-
#endif /* __ASSEMBLY__ */
#ifdef CONFIG_PM
projects / linux-2.6 / commitdiff