]> err.no Git - linux-2.6/commitdiff
ide: add IDE_HFLAG_ABUSE_SET_DMA_MODE host flag
authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Fri, 25 Jan 2008 21:17:18 +0000 (22:17 +0100)
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Fri, 25 Jan 2008 21:17:18 +0000 (22:17 +0100)
* Add IDE_HFLAG_ABUSE_SET_DMA_MODE host flag and use it to decide
  what to do with transfer modes < XFER_PIO_0 in ide_set_xfer_rate().

* Set IDE_HFLAG_ABUSE_SET_DMA_MODE in host drivers that need it
  (aec62xx, amd74xx, cs5520, cs5535, hpt34x, hpt366, pdc202xx_old,
  serverworks, tc86c001 and via82cxxx) and cleanup ->set_dma_mode
  methods in host drivers that don't (IDE core code guarantees that
  ->set_dma_mode will be called only for modes which are present
  in SWDMA/MWDMA/UDMA masks).

While at it:

* Add IDE_HFLAGS_HPT34X/HPT3XX/PDC202XX/SVWKS define in
  hpt34x/hpt366/pdc202xx_old/serverworks host driver.

There should be no functionality changes caused by this patch.

Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
30 files changed:
drivers/ide/arm/icside.c
drivers/ide/cris/ide-cris.c
drivers/ide/ide-lib.c
drivers/ide/mips/au1xxx-ide.c
drivers/ide/pci/aec62xx.c
drivers/ide/pci/alim15x3.c
drivers/ide/pci/amd74xx.c
drivers/ide/pci/atiixp.c
drivers/ide/pci/cmd64x.c
drivers/ide/pci/cs5520.c
drivers/ide/pci/cs5530.c
drivers/ide/pci/cs5535.c
drivers/ide/pci/hpt34x.c
drivers/ide/pci/hpt366.c
drivers/ide/pci/it8213.c
drivers/ide/pci/pdc202xx_new.c
drivers/ide/pci/pdc202xx_old.c
drivers/ide/pci/piix.c
drivers/ide/pci/sc1200.c
drivers/ide/pci/scc_pata.c
drivers/ide/pci/serverworks.c
drivers/ide/pci/siimage.c
drivers/ide/pci/sis5513.c
drivers/ide/pci/sl82c105.c
drivers/ide/pci/slc90e66.c
drivers/ide/pci/tc86c001.c
drivers/ide/pci/triflex.c
drivers/ide/pci/via82cxxx.c
drivers/ide/ppc/pmac.c
include/linux/ide.h

index 93f71fcfc04df46a571aa72e14726d36a3d81f58..673402f4a295452b46ed0d770bcb5d176ff772bf 100644 (file)
@@ -272,8 +272,6 @@ static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
        case XFER_SW_DMA_0:
                cycle_time = 480;
                break;
-       default:
-               return;
        }
 
        /*
index 476e0d65ed438f34375b155f0b80169f39a2b6fa..325e608d9e626fb3da2f3f7031e99a1e5a3c07bb 100644 (file)
@@ -747,8 +747,6 @@ static void cris_set_dma_mode(ide_drive_t *drive, const u8 speed)
                        strobe = ATA_DMA2_STROBE;
                        hold = ATA_DMA2_HOLD;
                        break;
-               default:
-                       return;
        }
 
        if (speed >= XFER_UDMA_0)
index 8649db33f67dcc1fa837067613883c94ff5b3525..a3bd8e8ed6b04545fdde4454f440a4cc505e5853 100644 (file)
@@ -441,6 +441,12 @@ int ide_set_xfer_rate(ide_drive_t *drive, u8 rate)
         * case could happen iff the transfer mode has already been set on
         * the device by ide-proc.c::set_xfer_rate()).
         */
+       if (rate < XFER_PIO_0) {
+               if (hwif->host_flags & IDE_HFLAG_ABUSE_SET_DMA_MODE)
+                       return ide_set_dma_mode(drive, rate);
+               else
+                       return ide_config_drive_speed(drive, rate);
+       }
 
        return ide_set_dma_mode(drive, rate);
 }
index a4ce3ba15d61a0164fc3ee1535060e1121186b8e..a4d0d4ca73d039ed50a290facd04d313ebd4e094 100644 (file)
@@ -198,8 +198,6 @@ static void auide_set_dma_mode(ide_drive_t *drive, const u8 speed)
 
                break;
 #endif
-       default:
-               return;
        }
 
        au_writel(mem_sttime,MEM_STTIME2);
index 44268504ae433ce8a4065ed048eca4937198966d..7f4d1857d5559f73f5e3ceb6c7e975c79e4b28b6 100644 (file)
@@ -202,6 +202,7 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
                .enablebits     = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
                .host_flags     = IDE_HFLAG_SERIALIZE |
                                  IDE_HFLAG_NO_ATAPI_DMA |
+                                 IDE_HFLAG_ABUSE_SET_DMA_MODE |
                                  IDE_HFLAG_OFF_BOARD,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
@@ -211,6 +212,7 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
                .init_chipset   = init_chipset_aec62xx,
                .init_hwif      = init_hwif_aec62xx,
                .host_flags     = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA |
+                                 IDE_HFLAG_ABUSE_SET_DMA_MODE |
                                  IDE_HFLAG_OFF_BOARD,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
@@ -220,7 +222,8 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
                .init_chipset   = init_chipset_aec62xx,
                .init_hwif      = init_hwif_aec62xx,
                .enablebits     = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA,
+               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA |
+                                 IDE_HFLAG_ABUSE_SET_DMA_MODE,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
                .udma_mask      = ATA_UDMA4,
@@ -228,7 +231,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
                .name           = "AEC6280",
                .init_chipset   = init_chipset_aec62xx,
                .init_hwif      = init_hwif_aec62xx,
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA |
+                                 IDE_HFLAG_ABUSE_SET_DMA_MODE |
+                                 IDE_HFLAG_OFF_BOARD,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
                .udma_mask      = ATA_UDMA5,
@@ -237,7 +242,9 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
                .init_chipset   = init_chipset_aec62xx,
                .init_hwif      = init_hwif_aec62xx,
                .enablebits     = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA |
+                                 IDE_HFLAG_ABUSE_SET_DMA_MODE |
+                                 IDE_HFLAG_OFF_BOARD,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
                .udma_mask      = ATA_UDMA5,
index ce293936af4b4fc808a9779ae7e09c6cc8424b67..49aa82e412b6ed1da3fb40b3d2291501a92b232a 100644 (file)
@@ -402,9 +402,6 @@ static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
        u8 tmpbyte              = 0x00;
        int m5229_udma          = (hwif->channel) ? 0x57 : 0x56;
 
-       if (speed < XFER_PIO_0)
-               return;
-
        if (speed == XFER_UDMA_6)
                speed1 = 0x47;
 
index 8d4125ec252c102fd982158aeac8dd6e5cb4b4cc..cee51fdafcf6f5353369b9601b99b7c812fff31d 100644 (file)
@@ -266,6 +266,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
 #define IDE_HFLAGS_AMD \
        (IDE_HFLAG_PIO_NO_BLACKLIST | \
         IDE_HFLAG_PIO_NO_DOWNGRADE | \
+        IDE_HFLAG_ABUSE_SET_DMA_MODE | \
         IDE_HFLAG_POST_SET_MODE | \
         IDE_HFLAG_IO_32BIT | \
         IDE_HFLAG_UNMASK_IRQS | \
index ef8e0164ef7a019e560608741d3b880ed6a12452..5ae26564fb72a1a9e383fccdef86adbb454da4b5 100644 (file)
@@ -133,9 +133,6 @@ static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed)
        u32 tmp32;
        u16 tmp16;
 
-       if (speed < XFER_MW_DMA_0)
-               return;
-
        spin_lock_irqsave(&atiixp_lock, flags);
 
        save_mdma_mode[drive->dn] = 0;
index f3613bac9dbeb778ab68b659c4568d563c358783..0b1e9479f019668f2e42ce9c73edca46af774877 100644 (file)
@@ -322,8 +322,6 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
        case XFER_MW_DMA_0:
                program_cycle_times(drive, 480, 215);
                break;
-       default:
-               return;
        }
 
        if (speed >= XFER_SW_DMA_0)
index 0466462fd21b9a7ce82b9ab6789d0aa7648ff273..d1a91bcb5b2925c3dd4d93cd0909942cb07d775c 100644 (file)
@@ -137,6 +137,7 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
                                  IDE_HFLAG_CS5520 |            \
                                  IDE_HFLAG_VDMA |              \
                                  IDE_HFLAG_NO_ATAPI_DMA |      \
+                                 IDE_HFLAG_ABUSE_SET_DMA_MODE |\
                                  IDE_HFLAG_BOOTABLE,           \
                .pio_mask       = ATA_PIO4,                     \
        }
index 547690395eee6e3b07bf0c597843ab3a1b0fc106..df5966b334600f66bdfd528d246831dec68bebe6 100644 (file)
@@ -116,8 +116,6 @@ static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode)
                case XFER_MW_DMA_0:     timings = 0x00077771; break;
                case XFER_MW_DMA_1:     timings = 0x00012121; break;
                case XFER_MW_DMA_2:     timings = 0x00002020; break;
-               default:
-                       return;
        }
        basereg = CS5530_BASEREG(drive->hwif);
        reg = inl(basereg + 4);                 /* get drive0 config register */
index ddcbeba671e19ca749c3dc3f74aefbf898944473..50b3d7791f55110c00d132202b335bb80d1cb6e8 100644 (file)
@@ -190,7 +190,7 @@ static const struct ide_port_info cs5535_chipset __devinitdata = {
        .name           = "CS5535",
        .init_hwif      = init_hwif_cs5535,
        .host_flags     = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE |
-                         IDE_HFLAG_BOOTABLE,
+                         IDE_HFLAG_ABUSE_SET_DMA_MODE | IDE_HFLAG_BOOTABLE,
        .pio_mask       = ATA_PIO4,
        .mwdma_mask     = ATA_MWDMA2,
        .udma_mask      = ATA_UDMA4,
index ae6307fae4f9311b35ba24b7727e5c21b05c6b54..dfba0d13fcd39f4f4ebc96df5a874d798fc5b65d 100644 (file)
@@ -129,14 +129,18 @@ static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif)
        hwif->set_dma_mode = &hpt34x_set_mode;
 }
 
+#define IDE_HFLAGS_HPT34X \
+       (IDE_HFLAG_NO_ATAPI_DMA | \
+        IDE_HFLAG_ABUSE_SET_DMA_MODE | \
+        IDE_HFLAG_NO_AUTODMA)
+
 static const struct ide_port_info hpt34x_chipsets[] __devinitdata = {
        { /* 0 */
                .name           = "HPT343",
                .init_chipset   = init_chipset_hpt34x,
                .init_hwif      = init_hwif_hpt34x,
                .extra          = 16,
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA |
-                                 IDE_HFLAG_NO_AUTODMA,
+               .host_flags     = IDE_HFLAGS_HPT34X,
                .pio_mask       = ATA_PIO5,
        },
        { /* 1 */
@@ -144,9 +148,7 @@ static const struct ide_port_info hpt34x_chipsets[] __devinitdata = {
                .init_chipset   = init_chipset_hpt34x,
                .init_hwif      = init_hwif_hpt34x,
                .extra          = 16,
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA |
-                                 IDE_HFLAG_NO_AUTODMA |
-                                 IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAGS_HPT34X | IDE_HFLAG_OFF_BOARD,
                .pio_mask       = ATA_PIO5,
 #ifdef CONFIG_HPT34X_AUTODMA
                .swdma_mask     = ATA_SWDMA2,
index 24d645751e0f27855d405bac27d3de03d1ca9f3f..3777fb8c80430ed089c936ba0663566a54ed9313 100644 (file)
@@ -1461,6 +1461,11 @@ static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2)
        return 0;
 }
 
+#define IDE_HFLAGS_HPT3XX \
+       (IDE_HFLAG_NO_ATAPI_DMA | \
+        IDE_HFLAG_ABUSE_SET_DMA_MODE | \
+        IDE_HFLAG_OFF_BOARD)
+
 static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
        {       /* 0 */
                .name           = "HPT36x",
@@ -1475,9 +1480,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
                 */
                .enablebits     = {{0x50,0x10,0x10}, {0x54,0x04,0x04}},
                .extra          = 240,
-               .host_flags     = IDE_HFLAG_SINGLE |
-                                 IDE_HFLAG_NO_ATAPI_DMA |
-                                 IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
        },{     /* 1 */
@@ -1487,7 +1490,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
                .init_dma       = init_dma_hpt366,
                .enablebits     = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
                .extra          = 240,
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAGS_HPT3XX,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
        },{     /* 2 */
@@ -1497,7 +1500,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
                .init_dma       = init_dma_hpt366,
                .enablebits     = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
                .extra          = 240,
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAGS_HPT3XX,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
        },{     /* 3 */
@@ -1507,7 +1510,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
                .init_dma       = init_dma_hpt366,
                .enablebits     = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
                .extra          = 240,
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAGS_HPT3XX,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
        },{     /* 4 */
@@ -1518,7 +1521,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
                .enablebits     = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
                .udma_mask      = ATA_UDMA5,
                .extra          = 240,
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAGS_HPT3XX,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
        },{     /* 5 */
@@ -1528,7 +1531,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
                .init_dma       = init_dma_hpt366,
                .enablebits     = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
                .extra          = 240,
-               .host_flags     = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAGS_HPT3XX,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
        }
index 90b52ed37bfc365de2a6041eac56280b5d1ba44e..2a0f45c4f4c4167290db93a4814a2c40facc18c4 100644 (file)
@@ -101,24 +101,11 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
        pci_read_config_byte(dev, 0x54, &reg54);
        pci_read_config_byte(dev, 0x55, &reg55);
 
-       switch(speed) {
-               case XFER_UDMA_6:
-               case XFER_UDMA_4:
-               case XFER_UDMA_2:       u_speed = 2 << (drive->dn * 4); break;
-               case XFER_UDMA_5:
-               case XFER_UDMA_3:
-               case XFER_UDMA_1:       u_speed = 1 << (drive->dn * 4); break;
-               case XFER_UDMA_0:       u_speed = 0 << (drive->dn * 4); break;
-                       break;
-               case XFER_MW_DMA_2:
-               case XFER_MW_DMA_1:
-               case XFER_SW_DMA_2:
-                       break;
-               default:
-                       return;
-       }
-
        if (speed >= XFER_UDMA_0) {
+               u8 udma = speed - XFER_UDMA_0;
+
+               u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4);
+
                if (!(reg48 & u_flag))
                        pci_write_config_byte(dev, 0x48, reg48 | u_flag);
                if (speed >= XFER_UDMA_5) {
index 79ba8eff3644263e1ec2a60683104e84344c7174..ef4a99b99d1f6c50e998b24e5846f034436f1ced 100644 (file)
@@ -162,32 +162,18 @@ static void pdcnew_set_dma_mode(ide_drive_t *drive, const u8 speed)
        if (max_dma_rate(hwif->pci_dev) == 4) {
                u8 mode = speed & 0x07;
 
-               switch (speed) {
-                       case XFER_UDMA_6:
-                       case XFER_UDMA_5:
-                       case XFER_UDMA_4:
-                       case XFER_UDMA_3:
-                       case XFER_UDMA_2:
-                       case XFER_UDMA_1:
-                       case XFER_UDMA_0:
-                               set_indexed_reg(hwif, 0x10 + adj,
-                                               udma_timings[mode].reg10);
-                               set_indexed_reg(hwif, 0x11 + adj,
-                                               udma_timings[mode].reg11);
-                               set_indexed_reg(hwif, 0x12 + adj,
-                                               udma_timings[mode].reg12);
-                               break;
-                       case XFER_MW_DMA_2:
-                       case XFER_MW_DMA_1:
-                       case XFER_MW_DMA_0:
-                               set_indexed_reg(hwif, 0x0e + adj,
-                                               mwdma_timings[mode].reg0e);
-                               set_indexed_reg(hwif, 0x0f + adj,
-                                               mwdma_timings[mode].reg0f);
-                               break;
-                       default:
-                               printk(KERN_ERR "pdc202xx_new: "
-                                      "Unknown speed %d ignored\n", speed);
+               if (speed >= XFER_UDMA_0) {
+                       set_indexed_reg(hwif, 0x10 + adj,
+                                       udma_timings[mode].reg10);
+                       set_indexed_reg(hwif, 0x11 + adj,
+                                       udma_timings[mode].reg11);
+                       set_indexed_reg(hwif, 0x12 + adj,
+                                       udma_timings[mode].reg12);
+               } else {
+                       set_indexed_reg(hwif, 0x0e + adj,
+                                       mwdma_timings[mode].reg0e);
+                       set_indexed_reg(hwif, 0x0f + adj,
+                                       mwdma_timings[mode].reg0f);
                }
        } else if (speed == XFER_UDMA_2) {
                /* Set tHOLD bit to 0 if using UDMA mode 2 */
index 22c7a7533b696dd9785975e775b24d18a84c90cb..67b2781e22131b3c98be78182836d9dff4e515c7 100644 (file)
@@ -375,6 +375,11 @@ static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev,
        }
 }
 
+#define IDE_HFLAGS_PDC202XX \
+       (IDE_HFLAG_ERROR_STOPS_FIFO | \
+        IDE_HFLAG_ABUSE_SET_DMA_MODE | \
+        IDE_HFLAG_OFF_BOARD)
+
 #define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \
        { \
                .name           = name_str, \
@@ -382,9 +387,7 @@ static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev,
                .init_hwif      = init_hwif_pdc202xx, \
                .init_dma       = init_dma_pdc202xx, \
                .extra          = 48, \
-               .host_flags     = IDE_HFLAG_ERROR_STOPS_FIFO | \
-                                 extra_flags | \
-                                 IDE_HFLAG_OFF_BOARD, \
+               .host_flags     = IDE_HFLAGS_PDC202XX | extra_flags, \
                .pio_mask       = ATA_PIO4, \
                .mwdma_mask     = ATA_MWDMA2, \
                .udma_mask      = udma, \
@@ -397,8 +400,7 @@ static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = {
                .init_hwif      = init_hwif_pdc202xx,
                .init_dma       = init_dma_pdc202xx,
                .extra          = 16,
-               .host_flags     = IDE_HFLAG_ERROR_STOPS_FIFO |
-                                 IDE_HFLAG_OFF_BOARD,
+               .host_flags     = IDE_HFLAGS_PDC202XX,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
                .udma_mask      = ATA_UDMA2,
index 27781d294cea73b29911e845b6cd689679331345..bd6d3f77d30c1c028f44263d4c437f8ac3f27491 100644 (file)
@@ -203,20 +203,11 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
        pci_read_config_byte(dev, 0x54, &reg54);
        pci_read_config_byte(dev, 0x55, &reg55);
 
-       switch(speed) {
-               case XFER_UDMA_4:
-               case XFER_UDMA_2:       u_speed = 2 << (drive->dn * 4); break;
-               case XFER_UDMA_5:
-               case XFER_UDMA_3:
-               case XFER_UDMA_1:       u_speed = 1 << (drive->dn * 4); break;
-               case XFER_UDMA_0:       u_speed = 0 << (drive->dn * 4); break;
-               case XFER_MW_DMA_2:
-               case XFER_MW_DMA_1:
-               case XFER_SW_DMA_2:     break;
-               default:                return;
-       }
-
        if (speed >= XFER_UDMA_0) {
+               u8 udma = speed - XFER_UDMA_0;
+
+               u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4);
+
                if (!(reg48 & u_flag))
                        pci_write_config_byte(dev, 0x48, reg48 | u_flag);
                if (speed == XFER_UDMA_5) {
index f0029b364c57e5d6e08adf04ae4b3626cacdb5cc..569a8fe70d3e7a32a08546bdfdde69649c33d644 100644 (file)
@@ -185,8 +185,6 @@ static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode)
                                case PCI_CLK_66:        timings = 0x00015151;   break;
                        }
                        break;
-               default:
-                       return;
        }
 
        if (unit == 0) {                        /* are we configuring drive0? */
index ebb7132b9b848c6c87f92cbe9dc6b92450980c8f..24a85bbcd2a6c3e1db2df10355274fef707fe465 100644 (file)
@@ -254,19 +254,7 @@ static void scc_set_dma_mode(ide_drive_t *drive, const u8 speed)
                offset = 0; /* 100MHz */
        }
 
-       switch (speed) {
-       case XFER_UDMA_6:
-       case XFER_UDMA_5:
-       case XFER_UDMA_4:
-       case XFER_UDMA_3:
-       case XFER_UDMA_2:
-       case XFER_UDMA_1:
-       case XFER_UDMA_0:
-               idx = speed - XFER_UDMA_0;
-               break;
-       default:
-               return;
-       }
+       idx = speed - XFER_UDMA_0;
 
        jcactsel = JCACTSELtbl[offset][idx];
        if (is_slave) {
index a7280311357b3e539aae503165ed0b9e69603f71..e9bd269547bbb964a1e1946968a028b04d0468b6 100644 (file)
@@ -366,12 +366,17 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
        }
 }
 
+#define IDE_HFLAGS_SVWKS \
+       (IDE_HFLAG_LEGACY_IRQS | \
+        IDE_HFLAG_ABUSE_SET_DMA_MODE | \
+        IDE_HFLAG_BOOTABLE)
+
 static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
        {       /* 0 */
                .name           = "SvrWks OSB4",
                .init_chipset   = init_chipset_svwks,
                .init_hwif      = init_hwif_svwks,
-               .host_flags     = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
+               .host_flags     = IDE_HFLAGS_SVWKS,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
                .udma_mask      = 0x00, /* UDMA is problematic on OSB4 */
@@ -379,7 +384,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
                .name           = "SvrWks CSB5",
                .init_chipset   = init_chipset_svwks,
                .init_hwif      = init_hwif_svwks,
-               .host_flags     = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
+               .host_flags     = IDE_HFLAGS_SVWKS,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
                .udma_mask      = ATA_UDMA5,
@@ -387,7 +392,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
                .name           = "SvrWks CSB6",
                .init_chipset   = init_chipset_svwks,
                .init_hwif      = init_hwif_svwks,
-               .host_flags     = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
+               .host_flags     = IDE_HFLAGS_SVWKS,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
                .udma_mask      = ATA_UDMA5,
@@ -395,8 +400,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
                .name           = "SvrWks CSB6",
                .init_chipset   = init_chipset_svwks,
                .init_hwif      = init_hwif_svwks,
-               .host_flags     = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE |
-                                 IDE_HFLAG_BOOTABLE,
+               .host_flags     = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
                .udma_mask      = ATA_UDMA5,
@@ -404,8 +408,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
                .name           = "SvrWks HT1000",
                .init_chipset   = init_chipset_svwks,
                .init_hwif      = init_hwif_svwks,
-               .host_flags     = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_SINGLE |
-                                 IDE_HFLAG_BOOTABLE,
+               .host_flags     = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,
                .pio_mask       = ATA_PIO4,
                .mwdma_mask     = ATA_MWDMA2,
                .udma_mask      = ATA_UDMA5,
index 5709c252543b5c7a68a4b04064f26e85ef8ac2dc..7b45eaf5afd9999cb27b8050e9f7cef066c0bcb7 100644 (file)
@@ -278,27 +278,14 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
 
        scsc = is_sata(hwif) ? 1 : scsc;
 
-       switch(speed) {
-               case XFER_MW_DMA_2:
-               case XFER_MW_DMA_1:
-               case XFER_MW_DMA_0:
-                       multi = dma[speed - XFER_MW_DMA_0];
-                       mode |= ((unit) ? 0x20 : 0x02);
-                       break;
-               case XFER_UDMA_6:
-               case XFER_UDMA_5:
-               case XFER_UDMA_4:
-               case XFER_UDMA_3:
-               case XFER_UDMA_2:
-               case XFER_UDMA_1:
-               case XFER_UDMA_0:
-                       multi = dma[2];
-                       ultra |= ((scsc) ? (ultra6[speed - XFER_UDMA_0]) :
-                                          (ultra5[speed - XFER_UDMA_0]));
-                       mode |= ((unit) ? 0x30 : 0x03);
-                       break;
-               default:
-                       return;
+       if (speed >= XFER_UDMA_0) {
+               multi = dma[2];
+               ultra |= (scsc ? ultra6[speed - XFER_UDMA_0] :
+                                ultra5[speed - XFER_UDMA_0]);
+               mode |= (unit ? 0x30 : 0x03);
+       } else {
+               multi = dma[speed - XFER_MW_DMA_0];
+               mode |= (unit ? 0x20 : 0x02);
        }
 
        if (hwif->mmio) {
index 3f35386d9cad720402b6c56311a41b8c3d56870d..85d36996e6af768ed2f23be7ab2bd23968eb6ac4 100644 (file)
@@ -351,25 +351,10 @@ static void sis_program_udma_timings(ide_drive_t *drive, const u8 mode)
 
 static void sis_set_dma_mode(ide_drive_t *drive, const u8 speed)
 {
-       /* Config chip for mode */
-       switch(speed) {
-               case XFER_UDMA_6:
-               case XFER_UDMA_5:
-               case XFER_UDMA_4:
-               case XFER_UDMA_3:
-               case XFER_UDMA_2:
-               case XFER_UDMA_1:
-               case XFER_UDMA_0:
-                       sis_program_udma_timings(drive, speed);
-                       break;
-               case XFER_MW_DMA_2:
-               case XFER_MW_DMA_1:
-               case XFER_MW_DMA_0:
-                       sis_program_timings(drive, speed);
-                       break;
-               default:
-                       break;
-       }
+       if (speed >= XFER_UDMA_0)
+               sis_program_udma_timings(drive, speed);
+       else
+               sis_program_timings(drive, speed);
 }
 
 static u8 sis5513_ata133_udma_filter(ide_drive_t *drive)
index 147d783f7529e681fb1d69645942d00780bd42e0..069f104fdceafbcd1ddf4e1cb835b77b731ff78d 100644 (file)
@@ -115,32 +115,24 @@ static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
        DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n",
             drive->name, ide_xfer_verbose(speed)));
 
-       switch (speed) {
-       case XFER_MW_DMA_2:
-       case XFER_MW_DMA_1:
-       case XFER_MW_DMA_0:
-               drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
+       drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
 
-               /*
-                * Store the DMA timings so that we can actually program
-                * them when DMA will be turned on...
-                */
-               drive->drive_data &= 0x0000ffff;
-               drive->drive_data |= (unsigned long)drv_ctrl << 16;
+       /*
+        * Store the DMA timings so that we can actually program
+        * them when DMA will be turned on...
+        */
+       drive->drive_data &= 0x0000ffff;
+       drive->drive_data |= (unsigned long)drv_ctrl << 16;
 
-               /*
-                * If we are already using DMA, we just reprogram
-                * the drive control register.
-                */
-               if (drive->using_dma) {
-                       struct pci_dev *dev     = HWIF(drive)->pci_dev;
-                       int reg                 = 0x44 + drive->dn * 4;
-
-                       pci_write_config_word(dev, reg, drv_ctrl);
-               }
-               break;
-       default:
-               return;
+       /*
+        * If we are already using DMA, we just reprogram
+        * the drive control register.
+        */
+       if (drive->using_dma) {
+               struct pci_dev *dev     = HWIF(drive)->pci_dev;
+               int reg                 = 0x44 + drive->dn * 4;
+
+               pci_write_config_word(dev, reg, drv_ctrl);
        }
 }
 
index eb4445b229ed431602bff6bfe7e65d94b8ac53d7..dbbb46819a2dbdae2ba1a9d52830639985e7456f 100644 (file)
@@ -91,19 +91,9 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
        pci_read_config_word(dev, 0x48, &reg48);
        pci_read_config_word(dev, 0x4a, &reg4a);
 
-       switch(speed) {
-               case XFER_UDMA_4:       u_speed = 4 << (drive->dn * 4); break;
-               case XFER_UDMA_3:       u_speed = 3 << (drive->dn * 4); break;
-               case XFER_UDMA_2:       u_speed = 2 << (drive->dn * 4); break;
-               case XFER_UDMA_1:       u_speed = 1 << (drive->dn * 4); break;
-               case XFER_UDMA_0:       u_speed = 0 << (drive->dn * 4); break;
-               case XFER_MW_DMA_2:
-               case XFER_MW_DMA_1:
-               case XFER_SW_DMA_2:     break;
-               default:                return;
-       }
-
        if (speed >= XFER_UDMA_0) {
+               u_speed = (speed - XFER_UDMA_0) << (drive->dn * 4);
+
                if (!(reg48 & u_flag))
                        pci_write_config_word(dev, 0x48, reg48|u_flag);
                /* FIXME: (reg4a & a_speed) ? */
index a66ebd14664e66149bce9ada527692a7acd7977b..e1faf6c2fe1678ba442fbfae9516144e4cbfeb1e 100644 (file)
@@ -222,7 +222,8 @@ static const struct ide_port_info tc86c001_chipset __devinitdata = {
        .name           = "TC86C001",
        .init_chipset   = init_chipset_tc86c001,
        .init_hwif      = init_hwif_tc86c001,
-       .host_flags     = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD,
+       .host_flags     = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD |
+                         IDE_HFLAG_ABUSE_SET_DMA_MODE,
        .pio_mask       = ATA_PIO4,
        .mwdma_mask     = ATA_MWDMA2,
        .udma_mask      = ATA_UDMA4,
index a227c41d23a3110e0efaaec5cebe40ac7718cc2b..ae52a96a1cf9d5770660637ea19d44f9b71bff4b 100644 (file)
@@ -81,8 +81,6 @@ static void triflex_set_mode(ide_drive_t *drive, const u8 speed)
                case XFER_PIO_0:
                        timing = 0x0808;
                        break;
-               default:
-                       return;
        }
 
        triflex_timings &= ~(0xFFFF << (16 * unit));
index a0d3c16b68ec4fdba9d4d54d9a2bcb6e7181860e..4b32c90f489695b212883a868e55b7c3f6b9f948 100644 (file)
@@ -439,6 +439,7 @@ static const struct ide_port_info via82cxxx_chipset __devinitdata = {
        .enablebits     = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
        .host_flags     = IDE_HFLAG_PIO_NO_BLACKLIST |
                          IDE_HFLAG_PIO_NO_DOWNGRADE |
+                         IDE_HFLAG_ABUSE_SET_DMA_MODE |
                          IDE_HFLAG_POST_SET_MODE |
                          IDE_HFLAG_IO_32BIT |
                          IDE_HFLAG_BOOTABLE,
index 4559e29446e9deab3d8164dfba6058ab64272964..3dce80092fff0e32cb539cffc151337f047d4f79 100644 (file)
@@ -828,38 +828,20 @@ static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed)
        tl[0] = *timings;
        tl[1] = *timings2;
 
-       switch(speed) {
 #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
-               case XFER_UDMA_6:
-               case XFER_UDMA_5:
-               case XFER_UDMA_4:
-               case XFER_UDMA_3:
-               case XFER_UDMA_2:
-               case XFER_UDMA_1:
-               case XFER_UDMA_0:
-                       if (pmif->kind == controller_kl_ata4)
-                               ret = set_timings_udma_ata4(&tl[0], speed);
-                       else if (pmif->kind == controller_un_ata6
-                                || pmif->kind == controller_k2_ata6)
-                               ret = set_timings_udma_ata6(&tl[0], &tl[1], speed);
-                       else if (pmif->kind == controller_sh_ata6)
-                               ret = set_timings_udma_shasta(&tl[0], &tl[1], speed);
-                       else
-                               ret = 1;
-                       break;
-               case XFER_MW_DMA_2:
-               case XFER_MW_DMA_1:
-               case XFER_MW_DMA_0:
-                       set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed);
-                       break;
-               case XFER_SW_DMA_2:
-               case XFER_SW_DMA_1:
-               case XFER_SW_DMA_0:
-                       return;
+       if (speed >= XFER_UDMA_0) {
+               if (pmif->kind == controller_kl_ata4)
+                       ret = set_timings_udma_ata4(&tl[0], speed);
+               else if (pmif->kind == controller_un_ata6
+                        || pmif->kind == controller_k2_ata6)
+                       ret = set_timings_udma_ata6(&tl[0], &tl[1], speed);
+               else if (pmif->kind == controller_sh_ata6)
+                       ret = set_timings_udma_shasta(&tl[0], &tl[1], speed);
+               else
+                       ret = -1;
+       } else
+               set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed);
 #endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
-               default:
-                       ret = 1;
-       }
        if (ret)
                return;
 
index 6f5b6b5e9c1d23306b3d0968a564c93a7aff9e6b..1e4409937ec369ce80f1e5e8444149c7350552dd 100644 (file)
@@ -1094,6 +1094,7 @@ enum {
        IDE_HFLAG_IO_32BIT              = (1 << 24),
        /* unmask IRQs */
        IDE_HFLAG_UNMASK_IRQS           = (1 << 25),
+       IDE_HFLAG_ABUSE_SET_DMA_MODE    = (1 << 26),
 };
 
 #ifdef CONFIG_BLK_DEV_OFFBOARD