#define ACE_FIFO_SIZE (32)
#define ACE_BUF_PER_SECTOR (ACE_SECTOR_SIZE / ACE_FIFO_SIZE)
+#define ACE_BUS_WIDTH_8 0
+#define ACE_BUS_WIDTH_16 1
+
struct ace_reg_ops;
struct ace_device {
{
u16 version;
u16 val;
-
int rc;
+ dev_dbg(ace->dev, "ace_setup(ace=0x%p)\n", ace);
+ dev_dbg(ace->dev, "physaddr=0x%lx irq=%i\n", ace->physaddr, ace->irq);
+
spin_lock_init(&ace->lock);
init_completion(&ace->id_completion);
snprintf(ace->gd->disk_name, 32, "xs%c", ace->id + 'a');
/* set bus width */
- if (ace->bus_width == 1) {
+ if (ace->bus_width == ACE_BUS_WIDTH_16) {
/* 0x0101 should work regardless of endianess */
ace_out_le16(ace, ACE_BUSMODE, 0x0101);
static int __devinit ace_probe(struct platform_device *dev)
{
unsigned long physaddr = 0;
- int bus_width = 1; /* FIXME: should not be hard coded */
+ int bus_width = ACE_BUS_WIDTH_16; /* FIXME: should not be hard coded */
int id = dev->id;
int irq = NO_IRQ;
int i;
goto err_blk;
}
+ pr_debug("xsysace: registering platform binding\n");
if ((rc = platform_driver_register(&ace_platform_driver)) != 0)
goto err_plat;