autoconfiguration.
The <autoconf> parameter can appear alone as the value to the `ip'
- parameter (without all the ':' characters before) in which case auto-
- configuration is used.
+ parameter (without all the ':' characters before). If the value is
+ "ip=off" or "ip=none", no autoconfiguration will take place, otherwise
+ autoconfiguration will take place. The most common way to use this
+ is "ip=dhcp".
+
+ Note that "ip=off" is not the same thing as "ip=::::::off", because in
+ the latter autoconfiguration will take place if any of DHCP, BOOTP or RARP
+ are compiled in the kernel.
<client-ip> IP address of the client.
into the kernel will be used, regardless of the value of
this option.
- off or none: don't use autoconfiguration (default)
+ off or none: don't use autoconfiguration
on or any: use any protocol available in the kernel
dhcp: use DHCP
bootp: use BOOTP
bool
config PCI
- bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695
+ bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
depends on PCI && ARCH_SHARK
default y
+config PCI_HOST_ITE8152
+ bool
+ depends on PCI && MACH_ARMCORE
+ default y
+ select DMABOUNCE
+
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
.macro loadsp, rb
.endm
.macro writeb, ch, rb
- mcr p14, 0, \ch, c0, c1, 0
+ mcr p14, 0, \ch, c1, c0, 0
.endm
#endif
{
struct irq_desc *desc;
- printk(KERN_DEBUG "===> %s: irq=%d\n", __FUNCTION__, irq);
-
desc = irq_desc + irq;
desc_handle_irq(irq, desc);
}
int bits_pd, bits_lp, bits_ld;
int i;
- printk(KERN_DEBUG "=> %s: irq = %d\n", __FUNCTION__, irq);
-
while (1) {
/* Read all */
bits_pd = __raw_readl(IT8152_INTC_PDCNIRR);
*/
int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
{
- printk(KERN_DEBUG "%s: %s %llx\n",
- __FUNCTION__, dev->dev.bus_id, mask);
+ dev_dbg(&dev->dev, "%s: %llx\n", __FUNCTION__, mask);
if (mask >= PHYS_OFFSET + SZ_64M - 1)
return 0;
int
pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
{
- printk(KERN_DEBUG "%s: %s %llx\n",
- __FUNCTION__, dev->dev.bus_id, mask);
+ dev_dbg(&dev->dev, "%s: %llx\n", __FUNCTION__, mask);
if (mask >= PHYS_OFFSET + SZ_64M - 1)
return 0;
static void ixp4xx_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
- unsigned long opts, osrt = *IXP4XX_OSRT1 & ~IXP4XX_OST_RELOAD_MASK;
+ unsigned long opts = *IXP4XX_OSRT1 & IXP4XX_OST_RELOAD_MASK;
+ unsigned long osrt = *IXP4XX_OSRT1 & ~IXP4XX_OST_RELOAD_MASK;
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
opts = IXP4XX_OST_ENABLE | IXP4XX_OST_ONE_SHOT;
break;
case CLOCK_EVT_MODE_SHUTDOWN:
+ opts &= ~IXP4XX_OST_ENABLE;
+ break;
+ case CLOCK_EVT_MODE_RESUME:
+ opts |= IXP4XX_OST_ENABLE;
+ break;
case CLOCK_EVT_MODE_UNUSED:
default:
osrt = opts = 0;
break;
- case CLOCK_EVT_MODE_RESUME:
- break;
}
*IXP4XX_OSRT1 = osrt | opts;
{
unsigned int sz = SZ_64M >> PAGE_SHIFT;
- printk(KERN_INFO "Adjusting zones for CM-x270\n");
+ pr_info("Adjusting zones for CM-x270\n");
/*
* Only adjust if > 64M on current system
{
int irq;
- printk(KERN_DEBUG "===> %s: %s slot=%x, pin=%x\n", __FUNCTION__,
- pci_name(dev), slot, pin);
+ dev_dbg(&dev->dev, "%s: slot=%x, pin=%x\n", __FUNCTION__, slot, pin);
irq = it8152_pci_map_irq(dev, slot, pin);
if (irq)
return(0);
}
-static struct pci_bus * __init
-cmx270_pci_scan_bus(int nr, struct pci_sys_data *sys)
+static void cmx270_pci_preinit(void)
{
- printk(KERN_INFO "Initializing CM-X270 PCI subsystem\n");
+ pr_info("Initializing CM-X270 PCI subsystem\n");
__raw_writel(0x800, IT8152_PCI_CFG_ADDR);
if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) {
- printk(KERN_INFO "PCI Bridge found.\n");
+ pr_info("PCI Bridge found.\n");
/* set PCI I/O base at 0 */
writel(0x848, IT8152_PCI_CFG_ADDR);
/* CardBus Controller on ATXbase baseboard */
writel(0x4000, IT8152_PCI_CFG_ADDR);
if (readl(IT8152_PCI_CFG_DATA) == 0xAC51104C) {
- printk(KERN_INFO "CardBus Bridge found.\n");
+ pr_info("CardBus Bridge found.\n");
/* Configure socket 0 */
writel(0x408C, IT8152_PCI_CFG_ADDR);
writel(0xb0000000, IT8152_PCI_CFG_DATA);
}
}
- return it8152_pci_scan_bus(nr, sys);
}
static struct hw_pci cmx270_pci __initdata = {
.map_irq = cmx270_pci_map_irq,
.nr_controllers = 1,
.setup = it8152_pci_setup,
- .scan = cmx270_pci_scan_bus,
+ .scan = it8152_pci_scan_bus,
+ .preinit = cmx270_pci_preinit,
};
static int __init cmx270_init_pci(void)
bool "4G Systems MTX-1 board"
select DMA_NONCOHERENT
select HW_HAS_PCI
- select RESOURCES_64BIT if PCI
select SOC_AU1500
select SYS_SUPPORTS_LITTLE_ENDIAN
select SOC_AU1000
select DMA_NONCOHERENT
select HW_HAS_PCI
- select RESOURCES_64BIT if PCI
select SYS_SUPPORTS_LITTLE_ENDIAN
config MIPS_DB1100
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_DISABLE_OBSOLETE_IDE
- select RESOURCES_64BIT if PCI
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select HW_HAS_PCI
select DMA_NONCOHERENT
select MIPS_DISABLE_OBSOLETE_IDE
- select RESOURCES_64BIT if PCI
select SYS_SUPPORTS_LITTLE_ENDIAN
config MIPS_MIRAGE
select SOC_AU1000
select DMA_NONCOHERENT
select HW_HAS_PCI
- select RESOURCES_64BIT if PCI
select SWAP_IO_SPACE
select SYS_SUPPORTS_LITTLE_ENDIAN
select SOC_AU1100
select DMA_NONCOHERENT
select HW_HAS_PCI
- select RESOURCES_64BIT if PCI
select SWAP_IO_SPACE
select SYS_SUPPORTS_LITTLE_ENDIAN
select SOC_AU1200
select DMA_NONCOHERENT
select MIPS_DISABLE_OBSOLETE_IDE
- select RESOURCES_64BIT if PCI
select SYS_SUPPORTS_LITTLE_ENDIAN
config MIPS_PB1500
select SOC_AU1500
select DMA_NONCOHERENT
select HW_HAS_PCI
- select RESOURCES_64BIT if PCI
select SYS_SUPPORTS_LITTLE_ENDIAN
config MIPS_PB1550
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_DISABLE_OBSOLETE_IDE
- select RESOURCES_64BIT if PCI
select SYS_SUPPORTS_LITTLE_ENDIAN
config MIPS_XXS1500
/* TBD */
static struct resource pci_io_resource = {
- .start = (resource_size_t)PCI_IO_START,
- .end = (resource_size_t)PCI_IO_END,
+ .start = PCI_IO_START,
+ .end = PCI_IO_END,
.name = "PCI IO space",
.flags = IORESOURCE_IO
};
static struct resource pci_mem_resource = {
- .start = (resource_size_t)PCI_MEM_START,
- .end = (resource_size_t)PCI_MEM_END,
+ .start = PCI_MEM_START,
+ .end = PCI_MEM_END,
.name = "PCI memory space",
.flags = IORESOURCE_MEM
};
#ifdef CONFIG_PCI
{
- u32 start, end;
+ u32 start = (u32)Au1500_PCI_MEM_START;
+ u32 end = (u32)Au1500_PCI_MEM_END;
- start = (u32)Au1500_PCI_MEM_START;
- end = (u32)Au1500_PCI_MEM_END;
- /* check for pci memory window */
- if ((phys_addr >= start) && ((phys_addr + size) < end))
+ /* Check for PCI memory window */
+ if (phys_addr >= start && (phys_addr + size - 1) <= end)
return (phys_t)
((phys_addr - start) + Au1500_PCI_MEM_START);
}
void __init plat_time_init(void)
{
+ u32 start, end;
+ int i = HZ / 10;
+
setup_pit_timer();
gt641xx_set_base_clock(GT641XX_BASE_CLOCK);
- mips_timer_state = gt641xx_timer0_state;
+ /*
+ * MIPS counter frequency is measured during a 100msec interval
+ * using GT64111 timer0.
+ */
+ while (!gt641xx_timer0_state())
+ ;
+
+ start = read_c0_count();
+
+ while (i--)
+ while (!gt641xx_timer0_state())
+ ;
+
+ end = read_c0_count();
+
+ mips_hpt_frequency = (end - start) * 10;
+ printk(KERN_INFO "MIPS counter frequency %dHz\n", mips_hpt_frequency);
}
unsigned long status;
/* New thread loses kernel privileges. */
- status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|KU_MASK);
+ status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
#ifdef CONFIG_64BIT
- status &= ~ST0_FR;
status |= test_thread_flag(TIF_32BIT_REGS) ? 0 : ST0_FR;
#endif
status |= KU_USER;
cd->mult = (u32) temp;
}
-void __init __weak plat_time_init(void)
-{
-}
-
/*
* This function exists in order to cause an error due to a duplicate
* definition if platform code should have its own implementation. The hook
#endif
if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
status_set |= ST0_XX;
+ if (cpu_has_dsp)
+ status_set |= ST0_MX;
+
change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
status_set);
- if (cpu_has_dsp)
- set_c0_status(ST0_MX);
-
#ifdef CONFIG_CPU_MIPSR2
if (cpu_has_mips_r2) {
unsigned int enable = 0x0000000f;
void __init prom_free_prom_memory(void)
{
+#if 0 /* for now ... */
unsigned long addr;
int i;
free_init_pages("prom memory",
addr, addr + boot_mem_map.map[i].size);
}
+#endif
}
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
if (!dev->resource[i].start)
continue;
+ if (dev->resource[i].flags & IORESOURCE_PCI_FIXED)
+ continue;
if (dev->resource[i].flags & IORESOURCE_IO)
offset = hose->io_offset;
else if (dev->resource[i].flags & IORESOURCE_MEM)
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24-rc4
-# Thu Dec 6 16:48:30 2007
+# Linux kernel version: 2.6.24-rc5
+# Thu Dec 13 22:40:57 2007
#
# CONFIG_PPC64 is not set
CONFIG_FS_ENET=y
# CONFIG_FS_ENET_HAS_SCC is not set
CONFIG_FS_ENET_HAS_FCC=y
-# CONFIG_FS_ENET_MDIO_FCC is not set
+CONFIG_FS_ENET_MDIO_FCC=y
CONFIG_NETDEV_1000=y
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24-rc4
-# Thu Dec 6 16:49:09 2007
+# Linux kernel version: 2.6.24-rc5
+# Thu Dec 13 22:39:18 2007
#
# CONFIG_PPC64 is not set
CONFIG_FS_ENET=y
# CONFIG_FS_ENET_HAS_SCC is not set
CONFIG_FS_ENET_HAS_FCC=y
-# CONFIG_FS_ENET_MDIO_FCC is not set
+CONFIG_FS_ENET_MDIO_FCC=y
CONFIG_NETDEV_1000=y
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
CONFIG_PS3_USE_LPAR_ADDR=y
CONFIG_PS3_VUART=y
CONFIG_PS3_PS3AV=y
-CONFIG_PS3_SYS_MANAGER=m
+CONFIG_PS3_SYS_MANAGER=y
CONFIG_PS3_STORAGE=y
CONFIG_PS3_DISK=y
CONFIG_PS3_ROM=y
#include <asm/signal.h>
#include <asm/dcr.h>
-#ifdef CONFIG_8xx
-#include <asm/commproc.h>
-#endif
-
#ifdef CONFIG_PPC64
EXPORT_SYMBOL(local_irq_restore);
#endif
EXPORT_SYMBOL(cacheable_memcpy);
#endif
-#ifdef CONFIG_8xx
-EXPORT_SYMBOL(cpm_install_handler);
-EXPORT_SYMBOL(cpm_free_handler);
-#endif /* CONFIG_8xx */
-#if defined(CONFIG_8xx)
-EXPORT_SYMBOL(__res);
-#endif
-
#ifdef CONFIG_PPC32
EXPORT_SYMBOL(next_mmu_context);
EXPORT_SYMBOL(set_context);
else \
{ \
X##_f0 = (X##_f1 >> ((N) - _FP_W_TYPE_SIZE) | \
- (((X##_f1 << (sz - (N))) | X##_f0) != 0)); \
+ (((X##_f1 << (2 * _FP_W_TYPE_SIZE - (N))) | \
+ X##_f0) != 0)); \
X##_f1 = 0; \
} \
} while (0)
{
struct HvLpEvent * event;
+ restart:
/* If we have recursed, just return */
if (!spin_trylock(&hvlpevent_queue.hq_lock))
return;
if (event->xType < HvLpEvent_Type_NumTypes &&
lpEventHandler[event->xType])
lpEventHandler[event->xType](event);
- else
- printk(KERN_INFO "Unexpected Lp Event type=%d\n", event->xType );
+ else {
+ u8 type = event->xType;
+
+ /*
+ * Don't printk in the spinlock as printk
+ * may require ack events form the HV to send
+ * any characters there.
+ */
+ hvlpevent_clear_valid(event);
+ spin_unlock(&hvlpevent_queue.hq_lock);
+ printk(KERN_INFO
+ "Unexpected Lp Event type=%d\n", type);
+ goto restart;
+ }
hvlpevent_clear_valid(event);
} else if (hvlpevent_queue.hq_overflow_pending)
depends on PPC_PS3
tristate "PS3 System Manager driver" if PS3_ADVANCED
select PS3_VUART
- default m
+ default y
help
Include support for the PS3 System Manager.
of space for CPM as it is larger
than on PQ2 */
-void
-cpm2_reset(void)
+void __init cpm2_reset(void)
{
#ifdef CONFIG_PPC_85xx
cpm2_immr = ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
retl
nop
.size sun4v_mmustat_info, .-sun4v_mmustat_info
+
+ .globl sun4v_mmu_demap_all
+ .type sun4v_mmu_demap_all,#function
+sun4v_mmu_demap_all:
+ clr %o0
+ clr %o1
+ mov HV_MMU_ALL, %o2
+ mov HV_FAST_MMU_DEMAP_ALL, %o5
+ ta HV_FAST_TRAP
+ retl
+ nop
+ .size sun4v_mmu_demap_all, .-sun4v_mmu_demap_all
}
}
-static void __init kernel_physical_mapping_init(void)
+static void __init init_kpte_bitmap(void)
{
unsigned long i;
-#ifdef CONFIG_DEBUG_PAGEALLOC
- unsigned long mem_alloced = 0UL;
-#endif
-
- read_obp_memory("reg", &pall[0], &pall_ents);
for (i = 0; i < pall_ents; i++) {
unsigned long phys_start, phys_end;
phys_end = phys_start + pall[i].reg_size;
mark_kpte_bitmap(phys_start, phys_end);
+ }
+}
+static void __init kernel_physical_mapping_init(void)
+{
#ifdef CONFIG_DEBUG_PAGEALLOC
+ unsigned long i, mem_alloced = 0UL;
+
+ for (i = 0; i < pall_ents; i++) {
+ unsigned long phys_start, phys_end;
+
+ phys_start = pall[i].phys_addr;
+ phys_end = phys_start + pall[i].reg_size;
+
mem_alloced += kernel_map_range(phys_start, phys_end,
PAGE_KERNEL);
-#endif
}
-#ifdef CONFIG_DEBUG_PAGEALLOC
printk("Allocated %ld bytes for kernel page tables.\n",
mem_alloced);
inherit_prom_mappings();
+ read_obp_memory("reg", &pall[0], &pall_ents);
+
+ init_kpte_bitmap();
+
/* Ok, we can use our TLB miss and window trap handlers safely. */
setup_tba();
"wrpr %0, %1, %%pstate"
: "=r" (pstate)
: "i" (PSTATE_IE));
- if (tlb_type == spitfire) {
+ if (tlb_type == hypervisor) {
+ sun4v_mmu_demap_all();
+ } else if (tlb_type == spitfire) {
for (i = 0; i < 64; i++) {
/* Spitfire Errata #32 workaround */
/* NOTE: Always runs on spitfire, so no
return POWER_SUPPLY_TECHNOLOGY_NiMH;
if (!strcasecmp("LION", battery->type))
return POWER_SUPPLY_TECHNOLOGY_LION;
- if (!strcasecmp("LI-ION", battery->type))
+ if (!strncasecmp("LI-ION", battery->type, 6))
return POWER_SUPPLY_TECHNOLOGY_LION;
if (!strcasecmp("LiP", battery->type))
return POWER_SUPPLY_TECHNOLOGY_LIPO;
static nodemask_t nodes_found_map = NODE_MASK_NONE;
/* maps to convert between proximity domain and logical node ID */
-static int __cpuinitdata pxm_to_node_map[MAX_PXM_DOMAINS]
+static int pxm_to_node_map[MAX_PXM_DOMAINS]
= { [0 ... MAX_PXM_DOMAINS - 1] = NID_INVAL };
-static int __cpuinitdata node_to_pxm_map[MAX_NUMNODES]
+static int node_to_pxm_map[MAX_NUMNODES]
= { [0 ... MAX_NUMNODES - 1] = PXM_INVAL };
int pxm_to_node(int pxm)
acpi_get_data(device->handle, acpi_pci_data_handler,
(void **)&data);
if (ACPI_FAILURE(status)) {
- ACPI_EXCEPTION((AE_INFO, status,
- "Unable to get data from device %s",
- acpi_device_bid(device)));
result = -ENODEV;
goto end;
}
#define ACPI_BATTERY_DIR_NAME "BAT%i"
#define ACPI_AC_DIR_NAME "AC0"
-enum acpi_sbs_device_addr {
- ACPI_SBS_CHARGER = 0x9,
- ACPI_SBS_MANAGER = 0xa,
- ACPI_SBS_BATTERY = 0xb,
-};
-
#define ACPI_SBS_NOTIFY_STATUS 0x80
#define ACPI_SBS_NOTIFY_INFO 0x81
static inline char *acpi_battery_units(struct acpi_battery *battery)
{
- return acpi_battery_mode(battery) ? " mWh" : " mAh";
+ return acpi_battery_mode(battery) ? " mW" : " mA";
}
if (!battery->present)
goto end;
- seq_printf(seq, "design capacity: %i%s\n",
+ seq_printf(seq, "design capacity: %i%sh\n",
battery->design_capacity * acpi_battery_scale(battery),
acpi_battery_units(battery));
- seq_printf(seq, "last full capacity: %i%s\n",
+ seq_printf(seq, "last full capacity: %i%sh\n",
battery->full_charge_capacity * acpi_battery_scale(battery),
acpi_battery_units(battery));
seq_printf(seq, "battery technology: rechargeable\n");
{
struct acpi_battery *battery = seq->private;
struct acpi_sbs *sbs = battery->sbs;
- int result = 0;
+ int rate;
mutex_lock(&sbs->lock);
seq_printf(seq, "present: %s\n",
seq_printf(seq, "charging state: %s\n",
(battery->current_now < 0) ? "discharging" :
((battery->current_now > 0) ? "charging" : "charged"));
- seq_printf(seq, "present rate: %d mA\n",
- abs(battery->current_now) * acpi_battery_ipscale(battery));
- seq_printf(seq, "remaining capacity: %i%s\n",
+ rate = abs(battery->current_now) * acpi_battery_ipscale(battery);
+ rate *= (acpi_battery_mode(battery))?(battery->voltage_now *
+ acpi_battery_vscale(battery)/1000):1;
+ seq_printf(seq, "present rate: %d%s\n", rate,
+ acpi_battery_units(battery));
+ seq_printf(seq, "remaining capacity: %i%sh\n",
battery->capacity_now * acpi_battery_scale(battery),
acpi_battery_units(battery));
seq_printf(seq, "present voltage: %i mV\n",
end:
mutex_unlock(&sbs->lock);
- return result;
+ return 0;
}
static int acpi_battery_state_open_fs(struct inode *inode, struct file *file)
acpi_battery_get_alarm(battery);
seq_printf(seq, "alarm: ");
if (battery->alarm_capacity)
- seq_printf(seq, "%i%s\n",
+ seq_printf(seq, "%i%sh\n",
battery->alarm_capacity *
acpi_battery_scale(battery),
acpi_battery_units(battery));
EXPORT_SYMBOL_GPL(acpi_smbus_unregister_callback);
-static void acpi_smbus_callback(void *context)
+static inline void acpi_smbus_callback(void *context)
{
struct acpi_smb_hc *hc = context;
-
if (hc->callback)
hc->callback(hc->context);
}
{
struct acpi_smb_hc *hc = context;
union acpi_smb_status status;
+ u8 address;
if (smb_hc_read(hc, ACPI_SMB_STATUS, &status.raw))
return 0;
/* Check if it is only a completion notify */
if (!status.fields.alarm)
return 0;
mutex_lock(&hc->lock);
+ smb_hc_read(hc, ACPI_SMB_ALARM_ADDRESS, &address);
+ status.fields.alarm = 0;
smb_hc_write(hc, ACPI_SMB_STATUS, status.raw);
- if (hc->callback)
- acpi_os_execute(OSL_GPE_HANDLER, acpi_smbus_callback, hc);
+ /* We are only interested in events coming from known devices */
+ switch (address >> 1) {
+ case ACPI_SBS_CHARGER:
+ case ACPI_SBS_MANAGER:
+ case ACPI_SBS_BATTERY:
+ acpi_os_execute(OSL_GPE_HANDLER,
+ acpi_smbus_callback, hc);
+ default:;
+ }
mutex_unlock(&hc->lock);
return 0;
}
static const u8 SMBUS_PEC = 0x80;
+enum acpi_sbs_device_addr {
+ ACPI_SBS_CHARGER = 0x9,
+ ACPI_SBS_MANAGER = 0xa,
+ ACPI_SBS_BATTERY = 0xb,
+};
+
typedef void (*smbus_alarm_callback)(void *context);
extern int acpi_smbus_read(struct acpi_smb_hc *hc, u8 protocol, u8 address,
struct acpi_video_device_brightness *br = NULL;
- memset(&device->cap, 0, 4);
+ memset(&device->cap, 0, sizeof(device->cap));
if (ACPI_SUCCESS(acpi_get_handle(device->dev->handle, "_ADR", &h_dummy1))) {
device->cap._ADR = 1;
{
acpi_handle h_dummy1;
- memset(&video->cap, 0, 4);
+ memset(&video->cap, 0, sizeof(video->cap));
if (ACPI_SUCCESS(acpi_get_handle(video->device->handle, "_DOS", &h_dummy1))) {
video->cap._DOS = 1;
}
return 0;
}
-
+#ifdef CONFIG_ATM_FORE200E_PCA
static int __devinit
fore200e_pca_detect(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
{
}
-#ifdef CONFIG_ATM_FORE200E_PCA
static struct pci_device_id fore200e_pca_tbl[] = {
{ PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
0, 0, (unsigned long) &fore200e_bus[0] },
return 0;
case WDIOC_SET_PRETIMEOUT:
+ case WDIOC_SETPRETIMEOUT:
i = copy_from_user(&val, argp, sizeof(int));
if (i)
return -EFAULT;
return ipmi_set_timeout(IPMI_SET_TIMEOUT_HB_IF_NECESSARY);
case WDIOC_GET_PRETIMEOUT:
+ case WDIOC_GETPRETIMEOUT:
i = copy_to_user(argp, &pretimeout, sizeof(pretimeout));
if (i)
return -EFAULT;
# TODO: split it on per host driver config options (or module parameters)
config BLK_DEV_OFFBOARD
- bool "Boot off-board chipsets first support"
+ bool "Boot off-board chipsets first support (DEPRECATED)"
depends on BLK_DEV_IDEPCI && (BLK_DEV_AEC62XX || BLK_DEV_GENERIC || BLK_DEV_HPT34X || BLK_DEV_HPT366 || BLK_DEV_PDC202XX_NEW || BLK_DEV_PDC202XX_OLD || BLK_DEV_TC86C001)
help
Normally, IDE controllers built into the motherboard (on-board
Note that, if you do this, the order of the hd* devices will be
rearranged which may require modification of fstab and other files.
+ Please also note that this method of assuring stable naming of
+ IDE devices is unreliable and use other means for achieving it
+ (i.e. udev).
+
If in doubt, say N.
config BLK_DEV_GENERIC
return 1;
}
-static void post_transform_command(struct request *req)
-{
- u8 *c = req->cmd;
- char *ibuf;
-
- if (!blk_pc_request(req))
- return;
-
- if (req->bio)
- ibuf = bio_data(req->bio);
- else
- ibuf = req->data;
-
- if (!ibuf)
- return;
-
- /*
- * set ansi-revision and response data as atapi
- */
- if (c[0] == GPCMD_INQUIRY) {
- ibuf[2] |= 2;
- ibuf[3] = (ibuf[3] & 0xf0) | 2;
- }
-}
-
typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
/*
return ide_started;
end_request:
- if (!rq->data_len)
- post_transform_command(rq);
-
spin_lock_irqsave(&ide_lock, flags);
blkdev_dequeue_request(rq);
end_that_request_last(rq, 1);
else
printk(" drive");
- printk(", %dkB Cache", be16_to_cpu(cap.buffer_size));
-
- if (drive->using_dma)
- ide_dma_verbose(drive);
-
- printk("\n");
+ printk(KERN_CONT ", %dkB Cache\n", be16_to_cpu(cap.buffer_size));
return nslots;
}
* and Andre Hedrick <andre@linux-ide.org>
*
* This is the IDE/ATA disk driver, as evolved from hd.c and ide.c.
- *
- * Version 1.00 move disk only code from ide.c to ide-disk.c
- * support optional byte-swapping of all data
- * Version 1.01 fix previous byte-swapping code
- * Version 1.02 remove ", LBA" from drive identification msgs
- * Version 1.03 fix display of id->buf_size for big-endian
- * Version 1.04 add /proc configurable settings and S.M.A.R.T support
- * Version 1.05 add capacity support for ATA3 >= 8GB
- * Version 1.06 get boot-up messages to show full cyl count
- * Version 1.07 disable door-locking if it fails
- * Version 1.08 fixed CHS/LBA translations for ATA4 > 8GB,
- * process of adding new ATA4 compliance.
- * fixed problems in allowing fdisk to see
- * the entire disk.
- * Version 1.09 added increment of rq->sector in ide_multwrite
- * added UDMA 3/4 reporting
- * Version 1.10 request queue changes, Ultra DMA 100
- * Version 1.11 added 48-bit lba
- * Version 1.12 adding taskfile io access method
- * Version 1.13 added standby and flush-cache for notifier
- * Version 1.14 added acoustic-wcache
- * Version 1.15 convert all calls to ide_raw_taskfile
- * since args will return register content.
- * Version 1.16 added suspend-resume-checkpower
- * Version 1.17 do flush on standby, do flush on ATA < ATA6
- * fix wcache setup.
*/
#define IDEDISK_VERSION "1.18"
if (id->buf_size)
printk (" w/%dKiB Cache", id->buf_size/2);
- printk(", CHS=%d/%d/%d",
- drive->bios_cyl, drive->bios_head, drive->bios_sect);
- if (drive->using_dma)
- ide_dma_verbose(drive);
- printk("\n");
+ printk(KERN_CONT ", CHS=%d/%d/%d\n",
+ drive->bios_cyl, drive->bios_head, drive->bios_sect);
/* write cache enabled? */
if ((id->csfo & 1) || (id->cfs_enable_1 & (1 << 5)))
ide_hwif_t *hwif = HWIF(drive);
u8 dma_stat = hwif->INB(hwif->dma_status);
-#if 0 /* do not set unless you know what you are doing */
- if (dma_stat & 4) {
- u8 stat = hwif->INB(IDE_STATUS_REG);
- hwif->OUTB(hwif->dma_status, dma_stat & 0xE4);
- }
-#endif
/* return 1 if INTR asserted */
if ((dma_stat & 4) == 4)
return 1;
mode = XFER_MW_DMA_1;
}
- printk(KERN_DEBUG "%s: %s mode selected\n", drive->name,
+ mode = min(mode, req_mode);
+
+ printk(KERN_INFO "%s: %s mode selected\n", drive->name,
mode ? ide_xfer_verbose(mode) : "no DMA");
- return min(mode, req_mode);
+ return mode;
}
EXPORT_SYMBOL_GPL(ide_find_dma_mode);
if (__ide_dma_bad_drive(drive))
return 0;
+ if (ide_id_dma_bug(drive))
+ return 0;
+
if (drive->hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
return config_drive_for_dma(drive);
return vdma ? 0 : -1;
}
-void ide_dma_verbose(ide_drive_t *drive)
+int ide_id_dma_bug(ide_drive_t *drive)
{
- struct hd_driveid *id = drive->id;
- ide_hwif_t *hwif = HWIF(drive);
+ struct hd_driveid *id = drive->id;
if (id->field_valid & 4) {
if ((id->dma_ultra >> 8) && (id->dma_mword >> 8))
- goto bug_dma_off;
- if (id->dma_ultra & ((id->dma_ultra >> 8) & hwif->ultra_mask)) {
- if (((id->dma_ultra >> 11) & 0x1F) &&
- eighty_ninty_three(drive)) {
- if ((id->dma_ultra >> 15) & 1) {
- printk(", UDMA(mode 7)");
- } else if ((id->dma_ultra >> 14) & 1) {
- printk(", UDMA(133)");
- } else if ((id->dma_ultra >> 13) & 1) {
- printk(", UDMA(100)");
- } else if ((id->dma_ultra >> 12) & 1) {
- printk(", UDMA(66)");
- } else if ((id->dma_ultra >> 11) & 1) {
- printk(", UDMA(44)");
- } else
- goto mode_two;
- } else {
- mode_two:
- if ((id->dma_ultra >> 10) & 1) {
- printk(", UDMA(33)");
- } else if ((id->dma_ultra >> 9) & 1) {
- printk(", UDMA(25)");
- } else if ((id->dma_ultra >> 8) & 1) {
- printk(", UDMA(16)");
- }
- }
- } else {
- printk(", (U)DMA"); /* Can be BIOS-enabled! */
- }
+ goto err_out;
} else if (id->field_valid & 2) {
if ((id->dma_mword >> 8) && (id->dma_1word >> 8))
- goto bug_dma_off;
- printk(", DMA");
- } else if (id->field_valid & 1) {
- goto bug_dma_off;
+ goto err_out;
}
- return;
-bug_dma_off:
- printk(", BUG DMA OFF");
- hwif->dma_off_quietly(drive);
- return;
+ return 0;
+err_out:
+ printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
+ return 1;
}
-EXPORT_SYMBOL(ide_dma_verbose);
-
int ide_set_dma(ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
if (rc)
printk(KERN_WARNING "%s: bus not ready on wakeup\n", drive->name);
SELECT_DRIVE(drive);
- HWIF(drive)->OUTB(8, HWIF(drive)->io_ports[IDE_CONTROL_OFFSET]);
+ if (IDE_CONTROL_REG)
+ HWIF(drive)->OUTB(drive->ctl, IDE_CONTROL_REG);
rc = ide_wait_not_busy(HWIF(drive), 100000);
if (rc)
printk(KERN_WARNING "%s: drive not ready on wakeup\n", drive->name);
drive->id->dma_1word = id->dma_1word;
/* anything more ? */
kfree(id);
+
+ if (drive->using_dma && ide_id_dma_bug(drive))
+ ide_dma_off(drive);
}
return 1;
* Add common non I/O op stuff here. Make sure it has proper
* kernel-doc function headers or your patch will be rejected
*/
-
+
+static const char *udma_str[] =
+ { "UDMA/16", "UDMA/25", "UDMA/33", "UDMA/44",
+ "UDMA/66", "UDMA/100", "UDMA/133", "UDMA7" };
+static const char *mwdma_str[] =
+ { "MWDMA0", "MWDMA1", "MWDMA2" };
+static const char *swdma_str[] =
+ { "SWDMA0", "SWDMA1", "SWDMA2" };
+static const char *pio_str[] =
+ { "PIO0", "PIO1", "PIO2", "PIO3", "PIO4", "PIO5" };
/**
* ide_xfer_verbose - return IDE mode names
- * @xfer_rate: rate to name
+ * @mode: transfer mode
*
* Returns a constant string giving the name of the mode
* requested.
*/
-char *ide_xfer_verbose (u8 xfer_rate)
+const char *ide_xfer_verbose(u8 mode)
{
- switch(xfer_rate) {
- case XFER_UDMA_7: return("UDMA 7");
- case XFER_UDMA_6: return("UDMA 6");
- case XFER_UDMA_5: return("UDMA 5");
- case XFER_UDMA_4: return("UDMA 4");
- case XFER_UDMA_3: return("UDMA 3");
- case XFER_UDMA_2: return("UDMA 2");
- case XFER_UDMA_1: return("UDMA 1");
- case XFER_UDMA_0: return("UDMA 0");
- case XFER_MW_DMA_2: return("MW DMA 2");
- case XFER_MW_DMA_1: return("MW DMA 1");
- case XFER_MW_DMA_0: return("MW DMA 0");
- case XFER_SW_DMA_2: return("SW DMA 2");
- case XFER_SW_DMA_1: return("SW DMA 1");
- case XFER_SW_DMA_0: return("SW DMA 0");
- case XFER_PIO_4: return("PIO 4");
- case XFER_PIO_3: return("PIO 3");
- case XFER_PIO_2: return("PIO 2");
- case XFER_PIO_1: return("PIO 1");
- case XFER_PIO_0: return("PIO 0");
- case XFER_PIO_SLOW: return("PIO SLOW");
- default: return("XFER ERROR");
- }
+ const char *s;
+ u8 i = mode & 0xf;
+
+ if (mode >= XFER_UDMA_0 && mode <= XFER_UDMA_7)
+ s = udma_str[i];
+ else if (mode >= XFER_MW_DMA_0 && mode <= XFER_MW_DMA_2)
+ s = mwdma_str[i];
+ else if (mode >= XFER_SW_DMA_0 && mode <= XFER_SW_DMA_2)
+ s = swdma_str[i];
+ else if (mode >= XFER_PIO_0 && mode <= XFER_PIO_5)
+ s = pio_str[i & 0x7];
+ else if (mode == XFER_PIO_SLOW)
+ s = "PIO SLOW";
+ else
+ s = "XFER ERROR";
+
+ return s;
}
EXPORT_SYMBOL(ide_xfer_verbose);
*
* This is the IDE probe module, as evolved from hd.c and ide.c.
*
- * Version 1.00 move drive probing code from ide.c to ide-probe.c
- * Version 1.01 fix compilation problem for m68k
- * Version 1.02 increase WAIT_PIDENTIFY to avoid CD-ROM locking at boot
- * by Andrea Arcangeli
- * Version 1.03 fix for (hwif->chipset == ide_4drives)
- * Version 1.04 fixed buggy treatments of known flash memory cards
- *
- * Version 1.05 fix for (hwif->chipset == ide_pdc4030)
- * added ide6/7/8/9
- * allowed for secondary flash card to be detectable
- * with new flag : drive->ata_flash : 1;
- * Version 1.06 stream line request queue and prep for cascade project.
- * Version 1.07 max_sect <= 255; slower disks would get behind and
- * then fall over when they get to 256. Paul G.
- * Version 1.10 Update set for new IDE. drive->id is now always
- * valid after probe time even with noprobe
+ * -- increase WAIT_PIDENTIFY to avoid CD-ROM locking at boot
+ * by Andrea Arcangeli
*/
#include <linux/module.h>
/* Ignore disks that we will not probe for later. */
if (!drive->noprobe || drive->present) {
SELECT_DRIVE(drive);
- hwif->OUTB(8, hwif->io_ports[IDE_CONTROL_OFFSET]);
+ if (IDE_CONTROL_REG)
+ hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
mdelay(2);
rc = ide_wait_not_busy(hwif, 35000);
if (rc)
if (arg < 0 || arg > 1 + (SUPPORT_VLB_SYNC << 1))
return -EINVAL;
+ if (ide_spin_wait_hwgroup(drive))
+ return -EBUSY;
+
drive->io_32bit = arg;
#ifdef CONFIG_BLK_DEV_DTC2278
if (HWIF(drive)->chipset == ide_dtc2278)
HWIF(drive)->drives[!drive->select.b.unit].io_32bit = arg;
#endif /* CONFIG_BLK_DEV_DTC2278 */
+
+ spin_unlock_irq(&ide_lock);
+
return 0;
}
return sprintf(buf, "ide:m-%s\n", media_string(drive));
}
+static ssize_t model_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ ide_drive_t *drive = to_ide_device(dev);
+ return sprintf(buf, "%s\n", drive->id->model);
+}
+
+static ssize_t firmware_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ ide_drive_t *drive = to_ide_device(dev);
+ return sprintf(buf, "%s\n", drive->id->fw_rev);
+}
+
+static ssize_t serial_show(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ ide_drive_t *drive = to_ide_device(dev);
+ return sprintf(buf, "%s\n", drive->id->serial_no);
+}
+
static struct device_attribute ide_dev_attrs[] = {
__ATTR_RO(media),
__ATTR_RO(drivename),
__ATTR_RO(modalias),
+ __ATTR_RO(model),
+ __ATTR_RO(firmware),
+ __ATTR(serial, 0400, serial_show, NULL),
__ATTR_NULL
};
/*
- * linux/drivers/ide/pci/hpt366.c Version 1.21 Oct 23, 2007
+ * linux/drivers/ide/pci/hpt366.c Version 1.22 Dec 4, 2007
*
* Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
* Portions Copyright (C) 2001 Sun Microsystems, Inc.
/* XFER_PIO_0 */ 0xc0d08585
};
+#if 0
+/* These are the timing tables from the HighPoint open source drivers... */
static u32 thirty_three_base_hpt37x[] = {
/* XFER_UDMA_6 */ 0x12446231, /* 0x12646231 ?? */
/* XFER_UDMA_5 */ 0x12446231,
/* XFER_PIO_1 */ 0x0d029d26,
/* XFER_PIO_0 */ 0x0d029d5e
};
+#else
+/*
+ * The following are the new timing tables with PIO mode data/taskfile transfer
+ * overclocking fixed...
+ */
+
+/* This table is taken from the HPT370 data manual rev. 1.02 */
+static u32 thirty_three_base_hpt37x[] = {
+ /* XFER_UDMA_6 */ 0x16455031, /* 0x16655031 ?? */
+ /* XFER_UDMA_5 */ 0x16455031,
+ /* XFER_UDMA_4 */ 0x16455031,
+ /* XFER_UDMA_3 */ 0x166d5031,
+ /* XFER_UDMA_2 */ 0x16495031,
+ /* XFER_UDMA_1 */ 0x164d5033,
+ /* XFER_UDMA_0 */ 0x16515097,
+
+ /* XFER_MW_DMA_2 */ 0x26515031,
+ /* XFER_MW_DMA_1 */ 0x26515033,
+ /* XFER_MW_DMA_0 */ 0x26515097,
+
+ /* XFER_PIO_4 */ 0x06515021,
+ /* XFER_PIO_3 */ 0x06515022,
+ /* XFER_PIO_2 */ 0x06515033,
+ /* XFER_PIO_1 */ 0x06915065,
+ /* XFER_PIO_0 */ 0x06d1508a
+};
+
+static u32 fifty_base_hpt37x[] = {
+ /* XFER_UDMA_6 */ 0x1a861842,
+ /* XFER_UDMA_5 */ 0x1a861842,
+ /* XFER_UDMA_4 */ 0x1aae1842,
+ /* XFER_UDMA_3 */ 0x1a8e1842,
+ /* XFER_UDMA_2 */ 0x1a0e1842,
+ /* XFER_UDMA_1 */ 0x1a161854,
+ /* XFER_UDMA_0 */ 0x1a1a18ea,
+
+ /* XFER_MW_DMA_2 */ 0x2a821842,
+ /* XFER_MW_DMA_1 */ 0x2a821854,
+ /* XFER_MW_DMA_0 */ 0x2a8218ea,
+
+ /* XFER_PIO_4 */ 0x0a821842,
+ /* XFER_PIO_3 */ 0x0a821843,
+ /* XFER_PIO_2 */ 0x0a821855,
+ /* XFER_PIO_1 */ 0x0ac218a8,
+ /* XFER_PIO_0 */ 0x0b02190c
+};
+
+static u32 sixty_six_base_hpt37x[] = {
+ /* XFER_UDMA_6 */ 0x1c86fe62,
+ /* XFER_UDMA_5 */ 0x1caefe62, /* 0x1c8afe62 */
+ /* XFER_UDMA_4 */ 0x1c8afe62,
+ /* XFER_UDMA_3 */ 0x1c8efe62,
+ /* XFER_UDMA_2 */ 0x1c92fe62,
+ /* XFER_UDMA_1 */ 0x1c9afe62,
+ /* XFER_UDMA_0 */ 0x1c82fe62,
+
+ /* XFER_MW_DMA_2 */ 0x2c82fe62,
+ /* XFER_MW_DMA_1 */ 0x2c82fe66,
+ /* XFER_MW_DMA_0 */ 0x2c82ff2e,
+
+ /* XFER_PIO_4 */ 0x0c82fe62,
+ /* XFER_PIO_3 */ 0x0c82fe84,
+ /* XFER_PIO_2 */ 0x0c82fea6,
+ /* XFER_PIO_1 */ 0x0d02ff26,
+ /* XFER_PIO_0 */ 0x0d42ff7f
+};
+#endif
#define HPT366_DEBUG_DRIVE_INFO 0
#define HPT371_ALLOW_ATA133_6 1
{
struct pci_dev *dev2;
- dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 2,
+ dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 1,
PCI_FUNC(dev->devfn)));
+
if (dev2 &&
dev2->vendor == dev->vendor &&
dev2->device == dev->device) {
/*
* Module interfaces
*/
-
+
static int pre_init = 1; /* Before first ordered IDE scan */
static LIST_HEAD(ide_pci_drivers);
* @module: owner module of the driver
*
* Registers a driver with the IDE layer. The IDE layer arranges that
- * boot time setup is done in the expected device order and then
+ * boot time setup is done in the expected device order and then
* hands the controllers off to the core PCI code to do the rest of
* the work.
*
int __ide_pci_register_driver(struct pci_driver *driver, struct module *module,
const char *mod_name)
{
- if(!pre_init)
+ if (!pre_init)
return __pci_register_driver(driver, module, mod_name);
driver->driver.owner = module;
list_add_tail(&driver->node, &ide_pci_drivers);
return 0;
}
-
EXPORT_SYMBOL_GPL(__ide_pci_register_driver);
/**
* This is only used during boot up to get the ordering correct. After
* boot up the pci layer takes over the job.
*/
-
+
static int __init ide_scan_pcidev(struct pci_dev *dev)
{
struct list_head *l;
struct pci_driver *d;
-
+
list_for_each(l, &ide_pci_drivers) {
d = list_entry(l, struct pci_driver, node);
if (d->id_table) {
- const struct pci_device_id *id = pci_match_id(d->id_table,
- dev);
+ const struct pci_device_id *id =
+ pci_match_id(d->id_table, dev);
+
if (id != NULL && d->probe(dev, id) >= 0) {
dev->driver = d;
pci_dev_get(dev);
pre_init = 0;
if (!scan_direction)
- while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
+ while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)))
ide_scan_pcidev(dev);
else
- while ((dev = pci_get_device_reverse(PCI_ANY_ID, PCI_ANY_ID, dev))
- != NULL)
+ while ((dev = pci_get_device_reverse(PCI_ANY_ID, PCI_ANY_ID,
+ dev)))
ide_scan_pcidev(dev);
-
+
/*
* Hand the drivers over to the PCI layer now we
* are post init.
list_for_each_safe(l, n, &ide_pci_drivers) {
list_del(l);
d = list_entry(l, struct pci_driver, node);
- if (__pci_register_driver(d, d->driver.owner, d->driver.mod_name))
- printk(KERN_ERR "%s: failed to register driver for %s\n",
- __FUNCTION__, d->driver.mod_name);
+ if (__pci_register_driver(d, d->driver.owner,
+ d->driver.mod_name))
+ printk(KERN_ERR "%s: failed to register %s driver\n",
+ __FUNCTION__, d->driver.mod_name);
}
}
#endif
extern int ehca_port_act_time;
extern int ehca_use_hp_mr;
extern int ehca_scaling_code;
+extern int ehca_lock_hcalls;
struct ipzu_queue_resp {
u32 qe_size; /* queue entry size */
#ifdef CONFIG_PPC_64K_PAGES
#include <linux/slab.h>
#endif
+
#include "ehca_classes.h"
#include "ehca_iverbs.h"
#include "ehca_mrmw.h"
#include "ehca_tools.h"
#include "hcp_if.h"
-#define HCAD_VERSION "0024"
+#define HCAD_VERSION "0025"
MODULE_LICENSE("Dual BSD/GPL");
MODULE_AUTHOR("Christoph Raisch <raisch@de.ibm.com>");
int ehca_static_rate = -1;
int ehca_scaling_code = 0;
int ehca_mr_largepage = 1;
+int ehca_lock_hcalls = -1;
module_param_named(open_aqp1, ehca_open_aqp1, int, S_IRUGO);
module_param_named(debug_level, ehca_debug_level, int, S_IRUGO);
module_param_named(static_rate, ehca_static_rate, int, S_IRUGO);
module_param_named(scaling_code, ehca_scaling_code, int, S_IRUGO);
module_param_named(mr_largepage, ehca_mr_largepage, int, S_IRUGO);
+module_param_named(lock_hcalls, ehca_lock_hcalls, bool, S_IRUGO);
MODULE_PARM_DESC(open_aqp1,
"AQP1 on startup (0: no (default), 1: yes)");
MODULE_PARM_DESC(mr_largepage,
"use large page for MR (0: use PAGE_SIZE (default), "
"1: use large page depending on MR size");
+MODULE_PARM_DESC(lock_hcalls,
+ "serialize all hCalls made by the driver "
+ "(default: autodetect)");
DEFINE_RWLOCK(ehca_qp_idr_lock);
DEFINE_RWLOCK(ehca_cq_idr_lock);
{ HCA_CAP_UD_LL_QP, "HCA_CAP_UD_LL_QP" },
{ HCA_CAP_RESIZE_MR, "HCA_CAP_RESIZE_MR" },
{ HCA_CAP_MINI_QP, "HCA_CAP_MINI_QP" },
+ { HCA_CAP_H_ALLOC_RES_SYNC, "HCA_CAP_H_ALLOC_RES_SYNC" },
};
static int ehca_sense_attributes(struct ehca_shca *shca)
if (EHCA_BMASK_GET(hca_cap_descr[i].mask, shca->hca_cap))
ehca_gen_dbg(" %s", hca_cap_descr[i].descr);
+ /* Autodetect hCall locking -- the "H_ALLOC_RESOURCE synced" flag is
+ * a firmware property, so it's valid across all adapters
+ */
+ if (ehca_lock_hcalls == -1)
+ ehca_lock_hcalls = !(shca->hca_cap & HCA_CAP_H_ALLOC_RES_SYNC);
+
/* translate supported MR page sizes; always support 4K */
shca->hca_cap_mr_pgsize = EHCA_PAGESIZE;
if (ehca_mr_largepage) { /* support extra sizes only if enabled */
/* copy back return values */
srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
- srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
+ srq_init_attr->attr.max_sge = 3;
/* drive SRQ into RTR state */
mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
}
srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
- srq_attr->max_sge = qpcb->actual_nr_sges_in_rq_wqe;
+ srq_attr->max_sge = 3;
srq_attr->srq_limit = EHCA_BMASK_GET(
MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
unsigned long arg7)
{
long ret;
- int i, sleep_msecs, do_lock;
- unsigned long flags;
+ int i, sleep_msecs;
+ unsigned long flags = 0;
ehca_gen_dbg("opcode=%lx " HCALL7_REGS_FORMAT,
opcode, arg1, arg2, arg3, arg4, arg5, arg6, arg7);
- /* lock H_FREE_RESOURCE(MR) against itself and H_ALLOC_RESOURCE(MR) */
- if ((opcode == H_FREE_RESOURCE) && (arg7 == 5)) {
- arg7 = 0; /* better not upset firmware */
- do_lock = 1;
- }
-
for (i = 0; i < 5; i++) {
- if (do_lock)
+ /* serialize hCalls to work around firmware issue */
+ if (ehca_lock_hcalls)
spin_lock_irqsave(&hcall_lock, flags);
ret = plpar_hcall_norets(opcode, arg1, arg2, arg3, arg4,
arg5, arg6, arg7);
- if (do_lock)
+ if (ehca_lock_hcalls)
spin_unlock_irqrestore(&hcall_lock, flags);
if (H_IS_LONG_BUSY(ret)) {
unsigned long arg9)
{
long ret;
- int i, sleep_msecs, do_lock;
+ int i, sleep_msecs;
unsigned long flags = 0;
ehca_gen_dbg("INPUT -- opcode=%lx " HCALL9_REGS_FORMAT, opcode,
arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9);
- /* lock H_ALLOC_RESOURCE(MR) against itself and H_FREE_RESOURCE(MR) */
- do_lock = ((opcode == H_ALLOC_RESOURCE) && (arg2 == 5));
-
for (i = 0; i < 5; i++) {
- if (do_lock)
+ /* serialize hCalls to work around firmware issue */
+ if (ehca_lock_hcalls)
spin_lock_irqsave(&hcall_lock, flags);
ret = plpar_hcall9(opcode, outs,
arg1, arg2, arg3, arg4, arg5,
arg6, arg7, arg8, arg9);
- if (do_lock)
+ if (ehca_lock_hcalls)
spin_unlock_irqrestore(&hcall_lock, flags);
if (H_IS_LONG_BUSY(ret)) {
return ehca_plpar_hcall_norets(H_FREE_RESOURCE,
adapter_handle.handle, /* r4 */
mr->ipz_mr_handle.handle, /* r5 */
- 0, 0, 0, 0, 5);
+ 0, 0, 0, 0, 0);
}
u64 hipz_h_reregister_pmr(const struct ipz_adapter_handle adapter_handle,
#define HCA_CAP_UD_LL_QP EHCA_BMASK_IBM(16, 16)
#define HCA_CAP_RESIZE_MR EHCA_BMASK_IBM(17, 17)
#define HCA_CAP_MINI_QP EHCA_BMASK_IBM(18, 18)
+#define HCA_CAP_H_ALLOC_RES_SYNC EHCA_BMASK_IBM(19, 19)
/* query port response block */
struct hipz_query_port {
#
obj-y := common/
-obj-$(CONFIG_VIDEO_DEV) += video/
+obj-y += video/
obj-$(CONFIG_VIDEO_DEV) += radio/
obj-$(CONFIG_DVB_CORE) += dvb/
u16 val;
u16 data;
} vsb_snr_tab[] = {
- { 1023, 770, },
+ { 924, 300, },
{ 923, 300, },
{ 918, 295, },
{ 915, 290, },
u16 val;
u16 data;
} qam64_snr_tab[] = {
+ { 1, 0, },
{ 12, 300, },
{ 15, 290, },
{ 18, 280, },
{ 95, 202, },
{ 96, 201, },
{ 104, 200, },
+ { 255, 0, },
};
/* QAM256 SNR lookup table */
u16 val;
u16 data;
} qam256_snr_tab[] = {
+ { 1, 0, },
{ 12, 400, },
{ 13, 390, },
{ 15, 380, },
{ 105, 262, },
{ 106, 261, },
{ 110, 260, },
+ { 255, 0, },
};
/* 8 bit registers, 16 bit values */
u16 reg;
dprintk("%s()\n", __FUNCTION__);
- reg = s5h1409_readreg(state, 0xf1) & 0x1ff;
-
switch(state->current_modulation) {
case QAM_64:
+ reg = s5h1409_readreg(state, 0xf0) & 0xff;
return s5h1409_qam64_lookup_snr(fe, snr, reg);
case QAM_256:
+ reg = s5h1409_readreg(state, 0xf0) & 0xff;
return s5h1409_qam256_lookup_snr(fe, snr, reg);
case VSB_8:
+ reg = s5h1409_readreg(state, 0xf1) & 0x3ff;
return s5h1409_vsb_lookup_snr(fe, snr, reg);
default:
break;
.addr = 0,
.adapter = NULL,
.driver = &i2c_driver_bt866,
- .usage_count = 0
};
static int bt866_found_proc(struct i2c_adapter *adapter,
.radio_type = UNSET,
.tuner_addr = ADDR_UNSET,
.radio_addr = ADDR_UNSET,
+ .tuner_config = 1,
.mpeg = SAA7134_MPEG_DVB,
.inputs = {{
.name = name_tv,
if (q->streaming)
goto done;
if (!q->reading) {
- retval = videobuf_read_start(q);
+ retval = __videobuf_read_start(q);
if (retval < 0)
goto done;
}
struct videobuf_buffer, stream);
} else {
if (!q->reading)
- videobuf_read_start(q);
+ __videobuf_read_start(q);
if (!q->reading) {
rc = POLLERR;
} else if (NULL == q->read_buf) {
KEY_UNKNOWN, /* 0x0C: FN+BACKSPACE */
KEY_UNKNOWN, /* 0x0D: FN+INSERT */
KEY_UNKNOWN, /* 0x0E: FN+DELETE */
- KEY_BRIGHTNESSUP, /* 0x0F: FN+HOME (brightness up) */
+ KEY_RESERVED, /* 0x0F: FN+HOME (brightness up) */
/* Scan codes 0x10 to 0x1F: Extended ACPI HKEY hot keys */
- KEY_BRIGHTNESSDOWN, /* 0x10: FN+END (brightness down) */
+ KEY_RESERVED, /* 0x10: FN+END (brightness down) */
KEY_RESERVED, /* 0x11: FN+PGUP (thinklight toggle) */
KEY_UNKNOWN, /* 0x12: FN+PGDOWN */
KEY_ZOOM, /* 0x13: FN+SPACE (zoom) */
{
struct fs_enet_private *fep = netdev_priv(dev);
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
struct fs_platform_info *fpi = fep->fpi;
fep->scc.idx = fs_get_scc_index(fpi->fs_no);
static int irda_usb_net_open(struct net_device *netdev)
{
struct irda_usb_cb *self;
+ unsigned long flags;
char hwname[16];
int i;
self = (struct irda_usb_cb *) netdev->priv;
IRDA_ASSERT(self != NULL, return -1;);
+ spin_lock_irqsave(&self->lock, flags);
/* Can only open the device if it's there */
if(!self->present) {
+ spin_unlock_irqrestore(&self->lock, flags);
IRDA_WARNING("%s(), device not present!\n", __FUNCTION__);
return -1;
}
if(self->needspatch) {
+ spin_unlock_irqrestore(&self->lock, flags);
IRDA_WARNING("%s(), device needs patch\n", __FUNCTION__) ;
return -EIO ;
}
/* To do *before* submitting Rx urbs and starting net Tx queue
* Jean II */
self->netopen = 1;
+ spin_unlock_irqrestore(&self->lock, flags);
/*
* Now that everything should be initialized properly,
/* Stop transmit processing */
netif_stop_queue(netdev);
+ kfree_skb(mcs->rx_buff.skb);
+
/* kill and free the receive and transmit URBs */
usb_kill_urb(mcs->rx_urb);
usb_free_urb(mcs->rx_urb);
};
enum StirFifoCtlMask {
- FIFOCTL_EOF = 0x80,
- FIFOCTL_UNDER = 0x40,
- FIFOCTL_OVER = 0x20,
FIFOCTL_DIR = 0x10,
FIFOCTL_CLR = 0x08,
FIFOCTL_EMPTY = 0x04,
{
int err;
unsigned long count, status;
+ unsigned long prev_count = 0x1fff;
/* Read FIFO status and count */
- for(;;) {
+ for (;; prev_count = count) {
err = read_reg(stir, REG_FIFOCTL, stir->fifo_status,
FIFO_REGS_SIZE);
if (unlikely(err != FIFO_REGS_SIZE)) {
if (space >= 0 && STIR_FIFO_SIZE - 4 > space + count)
return 0;
+ /* queue confused */
+ if (prev_count < count)
+ break;
+
/* estimate transfer time for remaining chars */
msleep((count * 8000) / stir->speed);
}
struct ppp_header {
u8 address;
u8 control;
- u16 protocol;
+ __be16 protocol;
};
#define PPP_HEADER_LEN sizeof (struct ppp_header)
struct lcp_header {
u8 type;
u8 ident;
- u16 len;
+ __be16 len;
};
#define LCP_HEADER_LEN sizeof (struct lcp_header)
struct cisco_packet {
- u32 type;
- u32 par1;
- u32 par2;
- u16 rel;
- u16 time0;
- u16 time1;
+ __be32 type;
+ __be32 par1;
+ __be32 par2;
+ __be16 rel;
+ __be16 time0;
+ __be16 time1;
};
#define CISCO_PACKET_LEN 18
#define CISCO_BIG_PACKET_LEN 20
static void sppp_keepalive (unsigned long dummy);
static void sppp_cp_send (struct sppp *sp, u16 proto, u8 type,
u8 ident, u16 len, void *data);
-static void sppp_cisco_send (struct sppp *sp, int type, long par1, long par2);
+static void sppp_cisco_send (struct sppp *sp, int type, u32 par1, u32 par2);
static void sppp_lcp_input (struct sppp *sp, struct sk_buff *m);
static void sppp_cisco_input (struct sppp *sp, struct sk_buff *m);
static void sppp_ipcp_input (struct sppp *sp, struct sk_buff *m);
sppp_cisco_send (sp, CISCO_KEEPALIVE_REQ, ++sp->pp_seq,
sp->pp_rseq);
else if (sp->lcp.state == LCP_STATE_OPENED) {
- long nmagic = htonl (sp->lcp.magic);
+ __be32 nmagic = htonl (sp->lcp.magic);
sp->lcp.echoid = ++sp->pp_seq;
sppp_cp_send (sp, PPP_LCP, LCP_ECHO_REQ,
sp->lcp.echoid, 4, &nmagic);
dev->name, len);
break;
}
- if (ntohl (*(long*)(h+1)) == sp->lcp.magic) {
+ if (ntohl (*(__be32*)(h+1)) == sp->lcp.magic) {
/* Line loopback mode detected. */
printk (KERN_WARNING "%s: loopback\n", dev->name);
if_down (dev);
sppp_lcp_open (sp);
break;
}
- *(long*)(h+1) = htonl (sp->lcp.magic);
+ *(__be32 *)(h+1) = htonl (sp->lcp.magic);
sppp_cp_send (sp, PPP_LCP, LCP_ECHO_REPLY, h->ident, len-4, h+1);
break;
case LCP_ECHO_REPLY:
dev->name, len);
break;
}
- if (ntohl (*(long*)(h+1)) != sp->lcp.magic)
+ if (ntohl(*(__be32 *)(h+1)) != sp->lcp.magic)
sp->pp_alivecnt = 0;
break;
}
{
struct in_device *in_dev;
struct in_ifaddr *ifa;
- __be32 addr = 0, mask = ~0; /* FIXME: is the mask correct? */
+ __be32 addr = 0, mask = htonl(~0U); /* FIXME: is the mask correct? */
#ifdef CONFIG_INET
rcu_read_lock();
if ((in_dev = __in_dev_get_rcu(dev)) != NULL)
}
rcu_read_unlock();
#endif
- /* I hope both addr and mask are in the net order */
- sppp_cisco_send (sp, CISCO_ADDR_REPLY, addr, mask);
+ sppp_cisco_send (sp, CISCO_ADDR_REPLY, ntohl(addr), ntohl(mask));
break;
}
}
* Send Cisco keepalive packet.
*/
-static void sppp_cisco_send (struct sppp *sp, int type, long par1, long par2)
+static void sppp_cisco_send (struct sppp *sp, int type, u32 par1, u32 par2)
{
struct ppp_header *h;
struct cisco_packet *ch;
ch->type = htonl (type);
ch->par1 = htonl (par1);
ch->par2 = htonl (par2);
- ch->rel = -1;
+ ch->rel = htons(0xffff);
ch->time0 = htons ((u16) (t >> 16));
ch->time1 = htons ((u16) t);
};
static struct wd_device wd_dev = {
- 0, SPIN_LOCK_UNLOCKED, 0, 0, 0, 0,
+ 0, __SPIN_LOCK_UNLOCKED(wd_dev.lock), 0, 0, 0, 0,
};
static struct timer_list wd_timer;
}
}
+static void ide_scsi_hex_dump(u8 *data, int len)
+{
+ print_hex_dump(KERN_CONT, "", DUMP_PREFIX_NONE, 16, 1, data, len, 0);
+}
+
static int idescsi_check_condition(ide_drive_t *drive, struct request *failed_command)
{
idescsi_scsi_t *scsi = drive_to_idescsi(drive);
pc->scsi_cmd = ((idescsi_pc_t *) failed_command->special)->scsi_cmd;
if (test_bit(IDESCSI_LOG_CMD, &scsi->log)) {
printk ("ide-scsi: %s: queue cmd = ", drive->name);
- print_hex_dump(KERN_CONT, "", DUMP_PREFIX_NONE, 16, 1, pc->c,
- 6, 0);
+ ide_scsi_hex_dump(pc->c, 6);
}
rq->rq_disk = scsi->disk;
return ide_do_drive_cmd(drive, rq, ide_preempt);
idescsi_pc_t *opc = (idescsi_pc_t *) rq->buffer;
if (log) {
printk ("ide-scsi: %s: wrap up check %lu, rst = ", drive->name, opc->scsi_cmd->serial_number);
- print_hex_dump(KERN_CONT, "", DUMP_PREFIX_NONE, 16, 1,
- pc->buffer, 16, 0);
+ ide_scsi_hex_dump(pc->buffer, 16);
}
memcpy((void *) opc->scsi_cmd->sense_buffer, pc->buffer, SCSI_SENSE_BUFFERSIZE);
kfree(pc->buffer);
if (test_bit(IDESCSI_LOG_CMD, &scsi->log)) {
printk ("ide-scsi: %s: que %lu, cmd = ", drive->name, cmd->serial_number);
- print_hex_dump(KERN_CONT, "", DUMP_PREFIX_NONE, 16, 1,
- cmd->cmnd, cmd->cmd_len, 0);
+ ide_scsi_hex_dump(cmd->cmnd, cmd->cmd_len);
if (memcmp(pc->c, cmd->cmnd, cmd->cmd_len)) {
printk ("ide-scsi: %s: que %lu, tsl = ", drive->name, cmd->serial_number);
- print_hex_dump(KERN_CONT, "", DUMP_PREFIX_NONE, 16, 1,
- pc->c, 12, 0);
+ ide_scsi_hex_dump(pc->c, 12);
}
}
devices. At this moment we only have additional support for some
SuperMicro Inc. motherboards.
+config IT8712F_WDT
+ tristate "IT8712F (Smart Guardian) Watchdog Timer"
+ depends on X86
+ ---help---
+ This is the driver for the built-in watchdog timer on the IT8712F
+ Super I/0 chipset used on many motherboards.
+
+ To compile this driver as a module, choose M here: the
+ module will be called it8712f_wdt.
+
config SC1200_WDT
tristate "National Semiconductor PC87307/PC97307 (ala SC1200) Watchdog"
depends on X86
Most people will say N.
+config SBC7240_WDT
+ tristate "SBC Nano 7240 Watchdog Timer"
+ depends on X86_32
+ ---help---
+ This is the driver for the hardware watchdog found on the IEI
+ single board computers EPIC Nano 7240 (and likely others). This
+ watchdog simply watches your kernel to make sure it doesn't freeze,
+ and if it does, it reboots your computer after a certain amount of
+ time.
+
+ To compile this driver as a module, choose M here: the
+ module will be called sbc7240_wdt.
+
config CPU5_WDT
tristate "SMA CPU5 Watchdog"
depends on X86
obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o
obj-$(CONFIG_I6300ESB_WDT) += i6300esb.o
obj-$(CONFIG_ITCO_WDT) += iTCO_wdt.o iTCO_vendor_support.o
+obj-$(CONFIG_IT8712F_WDT) += it8712f_wdt.o
obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o
obj-$(CONFIG_PC87413_WDT) += pc87413_wdt.o
obj-$(CONFIG_60XX_WDT) += sbc60xxwdt.o
obj-$(CONFIG_SBC8360_WDT) += sbc8360.o
+obj-$(CONFIG_SBC7240_WDT) += sbc7240_wdt.o
obj-$(CONFIG_CPU5_WDT) += cpu5wdt.o
obj-$(CONFIG_SMSC37B787_WDT) += smsc37b787_wdt.o
obj-$(CONFIG_W83627HF_WDT) += w83627hf_wdt.o
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
+ *
+ *
+ * Errata: WDT Clear is blocked after WDT Reset
+ *
+ * A watchdog timer event will, after reset, block writes to the WDT_CLEAR
+ * register, preventing the program to clear the next Watchdog Timer Reset.
+ *
+ * If you still want to use the WDT after a WDT reset a small code can be
+ * insterted at the startup checking the AVR32_PM.rcause register for WDT reset
+ * and use a GPIO pin to reset the system. This method requires that one of the
+ * GPIO pins are available and connected externally to the RESET_N pin. After
+ * the GPIO pin has pulled down the reset line the GPIO will be reset and leave
+ * the pin tristated with pullup.
*/
#include <linux/init.h>
#define WDT_CLR 0x04
+#define WDT_RCAUSE 0x10
+#define WDT_RCAUSE_POR 0
+#define WDT_RCAUSE_EXT 2
+#define WDT_RCAUSE_WDT 3
+#define WDT_RCAUSE_JTAG 4
+#define WDT_RCAUSE_SERP 5
+
#define WDT_BIT(name) (1 << WDT_##name)
#define WDT_BF(name, value) ((value) << WDT_##name)
void __iomem *regs;
spinlock_t io_lock;
int timeout;
+ int boot_status;
unsigned long users;
struct miscdevice miscdev;
};
at32_wdt_stop();
} else {
dev_dbg(wdt->miscdev.parent,
- "Unexpected close, not stopping watchdog!\n");
+ "unexpected close, not stopping watchdog!\n");
at32_wdt_pat();
}
clear_bit(1, &wdt->users);
return 0;
}
+/*
+ * Get the watchdog status.
+ */
+static int at32_wdt_get_status(void)
+{
+ int rcause;
+ int status = 0;
+
+ rcause = wdt_readl(wdt, RCAUSE);
+
+ switch (rcause) {
+ case WDT_BIT(RCAUSE_EXT):
+ status = WDIOF_EXTERN1;
+ break;
+ case WDT_BIT(RCAUSE_WDT):
+ status = WDIOF_CARDRESET;
+ break;
+ case WDT_BIT(RCAUSE_POR): /* fall through */
+ case WDT_BIT(RCAUSE_JTAG): /* fall through */
+ case WDT_BIT(RCAUSE_SERP): /* fall through */
+ default:
+ break;
+ }
+
+ return status;
+}
+
static struct watchdog_info at32_wdt_info = {
.identity = "at32ap700x watchdog",
.options = WDIOF_SETTIMEOUT |
case WDIOC_GETTIMEOUT:
ret = put_user(wdt->timeout, p);
break;
- case WDIOC_GETSTATUS: /* fall through */
- case WDIOC_GETBOOTSTATUS:
+ case WDIOC_GETSTATUS:
ret = put_user(0, p);
break;
+ case WDIOC_GETBOOTSTATUS:
+ ret = put_user(wdt->boot_status, p);
+ break;
case WDIOC_SETOPTIONS:
ret = get_user(time, p);
if (ret)
dev_dbg(&pdev->dev, "could not map I/O memory\n");
goto err_free;
}
+
spin_lock_init(&wdt->io_lock);
- wdt->users = 0;
+ wdt->boot_status = at32_wdt_get_status();
+
+ /* Work-around for watchdog silicon errata. */
+ if (wdt->boot_status & WDIOF_CARDRESET) {
+ dev_info(&pdev->dev, "CPU must be reset with external "
+ "reset or POR due to silicon errata.\n");
+ ret = -EIO;
+ goto err_iounmap;
+ } else {
+ wdt->users = 0;
+ }
wdt->miscdev.minor = WATCHDOG_MINOR;
wdt->miscdev.name = "watchdog";
wdt->miscdev.fops = &at32_wdt_fops;
static struct watchdog_info bfin_wdt_info;
static unsigned long open_check;
static char expect_close;
-static spinlock_t bfin_wdt_spinlock = SPIN_LOCK_UNLOCKED;
+static DEFINE_SPINLOCK(bfin_wdt_spinlock);
/**
* bfin_wdt_keepalive - Keep the Userspace Watchdog Alive
--- /dev/null
+/*
+ * IT8712F "Smart Guardian" Watchdog support
+ *
+ * Copyright (c) 2006-2007 Jorge Boncompte - DTI2 <jorge@dti2.net>
+ *
+ * Based on info and code taken from:
+ *
+ * drivers/char/watchdog/scx200_wdt.c
+ * drivers/hwmon/it87.c
+ * IT8712F EC-LPC I/O Preliminary Specification 0.9.2.pdf
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * The author(s) of this software shall not be held liable for damages
+ * of any nature resulting due to the use of this software. This
+ * software is provided AS-IS with no warranties.
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/miscdevice.h>
+#include <linux/watchdog.h>
+#include <linux/notifier.h>
+#include <linux/reboot.h>
+#include <linux/fs.h>
+#include <linux/pci.h>
+#include <linux/spinlock.h>
+
+#include <asm/uaccess.h>
+#include <asm/io.h>
+
+#define NAME "it8712f_wdt"
+
+MODULE_AUTHOR("Jorge Boncompte - DTI2 <jorge@dti2.net>");
+MODULE_DESCRIPTION("IT8712F Watchdog Driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
+
+static int margin = 60; /* in seconds */
+module_param(margin, int, 0);
+MODULE_PARM_DESC(margin, "Watchdog margin in seconds");
+
+static int nowayout = WATCHDOG_NOWAYOUT;
+module_param(nowayout, int, 0);
+MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
+
+static struct semaphore it8712f_wdt_sem;
+static unsigned expect_close;
+static spinlock_t io_lock;
+
+/* Dog Food address - We use the game port address */
+static unsigned short address;
+
+#define REG 0x2e /* The register to read/write */
+#define VAL 0x2f /* The value to read/write */
+
+#define LDN 0x07 /* Register: Logical device select */
+#define DEVID 0x20 /* Register: Device ID */
+#define DEVREV 0x22 /* Register: Device Revision */
+#define ACT_REG 0x30 /* LDN Register: Activation */
+#define BASE_REG 0x60 /* LDN Register: Base address */
+
+#define IT8712F_DEVID 0x8712
+
+#define LDN_GPIO 0x07 /* GPIO and Watch Dog Timer */
+#define LDN_GAME 0x09 /* Game Port */
+
+#define WDT_CONTROL 0x71 /* WDT Register: Control */
+#define WDT_CONFIG 0x72 /* WDT Register: Configuration */
+#define WDT_TIMEOUT 0x73 /* WDT Register: Timeout Value */
+
+#define WDT_RESET_GAME 0x10
+#define WDT_RESET_KBD 0x20
+#define WDT_RESET_MOUSE 0x40
+#define WDT_RESET_CIR 0x80
+
+#define WDT_UNIT_SEC 0x80 /* If 0 in MINUTES */
+
+#define WDT_OUT_PWROK 0x10
+#define WDT_OUT_KRST 0x40
+
+static int
+superio_inb(int reg)
+{
+ outb(reg, REG);
+ return inb(VAL);
+}
+
+static void
+superio_outb(int val, int reg)
+{
+ outb(reg, REG);
+ outb(val, VAL);
+}
+
+static int
+superio_inw(int reg)
+{
+ int val;
+ outb(reg++, REG);
+ val = inb(VAL) << 8;
+ outb(reg, REG);
+ val |= inb(VAL);
+ return val;
+}
+
+static inline void
+superio_select(int ldn)
+{
+ outb(LDN, REG);
+ outb(ldn, VAL);
+}
+
+static inline void
+superio_enter(void)
+{
+ spin_lock(&io_lock);
+ outb(0x87, REG);
+ outb(0x01, REG);
+ outb(0x55, REG);
+ outb(0x55, REG);
+}
+
+static inline void
+superio_exit(void)
+{
+ outb(0x02, REG);
+ outb(0x02, VAL);
+ spin_unlock(&io_lock);
+}
+
+static inline void
+it8712f_wdt_ping(void)
+{
+ inb(address);
+}
+
+static void
+it8712f_wdt_update_margin(void)
+{
+ int config = WDT_OUT_KRST | WDT_OUT_PWROK;
+
+ printk(KERN_INFO NAME ": timer margin %d seconds\n", margin);
+
+ /* The timeout register only has 8bits wide */
+ if (margin < 256)
+ config |= WDT_UNIT_SEC; /* else UNIT are MINUTES */
+ superio_outb(config, WDT_CONFIG);
+
+ superio_outb((margin > 255) ? (margin / 60) : margin, WDT_TIMEOUT);
+}
+
+static void
+it8712f_wdt_enable(void)
+{
+ printk(KERN_DEBUG NAME ": enabling watchdog timer\n");
+ superio_enter();
+ superio_select(LDN_GPIO);
+
+ superio_outb(WDT_RESET_GAME, WDT_CONTROL);
+
+ it8712f_wdt_update_margin();
+
+ superio_exit();
+
+ it8712f_wdt_ping();
+}
+
+static void
+it8712f_wdt_disable(void)
+{
+ printk(KERN_DEBUG NAME ": disabling watchdog timer\n");
+
+ superio_enter();
+ superio_select(LDN_GPIO);
+
+ superio_outb(0, WDT_CONFIG);
+ superio_outb(0, WDT_CONTROL);
+ superio_outb(0, WDT_TIMEOUT);
+
+ superio_exit();
+}
+
+static int
+it8712f_wdt_notify(struct notifier_block *this,
+ unsigned long code, void *unused)
+{
+ if (code == SYS_HALT || code == SYS_POWER_OFF)
+ if (!nowayout)
+ it8712f_wdt_disable();
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block it8712f_wdt_notifier = {
+ .notifier_call = it8712f_wdt_notify,
+};
+
+static ssize_t
+it8712f_wdt_write(struct file *file, const char __user *data,
+ size_t len, loff_t *ppos)
+{
+ /* check for a magic close character */
+ if (len) {
+ size_t i;
+
+ it8712f_wdt_ping();
+
+ expect_close = 0;
+ for (i = 0; i < len; ++i) {
+ char c;
+ if (get_user(c, data+i))
+ return -EFAULT;
+ if (c == 'V')
+ expect_close = 42;
+ }
+ }
+
+ return len;
+}
+
+static int
+it8712f_wdt_ioctl(struct inode *inode, struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ void __user *argp = (void __user *)arg;
+ int __user *p = argp;
+ static struct watchdog_info ident = {
+ .identity = "IT8712F Watchdog",
+ .firmware_version = 1,
+ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
+ };
+ int new_margin;
+
+ switch (cmd) {
+ default:
+ return -ENOTTY;
+ case WDIOC_GETSUPPORT:
+ if (copy_to_user(argp, &ident, sizeof(ident)))
+ return -EFAULT;
+ return 0;
+ case WDIOC_GETSTATUS:
+ case WDIOC_GETBOOTSTATUS:
+ return put_user(0, p);
+ case WDIOC_KEEPALIVE:
+ it8712f_wdt_ping();
+ return 0;
+ case WDIOC_SETTIMEOUT:
+ if (get_user(new_margin, p))
+ return -EFAULT;
+ if (new_margin < 1)
+ return -EINVAL;
+ margin = new_margin;
+ superio_enter();
+ superio_select(LDN_GPIO);
+
+ it8712f_wdt_update_margin();
+
+ superio_exit();
+ it8712f_wdt_ping();
+ case WDIOC_GETTIMEOUT:
+ if (put_user(margin, p))
+ return -EFAULT;
+ return 0;
+ }
+}
+
+static int
+it8712f_wdt_open(struct inode *inode, struct file *file)
+{
+ /* only allow one at a time */
+ if (down_trylock(&it8712f_wdt_sem))
+ return -EBUSY;
+ it8712f_wdt_enable();
+
+ return nonseekable_open(inode, file);
+}
+
+static int
+it8712f_wdt_release(struct inode *inode, struct file *file)
+{
+ if (expect_close != 42) {
+ printk(KERN_WARNING NAME
+ ": watchdog device closed unexpectedly, will not"
+ " disable the watchdog timer\n");
+ } else if (!nowayout) {
+ it8712f_wdt_disable();
+ }
+ expect_close = 0;
+ up(&it8712f_wdt_sem);
+
+ return 0;
+}
+
+static struct file_operations it8712f_wdt_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .write = it8712f_wdt_write,
+ .ioctl = it8712f_wdt_ioctl,
+ .open = it8712f_wdt_open,
+ .release = it8712f_wdt_release,
+};
+
+static struct miscdevice it8712f_wdt_miscdev = {
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &it8712f_wdt_fops,
+};
+
+static int __init
+it8712f_wdt_find(unsigned short *address)
+{
+ int err = -ENODEV;
+ int chip_type;
+
+ superio_enter();
+ chip_type = superio_inw(DEVID);
+ if (chip_type != IT8712F_DEVID)
+ goto exit;
+
+ superio_select(LDN_GAME);
+ superio_outb(1, ACT_REG);
+ if (!(superio_inb(ACT_REG) & 0x01)) {
+ printk(KERN_ERR NAME ": Device not activated, skipping\n");
+ goto exit;
+ }
+
+ *address = superio_inw(BASE_REG);
+ if (*address == 0) {
+ printk(KERN_ERR NAME ": Base address not set, skipping\n");
+ goto exit;
+ }
+
+ err = 0;
+ printk(KERN_DEBUG NAME ": Found IT%04xF chip revision %d - "
+ "using DogFood address 0x%x\n",
+ chip_type, superio_inb(DEVREV) & 0x0f, *address);
+
+exit:
+ superio_exit();
+ return err;
+}
+
+static int __init
+it8712f_wdt_init(void)
+{
+ int err = 0;
+
+ spin_lock_init(&io_lock);
+
+ if (it8712f_wdt_find(&address))
+ return -ENODEV;
+
+ if (!request_region(address, 1, "IT8712F Watchdog")) {
+ printk(KERN_WARNING NAME ": watchdog I/O region busy\n");
+ return -EBUSY;
+ }
+
+ it8712f_wdt_disable();
+
+ sema_init(&it8712f_wdt_sem, 1);
+
+ err = register_reboot_notifier(&it8712f_wdt_notifier);
+ if (err) {
+ printk(KERN_ERR NAME ": unable to register reboot notifier\n");
+ goto out;
+ }
+
+ err = misc_register(&it8712f_wdt_miscdev);
+ if (err) {
+ printk(KERN_ERR NAME
+ ": cannot register miscdev on minor=%d (err=%d)\n",
+ WATCHDOG_MINOR, err);
+ goto reboot_out;
+ }
+
+ return 0;
+
+
+reboot_out:
+ unregister_reboot_notifier(&it8712f_wdt_notifier);
+out:
+ release_region(address, 1);
+ return err;
+}
+
+static void __exit
+it8712f_wdt_exit(void)
+{
+ misc_deregister(&it8712f_wdt_miscdev);
+ unregister_reboot_notifier(&it8712f_wdt_notifier);
+ release_region(address, 1);
+}
+
+module_init(it8712f_wdt_init);
+module_exit(it8712f_wdt_exit);
--- /dev/null
+/*
+ * NANO7240 SBC Watchdog device driver
+ *
+ * Based on w83877f.c by Scott Jennings,
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation;
+ *
+ * Software distributed under the License is distributed on an "AS IS"
+ * basis, WITHOUT WARRANTY OF ANY KIND, either express or
+ * implied. See the License for the specific language governing
+ * rights and limitations under the License.
+ *
+ * (c) Copyright 2007 Gilles GIGAN <gilles.gigan@jcu.edu.au>
+ *
+ */
+
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/jiffies.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/miscdevice.h>
+#include <linux/notifier.h>
+#include <linux/reboot.h>
+#include <linux/types.h>
+#include <linux/watchdog.h>
+#include <asm/atomic.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+
+#define SBC7240_PREFIX "sbc7240_wdt: "
+
+#define SBC7240_ENABLE_PORT 0x443
+#define SBC7240_DISABLE_PORT 0x043
+#define SBC7240_SET_TIMEOUT_PORT SBC7240_ENABLE_PORT
+#define SBC7240_MAGIC_CHAR 'V'
+
+#define SBC7240_TIMEOUT 30
+#define SBC7240_MAX_TIMEOUT 255
+static int timeout = SBC7240_TIMEOUT; /* in seconds */
+module_param(timeout, int, 0);
+MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<="
+ __MODULE_STRING(SBC7240_MAX_TIMEOUT) ", default="
+ __MODULE_STRING(SBC7240_TIMEOUT) ")");
+
+static int nowayout = WATCHDOG_NOWAYOUT;
+module_param(nowayout, int, 0);
+MODULE_PARM_DESC(nowayout, "Disable watchdog when closing device file");
+
+#define SBC7240_OPEN_STATUS_BIT 0
+#define SBC7240_ENABLED_STATUS_BIT 1
+#define SBC7240_EXPECT_CLOSE_STATUS_BIT 2
+static unsigned long wdt_status;
+
+/*
+ * Utility routines
+ */
+
+static void wdt_disable(void)
+{
+ /* disable the watchdog */
+ if (test_and_clear_bit(SBC7240_ENABLED_STATUS_BIT, &wdt_status)) {
+ inb_p(SBC7240_DISABLE_PORT);
+ printk(KERN_INFO SBC7240_PREFIX
+ "Watchdog timer is now disabled.\n");
+ }
+}
+
+static void wdt_enable(void)
+{
+ /* enable the watchdog */
+ if (!test_and_set_bit(SBC7240_ENABLED_STATUS_BIT, &wdt_status)) {
+ inb_p(SBC7240_ENABLE_PORT);
+ printk(KERN_INFO SBC7240_PREFIX
+ "Watchdog timer is now enabled.\n");
+ }
+}
+
+static int wdt_set_timeout(int t)
+{
+ if (t < 1 || t > SBC7240_MAX_TIMEOUT) {
+ printk(KERN_ERR SBC7240_PREFIX
+ "timeout value must be 1<=x<=%d\n",
+ SBC7240_MAX_TIMEOUT);
+ return -1;
+ }
+ /* set the timeout */
+ outb_p((unsigned)t, SBC7240_SET_TIMEOUT_PORT);
+ timeout = t;
+ printk(KERN_INFO SBC7240_PREFIX "timeout set to %d seconds\n", t);
+ return 0;
+}
+
+/* Whack the dog */
+static inline void wdt_keepalive(void)
+{
+ if (test_bit(SBC7240_ENABLED_STATUS_BIT, &wdt_status))
+ inb_p(SBC7240_ENABLE_PORT);
+}
+
+/*
+ * /dev/watchdog handling
+ */
+static ssize_t fop_write(struct file *file, const char __user *buf,
+ size_t count, loff_t *ppos)
+{
+ size_t i;
+ char c;
+
+ if (count) {
+ if (!nowayout) {
+ clear_bit(SBC7240_EXPECT_CLOSE_STATUS_BIT,
+ &wdt_status);
+
+ /* is there a magic char ? */
+ for (i = 0; i != count; i++) {
+ if (get_user(c, buf + i))
+ return -EFAULT;
+ if (c == SBC7240_MAGIC_CHAR) {
+ set_bit(SBC7240_EXPECT_CLOSE_STATUS_BIT,
+ &wdt_status);
+ break;
+ }
+ }
+ }
+
+ wdt_keepalive();
+ }
+
+ return count;
+}
+
+static int fop_open(struct inode *inode, struct file *file)
+{
+ if (test_and_set_bit(SBC7240_OPEN_STATUS_BIT, &wdt_status))
+ return -EBUSY;
+
+ wdt_enable();
+
+ return nonseekable_open(inode, file);
+}
+
+static int fop_close(struct inode *inode, struct file *file)
+{
+ if (test_and_clear_bit(SBC7240_EXPECT_CLOSE_STATUS_BIT, &wdt_status)
+ || !nowayout) {
+ wdt_disable();
+ } else {
+ printk(KERN_CRIT SBC7240_PREFIX
+ "Unexpected close, not stopping watchdog!\n");
+ wdt_keepalive();
+ }
+
+ clear_bit(SBC7240_OPEN_STATUS_BIT, &wdt_status);
+ return 0;
+}
+
+static struct watchdog_info ident = {
+ .options = WDIOF_KEEPALIVEPING|
+ WDIOF_SETTIMEOUT|
+ WDIOF_MAGICCLOSE,
+ .firmware_version = 1,
+ .identity = "SBC7240",
+};
+
+
+static int fop_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ switch (cmd) {
+ case WDIOC_GETSUPPORT:
+ return copy_to_user
+ ((void __user *)arg, &ident, sizeof(ident))
+ ? -EFAULT : 0;
+ case WDIOC_GETSTATUS:
+ case WDIOC_GETBOOTSTATUS:
+ return put_user(0, (int __user *)arg);
+ case WDIOC_KEEPALIVE:
+ wdt_keepalive();
+ return 0;
+ case WDIOC_SETOPTIONS:{
+ int options;
+ int retval = -EINVAL;
+
+ if (get_user(options, (int __user *)arg))
+ return -EFAULT;
+
+ if (options & WDIOS_DISABLECARD) {
+ wdt_disable();
+ retval = 0;
+ }
+
+ if (options & WDIOS_ENABLECARD) {
+ wdt_enable();
+ retval = 0;
+ }
+
+ return retval;
+ }
+ case WDIOC_SETTIMEOUT:{
+ int new_timeout;
+
+ if (get_user(new_timeout, (int __user *)arg))
+ return -EFAULT;
+
+ if (wdt_set_timeout(new_timeout))
+ return -EINVAL;
+
+ /* Fall through */
+ }
+ case WDIOC_GETTIMEOUT:
+ return put_user(timeout, (int __user *)arg);
+ default:
+ return -ENOTTY;
+ }
+}
+
+static const struct file_operations wdt_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .write = fop_write,
+ .open = fop_open,
+ .release = fop_close,
+ .ioctl = fop_ioctl,
+};
+
+static struct miscdevice wdt_miscdev = {
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &wdt_fops,
+};
+
+/*
+ * Notifier for system down
+ */
+
+static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
+ void *unused)
+{
+ if (code == SYS_DOWN || code == SYS_HALT)
+ wdt_disable();
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block wdt_notifier = {
+ .notifier_call = wdt_notify_sys,
+};
+
+static void __exit sbc7240_wdt_unload(void)
+{
+ printk(KERN_INFO SBC7240_PREFIX "Removing watchdog\n");
+ misc_deregister(&wdt_miscdev);
+
+ unregister_reboot_notifier(&wdt_notifier);
+ release_region(SBC7240_ENABLE_PORT, 1);
+}
+
+static int __init sbc7240_wdt_init(void)
+{
+ int rc = -EBUSY;
+
+ if (!request_region(SBC7240_ENABLE_PORT, 1, "SBC7240 WDT")) {
+ printk(KERN_ERR SBC7240_PREFIX
+ "I/O address 0x%04x already in use\n",
+ SBC7240_ENABLE_PORT);
+ rc = -EIO;
+ goto err_out;
+ }
+
+ /* The IO port 0x043 used to disable the watchdog
+ * is already claimed by the system timer, so we
+ * cant request_region() it ...*/
+
+ if (timeout < 1 || timeout > SBC7240_MAX_TIMEOUT) {
+ timeout = SBC7240_TIMEOUT;
+ printk(KERN_INFO SBC7240_PREFIX
+ "timeout value must be 1<=x<=%d, using %d\n",
+ SBC7240_MAX_TIMEOUT, timeout);
+ }
+ wdt_set_timeout(timeout);
+ wdt_disable();
+
+ rc = register_reboot_notifier(&wdt_notifier);
+ if (rc) {
+ printk(KERN_ERR SBC7240_PREFIX
+ "cannot register reboot notifier (err=%d)\n", rc);
+ goto err_out_region;
+ }
+
+ rc = misc_register(&wdt_miscdev);
+ if (rc) {
+ printk(KERN_ERR SBC7240_PREFIX
+ "cannot register miscdev on minor=%d (err=%d)\n",
+ wdt_miscdev.minor, rc);
+ goto err_out_reboot_notifier;
+ }
+
+ printk(KERN_INFO SBC7240_PREFIX
+ "Watchdog driver for SBC7240 initialised (nowayout=%d)\n",
+ nowayout);
+
+ return 0;
+
+err_out_reboot_notifier:
+ unregister_reboot_notifier(&wdt_notifier);
+err_out_region:
+ release_region(SBC7240_ENABLE_PORT, 1);
+err_out:
+ return rc;
+}
+
+module_init(sbc7240_wdt_init);
+module_exit(sbc7240_wdt_unload);
+
+MODULE_AUTHOR("Gilles Gigan");
+MODULE_DESCRIPTION("Watchdog device driver for single board"
+ " computers EPIC Nano 7240 from iEi");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
+
/* we will autodetect the W83697HF/HG watchdog */
for (i = 0; ((!found) && (w83697hf_ioports[i] != 0)); i++) {
wdt_io = w83697hf_ioports[i];
- if (!w83697hf_check_wdt())
+ if (!w83697hf_check_wdt()) {
found++;
+ break;
+ }
}
} else {
if (!w83697hf_check_wdt())
#define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */
#define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */
+#define CKEN_AC97CONF (31) /* AC97 Controller Configuration */
#define CKEN_CAMERA (24) /* Camera Interface Clock Enable */
#define CKEN_SSP1 (23) /* SSP1 Unit Clock Enable */
#define CKEN_MEMC (22) /* Memory Controller Clock Enable */
#define Au1500_PCI_MEM_START 0x440000000ULL
#define Au1500_PCI_MEM_END 0x44FFFFFFFULL
-#define PCI_IO_START (Au1500_PCI_IO_START + 0x1000)
-#define PCI_IO_END (Au1500_PCI_IO_END)
-#define PCI_MEM_START (Au1500_PCI_MEM_START)
-#define PCI_MEM_END (Au1500_PCI_MEM_END)
+#define PCI_IO_START 0x00001000
+#define PCI_IO_END 0x000FFFFF
+#define PCI_MEM_START 0x40000000
+#define PCI_MEM_END 0x4FFFFFFF
+
#define PCI_FIRST_DEVFN (0<<3)
#define PCI_LAST_DEVFN (19<<3)
#define CICR_IEN ((uint)0x00000080) /* Int. enable */
#define CICR_SPS ((uint)0x00000001) /* SCC Spread */
-extern void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id);
-extern void cpm_free_handler(int vec);
-
#define IMAP_ADDR (get_immrbase())
#define CPM_PIN_INPUT 0
static inline int pud_present(pud_t pud)
{
- return pud_val(pud) & _REGION_ENTRY_ORIGIN;
+ return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
}
static inline int pud_none(pud_t pud)
{
- return pud_val(pud) & _REGION_ENTRY_INV;
+ return (pud_val(pud) & _REGION_ENTRY_INV) != 0UL;
}
static inline int pud_bad(pud_t pud)
static inline int pmd_present(pmd_t pmd)
{
- return pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN;
+ return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;
}
static inline int pmd_none(pmd_t pmd)
{
- return pmd_val(pmd) & _SEGMENT_ENTRY_INV;
+ return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
}
static inline int pmd_bad(pmd_t pmd)
#define NR_SYSCALLS 315
+/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
+ * it never had the plain ones and there is no value to adding those
+ * old versions into the syscall table.
+ */
+#define __IGNORE_setresuid
+#define __IGNORE_getresuid
+#define __IGNORE_setresgid
+#define __IGNORE_getresgid
+
#ifdef __KERNEL__
#define __ARCH_WANT_IPC_PARSE_VERSION
#define __ARCH_WANT_OLD_READDIR
*/
#define HV_FAST_MMU_DEMAP_ALL 0x24
+#ifndef __ASSEMBLY__
+extern void sun4v_mmu_demap_all(void);
+#endif
+
/* mmu_map_perm_addr()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_MMU_MAP_PERM_ADDR
#ifdef CONFIG_BLK_DEV_IDEDMA
int __ide_dma_bad_drive(ide_drive_t *);
+int ide_id_dma_bug(ide_drive_t *);
u8 ide_find_dma_mode(ide_drive_t *, u8);
}
void ide_dma_off(ide_drive_t *);
-void ide_dma_verbose(ide_drive_t *);
int ide_set_dma(ide_drive_t *);
ide_startstop_t ide_dma_intr(ide_drive_t *);
#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
#else
+static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
static inline void ide_dma_off(ide_drive_t *drive) { ; }
hwif->hwif_data = data;
}
-/* ide-lib.c */
-extern char *ide_xfer_verbose(u8 xfer_rate);
+const char *ide_xfer_verbose(u8 mode);
extern void ide_toggle_bounce(ide_drive_t *drive, int on);
extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
extern int nf_bridge_copy_header(struct sk_buff *skb);
static inline int nf_bridge_maybe_copy_header(struct sk_buff *skb)
{
- if (skb->nf_bridge)
+ if (skb->nf_bridge &&
+ skb->nf_bridge->mask & (BRNF_BRIDGED | BRNF_BRIDGED_DNAT))
return nf_bridge_copy_header(skb);
return 0;
}
ax25_link_failed(ax25, reason);
if (ax25->sk != NULL) {
+ local_bh_disable();
bh_lock_sock(ax25->sk);
ax25->sk->sk_state = TCP_CLOSE;
ax25->sk->sk_err = reason;
sock_set_flag(ax25->sk, SOCK_DEAD);
}
bh_unlock_sock(ax25->sk);
+ local_bh_enable();
}
}
void br_dev_setup(struct net_device *dev)
{
- memset(dev->dev_addr, 0, ETH_ALEN);
-
+ random_ether_addr(dev->dev_addr);
ether_setup(dev);
dev->do_ioctl = br_dev_ioctl;
/*
* Decode any IP configuration options in the "ip=" or "nfsaddrs=" kernel
- * command line parameter. It consists of option fields separated by colons in
- * the following order:
- *
- * <client-ip>:<server-ip>:<gw-ip>:<netmask>:<host name>:<device>:<PROTO>
- *
- * Any of the fields can be empty which means to use a default value:
- * <client-ip> - address given by BOOTP or RARP
- * <server-ip> - address of host returning BOOTP or RARP packet
- * <gw-ip> - none, or the address returned by BOOTP
- * <netmask> - automatically determined from <client-ip>, or the
- * one returned by BOOTP
- * <host name> - <client-ip> in ASCII notation, or the name returned
- * by BOOTP
- * <device> - use all available devices
- * <PROTO>:
- * off|none - don't do autoconfig at all (DEFAULT)
- * on|any - use any configured protocol
- * dhcp|bootp|rarp - use only the specified protocol
- * both - use both BOOTP and RARP (not DHCP)
+ * command line parameter. See Documentation/nfsroot.txt.
*/
static int __init ic_proto_name(char *name)
{
return xt_compat_match_to_user(m, dstptr, size);
}
-static int compat_copy_entry_to_user(struct ipt_entry *e,
- void __user **dstptr, compat_uint_t *size)
+static int
+compat_copy_entry_to_user(struct ipt_entry *e, void __user **dstptr,
+ compat_uint_t *size, struct xt_counters *counters,
+ unsigned int *i)
{
struct ipt_entry_target *t;
struct compat_ipt_entry __user *ce;
if (copy_to_user(ce, e, sizeof(struct ipt_entry)))
goto out;
+ if (copy_to_user(&ce->counters, &counters[*i], sizeof(counters[*i])))
+ goto out;
+
*dstptr += sizeof(struct compat_ipt_entry);
ret = IPT_MATCH_ITERATE(e, compat_copy_match_to_user, dstptr, size);
target_offset = e->target_offset - (origsize - *size);
goto out;
if (put_user(next_offset, &ce->next_offset))
goto out;
+
+ (*i)++;
return 0;
out:
return ret;
static int compat_copy_entries_to_user(unsigned int total_size,
struct xt_table *table, void __user *userptr)
{
- unsigned int off, num;
- struct compat_ipt_entry e;
struct xt_counters *counters;
struct xt_table_info *private = table->private;
void __user *pos;
unsigned int size;
int ret = 0;
void *loc_cpu_entry;
+ unsigned int i = 0;
counters = alloc_counters(table);
if (IS_ERR(counters))
pos = userptr;
size = total_size;
ret = IPT_ENTRY_ITERATE(loc_cpu_entry, total_size,
- compat_copy_entry_to_user, &pos, &size);
- if (ret)
- goto free_counters;
-
- /* ... then go back and fix counters and names */
- for (off = 0, num = 0; off < size; off += e.next_offset, num++) {
- unsigned int i;
- struct ipt_entry_match m;
- struct ipt_entry_target t;
+ compat_copy_entry_to_user,
+ &pos, &size, counters, &i);
- ret = -EFAULT;
- if (copy_from_user(&e, userptr + off,
- sizeof(struct compat_ipt_entry)))
- goto free_counters;
- if (copy_to_user(userptr + off +
- offsetof(struct compat_ipt_entry, counters),
- &counters[num], sizeof(counters[num])))
- goto free_counters;
-
- for (i = sizeof(struct compat_ipt_entry);
- i < e.target_offset; i += m.u.match_size) {
- if (copy_from_user(&m, userptr + off + i,
- sizeof(struct ipt_entry_match)))
- goto free_counters;
- if (copy_to_user(userptr + off + i +
- offsetof(struct ipt_entry_match, u.user.name),
- m.u.kernel.match->name,
- strlen(m.u.kernel.match->name) + 1))
- goto free_counters;
- }
-
- if (copy_from_user(&t, userptr + off + e.target_offset,
- sizeof(struct ipt_entry_target)))
- goto free_counters;
- if (copy_to_user(userptr + off + e.target_offset +
- offsetof(struct ipt_entry_target, u.user.name),
- t.u.kernel.target->name,
- strlen(t.u.kernel.target->name) + 1))
- goto free_counters;
- }
- ret = 0;
-free_counters:
vfree(counters);
return ret;
}
}
if (dst_metric(dst, RTAX_RTTVAR) > tp->mdev) {
tp->mdev = dst_metric(dst, RTAX_RTTVAR);
- tp->mdev_max = tp->rttvar = max(tp->mdev, TCP_RTO_MIN);
+ tp->mdev_max = tp->rttvar = max(tp->mdev, tcp_rto_min(sk));
}
tcp_set_rto(sk);
tcp_bound_rto(sk);
break;
default:
- return -EINVAL;
+ return -ENOPROTOOPT;
}
len = min_t(unsigned int, sizeof(int), len);
if(put_user(len, optlen))
err = do_ipv6_getsockopt(sk, level, optname, optval, optlen);
#ifdef CONFIG_NETFILTER
- /* we need to exclude all possible EINVALs except default case */
- if (err == -EINVAL && optname != IPV6_ADDRFORM &&
- optname != MCAST_MSFILTER) {
+ /* we need to exclude all possible ENOPROTOOPTs except default case */
+ if (err == -ENOPROTOOPT && optname != IPV6_2292PKTOPTIONS) {
int len;
if (get_user(len, optlen))
err = do_ipv6_getsockopt(sk, level, optname, optval, optlen);
#ifdef CONFIG_NETFILTER
- /* we need to exclude all possible EINVALs except default case */
- if (err == -EINVAL && optname != IPV6_ADDRFORM &&
- optname != MCAST_MSFILTER) {
+ /* we need to exclude all possible ENOPROTOOPTs except default case */
+ if (err == -ENOPROTOOPT && optname != IPV6_2292PKTOPTIONS) {
int len;
if (get_user(len, optlen))
/* Final cleanup */
del_timer(&link->idle_timer);
link->magic = 0;
+ hashbin_delete(link->lsaps, (FREE_FUNC) __irlmp_close_lsap);
kfree(link);
}
}
int n = 0;
IRDA_ASSERT(buf != NULL, return ret;);
- IRDA_ASSERT(info != 0, return ret;);
+ IRDA_ASSERT(info != NULL, return ret;);
pi_minor = pi & info->pi_mask;
pi_major = pi >> info->pi_major_offset;
int n = 0;
IRDA_ASSERT(buf != NULL, return ret;);
- IRDA_ASSERT(info != 0, return ret;);
+ IRDA_ASSERT(info != NULL, return ret;);
pi_minor = buf[n] & info->pi_mask;
pi_major = buf[n] >> info->pi_major_offset;
int n = 0;
IRDA_ASSERT(buf != NULL, return ret;);
- IRDA_ASSERT(info != 0, return ret;);
+ IRDA_ASSERT(info != NULL, return ret;);
/*
* Parse all parameters. Each parameter must be at least two bytes
}
/* setup master conntrack: this is a confirmed expectation */
- if (master_ct)
+ if (master_ct) {
+ __set_bit(IPS_EXPECTED_BIT, &ct->status);
ct->master = master_ct;
+ }
add_timer(&ct->timeout);
nf_conntrack_hash_insert(ct);
u_int16_t msize = m->u.user.match_size - off;
if (copy_to_user(cm, m, sizeof(*cm)) ||
- put_user(msize, &cm->u.user.match_size))
+ put_user(msize, &cm->u.user.match_size) ||
+ copy_to_user(cm->u.user.name, m->u.kernel.match->name,
+ strlen(m->u.kernel.match->name) + 1))
return -EFAULT;
if (match->compat_to_user) {
u_int16_t tsize = t->u.user.target_size - off;
if (copy_to_user(ct, t, sizeof(*ct)) ||
- put_user(tsize, &ct->u.user.target_size))
+ put_user(tsize, &ct->u.user.target_size) ||
+ copy_to_user(ct->u.user.name, t->u.kernel.target->name,
+ strlen(t->u.kernel.target->name) + 1))
return -EFAULT;
if (target->compat_to_user) {
static bool select_gc(const struct xt_hashlimit_htable *ht,
const struct dsthash_ent *he)
{
- return jiffies >= he->expires;
+ return time_after_eq(jiffies, he->expires);
}
static void htable_selective_cleanup(struct xt_hashlimit_htable *ht,
struct sctp_ulpevent *);
static struct sctp_ulpevent * sctp_ulpq_order(struct sctp_ulpq *,
struct sctp_ulpevent *);
+static void sctp_ulpq_reasm_drain(struct sctp_ulpq *ulpq);
/* 1st Level Abstractions */
static int sctp_ulpq_clear_pd(struct sctp_ulpq *ulpq)
{
ulpq->pd_mode = 0;
+ sctp_ulpq_reasm_drain(ulpq);
return sctp_clear_pd(ulpq->asoc->base.sk, ulpq->asoc);
}
}
}
+/*
+ * Drain the reassembly queue. If we just cleared parted delivery, it
+ * is possible that the reassembly queue will contain already reassembled
+ * messages. Retrieve any such messages and give them to the user.
+ */
+static void sctp_ulpq_reasm_drain(struct sctp_ulpq *ulpq)
+{
+ struct sctp_ulpevent *event = NULL;
+ struct sk_buff_head temp;
+
+ if (skb_queue_empty(&ulpq->reasm))
+ return;
+
+ while ((event = sctp_ulpq_retrieve_reassembled(ulpq)) != NULL) {
+ /* Do ordering if needed. */
+ if ((event) && (event->msg_flags & MSG_EOR)){
+ skb_queue_head_init(&temp);
+ __skb_queue_tail(&temp, sctp_event2skb(event));
+
+ event = sctp_ulpq_order(ulpq, event);
+ }
+
+ /* Send event to the ULP. 'event' is the
+ * sctp_ulpevent for very first SKB on the temp' list.
+ */
+ if (event)
+ sctp_ulpq_tail_event(ulpq, event);
+ }
+}
+
+
/* Helper function to gather skbs that have possibly become
* ordered by an an incoming chunk.
*/
dbg("sock_delete: %x\n",tsock);
if (!tsock)
return 0;
- down_interruptible(&tsock->sem);
+ down(&tsock->sem);
if (!sock->sk) {
up(&tsock->sem);
return 0;
xfrm_audit_state_add(struct xfrm_state *x, int result, u32 auid, u32 sid)
{
struct audit_buffer *audit_buf;
+ u32 spi;
extern int audit_enabled;
if (audit_enabled == 0)
return;
audit_log_format(audit_buf, " op=SAD-add res=%u",result);
xfrm_audit_common_stateinfo(x, audit_buf);
- audit_log_format(audit_buf, " spi=%lu(0x%lx)",
- (unsigned long)x->id.spi, (unsigned long)x->id.spi);
+ spi = ntohl(x->id.spi);
+ audit_log_format(audit_buf, " spi=%u(0x%x)", spi, spi);
audit_log_end(audit_buf);
}
EXPORT_SYMBOL_GPL(xfrm_audit_state_add);
xfrm_audit_state_delete(struct xfrm_state *x, int result, u32 auid, u32 sid)
{
struct audit_buffer *audit_buf;
+ u32 spi;
extern int audit_enabled;
if (audit_enabled == 0)
return;
audit_log_format(audit_buf, " op=SAD-delete res=%u",result);
xfrm_audit_common_stateinfo(x, audit_buf);
- audit_log_format(audit_buf, " spi=%lu(0x%lx)",
- (unsigned long)x->id.spi, (unsigned long)x->id.spi);
+ spi = ntohl(x->id.spi);
+ audit_log_format(audit_buf, " spi=%u(0x%x)", spi, spi);
audit_log_end(audit_buf);
}
EXPORT_SYMBOL_GPL(xfrm_audit_state_delete);
test ! -r $2/Makefile -o -O $2/Makefile || exit 0
# Only overwrite automatically generated Makefiles
# (so we do not overwrite kernel Makefile)
-if ! grep -q Automatically $2/Makefile
+if test -e $2/Makefile && ! grep -q Automatically $2/Makefile
then
exit 0
fi
gsr_bits = 0;
#ifdef CONFIG_PXA27x
/* PXA27x Developers Manual section 13.5.2.2.1 */
- pxa_set_cken(1 << 31, 1);
+ pxa_set_cken(CKEN_AC97CONF, 1);
udelay(5);
- pxa_set_cken(1 << 31, 0);
+ pxa_set_cken(CKEN_AC97CONF, 0);
GCR = GCR_COLD_RST;
udelay(50);
#else
gsr_bits = 0;
#ifdef CONFIG_PXA27x
/* PXA27x Developers Manual section 13.5.2.2.1 */
- pxa_set_cken(31, 1);
+ pxa_set_cken(CKEN_AC97CONF, 1);
udelay(5);
- pxa_set_cken(31, 0);
+ pxa_set_cken(CKEN_AC97CONF, 0);
GCR = GCR_COLD_RST;
udelay(50);
#else
projects / linux-2.6 / commitdiff