Move Sibyte Kconfig stuff into it's own Kconfig.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index bfd5014a8afe7694f88c03eda9cf1e096029325a..87f860feb8450ac74e4cd0e8f225abba17b33549 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -749,222 +749,6 @@ config MIPS_MTX1
 
 endchoice
 
-config SIBYTE_SB1xxx_SOC
-       bool "Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)"
-       depends on EXPERIMENTAL
-       select BOOT_ELF32
-       select DMA_COHERENT
-       select SWAP_IO_SPACE
-       select SYS_SUPPORTS_32BIT_KERNEL
-       select SYS_SUPPORTS_64BIT_KERNEL
-
-choice
-       prompt "BCM1xxx SOC-based board"
-       depends on SIBYTE_SB1xxx_SOC
-       default SIBYTE_SWARM
-       help
-         Enable support for boards based on the SiByte line of SOCs
-         from Broadcom.  There are configurations for the known
-         evaluation boards, or you can choose "Other" and add your
-         own board support code.
-
-config SIBYTE_SWARM
-       bool "BCM91250A-SWARM"
-       select SIBYTE_SB1250
-
-config SIBYTE_SENTOSA
-       bool "BCM91250E-Sentosa"
-       select SIBYTE_SB1250
-
-config SIBYTE_RHONE
-       bool "BCM91125E-Rhone"
-       select SIBYTE_BCM1125H
-
-config SIBYTE_CARMEL
-       bool "BCM91120x-Carmel"
-       select SIBYTE_BCM1120
-
-config SIBYTE_PTSWARM
-       bool "BCM91250PT-PTSWARM"
-       select SIBYTE_SB1250
-
-config SIBYTE_LITTLESUR
-       bool "BCM91250C2-LittleSur"
-       select SIBYTE_SB1250
-
-config SIBYTE_CRHINE
-       bool "BCM91120C-CRhine"
-       select SIBYTE_BCM1120
-
-config SIBYTE_CRHONE
-       bool "BCM91125C-CRhone"
-       select SIBYTE_BCM1125
-
-config SIBYTE_UNKNOWN
-       bool "Other"
-
-endchoice
-
-config SIBYTE_BOARD
-       bool
-       depends on SIBYTE_SB1xxx_SOC && !SIBYTE_UNKNOWN
-       default y
-
-choice
-       prompt "BCM1xxx SOC Type"
-       depends on SIBYTE_UNKNOWN
-       default SIBYTE_UNK_BCM1250
-       help
-         Since you haven't chosen a known evaluation board from
-         Broadcom, you must explicitly pick the SOC this kernel is
-         targetted for.
-
-config SIBYTE_UNK_BCM1250
-       bool "BCM1250"
-       select SIBYTE_SB1250
-
-config SIBYTE_UNK_BCM1120
-       bool "BCM1120"
-       select SIBYTE_BCM1120
-
-config SIBYTE_UNK_BCM1125
-       bool "BCM1125"
-       select SIBYTE_BCM1125
-
-config SIBYTE_UNK_BCM1125H
-       bool "BCM1125H"
-       select SIBYTE_BCM1125H
-
-endchoice
-
-config SIBYTE_SB1250
-       bool
-       select HW_HAS_PCI
-
-config SIBYTE_BCM1120
-       bool
-       select SIBYTE_BCM112X
-
-config SIBYTE_BCM1125
-       bool
-       select HW_HAS_PCI
-       select SIBYTE_BCM112X
-
-config SIBYTE_BCM1125H
-       bool
-       select HW_HAS_PCI
-       select SIBYTE_BCM112X
-
-config SIBYTE_BCM112X
-       bool
-
-choice
-       prompt "SiByte SOC Stepping"
-       depends on SIBYTE_SB1xxx_SOC
-
-config CPU_SB1_PASS_1
-       bool "1250 Pass1"
-       depends on SIBYTE_SB1250
-       select CPU_HAS_PREFETCH
-
-config CPU_SB1_PASS_2_1250
-       bool "1250 An"
-       depends on SIBYTE_SB1250
-       select CPU_SB1_PASS_2
-       help
-         Also called BCM1250 Pass 2
-
-config CPU_SB1_PASS_2_2
-       bool "1250 Bn"
-       depends on SIBYTE_SB1250
-       select CPU_HAS_PREFETCH
-       help
-         Also called BCM1250 Pass 2.2
-
-config CPU_SB1_PASS_4
-       bool "1250 Cn"
-       depends on SIBYTE_SB1250
-       select CPU_HAS_PREFETCH
-       help
-         Also called BCM1250 Pass 3
-
-config CPU_SB1_PASS_2_112x
-       bool "112x Hybrid"
-       depends on SIBYTE_BCM112X
-       select CPU_SB1_PASS_2
-
-config CPU_SB1_PASS_3
-       bool "112x An"
-       depends on SIBYTE_BCM112X
-       select CPU_HAS_PREFETCH
-
-endchoice
-
-config CPU_SB1_PASS_2
-       bool
-
-config SIBYTE_HAS_LDT
-       bool
-       depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
-       default y
-
-config SIMULATION
-       bool "Running under simulation"
-       depends on SIBYTE_SB1xxx_SOC
-       help
-         Build a kernel suitable for running under the GDB simulator.
-         Primarily adjusts the kernel's notion of time.
-
-config SIBYTE_CFE
-       bool "Booting from CFE"
-       depends on SIBYTE_SB1xxx_SOC
-       help
-         Make use of the CFE API for enumerating available memory,
-         controlling secondary CPUs, and possibly console output.
-
-config SIBYTE_CFE_CONSOLE
-       bool "Use firmware console"
-       depends on SIBYTE_CFE
-       help
-         Use the CFE API's console write routines during boot.  Other console
-         options (VT console, sb1250 duart console, etc.) should not be
-         configured.
-
-config SIBYTE_STANDALONE
-       bool
-       depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
-       default y
-
-config SIBYTE_STANDALONE_RAM_SIZE
-       int "Memory size (in megabytes)"
-       depends on SIBYTE_STANDALONE
-       default "32"
-
-config SIBYTE_BUS_WATCHER
-       bool "Support for Bus Watcher statistics"
-       depends on SIBYTE_SB1xxx_SOC
-       help
-         Handle and keep statistics on the bus error interrupts (COR_ECC,
-         BAD_ECC, IO_BUS).
-
-config SIBYTE_BW_TRACE
-       bool "Capture bus trace before bus error"
-       depends on SIBYTE_BUS_WATCHER
-       help
-         Run a continuous bus trace, dumping the raw data as soon as
-         a ZBbus error is detected.  Cannot work if ZBbus profiling
-         is turned on, and also will interfere with JTAG-based trace
-         buffer activity.  Raw buffer data is dumped to console, and
-         must be processed off-line.
-
-config SIBYTE_SB1250_PROF
-       bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
-       depends on SIBYTE_SB1xxx_SOC
-
-config SIBYTE_TBPROF
-       bool "Support for ZBbus profiling"
-       depends on SIBYTE_SB1xxx_SOC
-
 config SNI_RM200_PCI
        bool "Support for SNI RM200 PCI"
        select ARC
@@ -1002,6 +786,8 @@ config TOSHIBA_FPCIB0
        bool "FPCIB0 Backplane Support"
        depends on TOSHIBA_RBTX4927
 
+source "arch/mips/sibyte/Kconfig"
+
 config RWSEM_GENERIC_SPINLOCK
        bool
        default y

diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
new file mode 100644 (file)
index 0000000..3618d61
--- /dev/null
+++ b/arch/mips/sibyte/Kconfig
@@ -0,0 +1,143 @@
+config SIBYTE_SB1250
+       bool
+       select HW_HAS_PCI
+       select SIBYTE_HAS_LDT
+       select SIBYTE_SB1xxx_SOC
+
+config SIBYTE_BCM1120
+       bool
+       select SIBYTE_BCM112X
+       select SIBYTE_SB1xxx_SOC
+
+config SIBYTE_BCM1125
+       bool
+       select HW_HAS_PCI
+       select SIBYTE_BCM112X
+       select SIBYTE_SB1xxx_SOC
+
+config SIBYTE_BCM1125H
+       bool
+       select HW_HAS_PCI
+       select SIBYTE_BCM112X
+       select SIBYTE_HAS_LDT
+       select SIBYTE_SB1xxx_SOC
+
+config SIBYTE_BCM112X
+       bool
+       select SIBYTE_SB1xxx_SOC
+
+config SIBYTE_SB1xxx_SOC
+       bool
+       depends on EXPERIMENTAL
+       select DMA_COHERENT
+       select SIBYTE_CFE
+       select SWAP_IO_SPACE
+       select SYS_SUPPORTS_32BIT_KERNEL
+       select SYS_SUPPORTS_64BIT_KERNEL
+
+choice
+       prompt "SiByte SOC Stepping"
+       depends on SIBYTE_SB1xxx_SOC
+
+config CPU_SB1_PASS_1
+       bool "1250 Pass1"
+       depends on SIBYTE_SB1250
+       select CPU_HAS_PREFETCH
+
+config CPU_SB1_PASS_2_1250
+       bool "1250 An"
+       depends on SIBYTE_SB1250
+       select CPU_SB1_PASS_2
+       help
+         Also called BCM1250 Pass 2
+
+config CPU_SB1_PASS_2_2
+       bool "1250 Bn"
+       depends on SIBYTE_SB1250
+       select CPU_HAS_PREFETCH
+       help
+         Also called BCM1250 Pass 2.2
+
+config CPU_SB1_PASS_4
+       bool "1250 Cn"
+       depends on SIBYTE_SB1250
+       select CPU_HAS_PREFETCH
+       help
+         Also called BCM1250 Pass 3
+
+config CPU_SB1_PASS_2_112x
+       bool "112x Hybrid"
+       depends on SIBYTE_BCM112X
+       select CPU_SB1_PASS_2
+
+config CPU_SB1_PASS_3
+       bool "112x An"
+       depends on SIBYTE_BCM112X
+       select CPU_HAS_PREFETCH
+
+endchoice
+
+config CPU_SB1_PASS_2
+       bool
+
+config SIBYTE_HAS_LDT
+       bool
+       depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
+       default y
+
+config SIMULATION
+       bool "Running under simulation"
+       depends on SIBYTE_SB1xxx_SOC
+       help
+         Build a kernel suitable for running under the GDB simulator.
+         Primarily adjusts the kernel's notion of time.
+
+config SIBYTE_CFE
+       bool "Booting from CFE"
+       depends on SIBYTE_SB1xxx_SOC
+       help
+         Make use of the CFE API for enumerating available memory,
+         controlling secondary CPUs, and possibly console output.
+
+config SIBYTE_CFE_CONSOLE
+       bool "Use firmware console"
+       depends on SIBYTE_CFE
+       help
+         Use the CFE API's console write routines during boot.  Other console
+         options (VT console, sb1250 duart console, etc.) should not be
+         configured.
+
+config SIBYTE_STANDALONE
+       bool
+       depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
+       default y
+
+config SIBYTE_STANDALONE_RAM_SIZE
+       int "Memory size (in megabytes)"
+       depends on SIBYTE_STANDALONE
+       default "32"
+
+config SIBYTE_BUS_WATCHER
+       bool "Support for Bus Watcher statistics"
+       depends on SIBYTE_SB1xxx_SOC
+       help
+         Handle and keep statistics on the bus error interrupts (COR_ECC,
+         BAD_ECC, IO_BUS).
+
+config SIBYTE_BW_TRACE
+       bool "Capture bus trace before bus error"
+       depends on SIBYTE_BUS_WATCHER
+       help
+         Run a continuous bus trace, dumping the raw data as soon as
+         a ZBbus error is detected.  Cannot work if ZBbus profiling
+         is turned on, and also will interfere with JTAG-based trace
+         buffer activity.  Raw buffer data is dumped to console, and
+         must be processed off-line.
+
+config SIBYTE_SB1250_PROF
+       bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
+       depends on SIBYTE_SB1xxx_SOC
+
+config SIBYTE_TBPROF
+       bool "Support for ZBbus profiling"
+       depends on SIBYTE_SB1xxx_SOC