TPM_PROTECTED_ORDINAL_MASK];
if (duration_idx != TPM_UNDEFINED)
- duration = chip->vendor.duration[duration_idx] * HZ / 1000;
+ duration = chip->vendor.duration[duration_idx];
if (duration <= 0)
return 2 * 60 * HZ;
else
timeout =
be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_1_IDX)));
if (timeout)
- chip->vendor.timeout_a = timeout;
+ chip->vendor.timeout_a = msecs_to_jiffies(timeout);
timeout =
be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_2_IDX)));
if (timeout)
- chip->vendor.timeout_b = timeout;
+ chip->vendor.timeout_b = msecs_to_jiffies(timeout);
timeout =
be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_3_IDX)));
if (timeout)
- chip->vendor.timeout_c = timeout;
+ chip->vendor.timeout_c = msecs_to_jiffies(timeout);
timeout =
be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_4_IDX)));
if (timeout)
- chip->vendor.timeout_d = timeout;
+ chip->vendor.timeout_d = msecs_to_jiffies(timeout);
duration:
memcpy(data, tpm_cap, sizeof(tpm_cap));
return;
chip->vendor.duration[TPM_SHORT] =
- be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_1_IDX)));
+ msecs_to_jiffies(be32_to_cpu
+ (*((__be32 *) (data +
+ TPM_GET_CAP_RET_UINT32_1_IDX))));
chip->vendor.duration[TPM_MEDIUM] =
- be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_2_IDX)));
+ msecs_to_jiffies(be32_to_cpu
+ (*((__be32 *) (data +
+ TPM_GET_CAP_RET_UINT32_2_IDX))));
chip->vendor.duration[TPM_LONG] =
- be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_3_IDX)));
+ msecs_to_jiffies(be32_to_cpu
+ (*((__be32 *) (data +
+ TPM_GET_CAP_RET_UINT32_3_IDX))));
}
EXPORT_SYMBOL_GPL(tpm_get_timeouts);
struct attribute_group *attr_group;
struct list_head list;
int locality;
- u32 timeout_a, timeout_b, timeout_c, timeout_d;
- u32 duration[3];
+ unsigned long timeout_a, timeout_b, timeout_c, timeout_d; /* jiffies */
+ unsigned long duration[3]; /* jiffies */
wait_queue_head_t read_queue;
wait_queue_head_t int_queue;
TPM_INTF_DATA_AVAIL_INT = 0x001,
};
+enum tis_defaults {
+ TIS_SHORT_TIMEOUT = 750, /* ms */
+ TIS_LONG_TIMEOUT = 2000, /* 2 sec */
+};
+
#define TPM_ACCESS(l) (0x0000 | ((l) << 12))
#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
chip->vendor.iobase + TPM_ACCESS(l));
if (chip->vendor.irq) {
- rc = wait_event_interruptible_timeout(chip->vendor.
- int_queue,
+ rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
(check_locality
(chip, l) >= 0),
- msecs_to_jiffies
- (chip->vendor.
- timeout_a));
+ chip->vendor.timeout_a);
if (rc > 0)
return l;
} else {
/* wait for burstcount */
- stop = jiffies + (HZ * chip->vendor.timeout_a / 1000);
+ stop = jiffies + chip->vendor.timeout_a;
do {
if (check_locality(chip, l) >= 0)
return l;
/* wait for burstcount */
/* which timeout value, spec has 2 answers (c & d) */
- stop = jiffies + (HZ * chip->vendor.timeout_d / 1000);
+ stop = jiffies + chip->vendor.timeout_d;
do {
burstcnt = ioread8(chip->vendor.iobase +
TPM_STS(chip->vendor.locality) + 1);
return -EBUSY;
}
-static int wait_for_stat(struct tpm_chip *chip, u8 mask, u32 timeout,
+static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
wait_queue_head_t *queue)
{
unsigned long stop;
rc = wait_event_interruptible_timeout(*queue,
((tpm_tis_status
(chip) & mask) ==
- mask),
- msecs_to_jiffies
- (timeout));
+ mask), timeout);
if (rc > 0)
return 0;
} else {
- stop = jiffies + (HZ * timeout / 1000);
+ stop = jiffies + timeout;
do {
msleep(TPM_TIMEOUT);
status = tpm_tis_status(chip);
}
/* Default timeouts */
- chip->vendor.timeout_a = 750; /* ms */
- chip->vendor.timeout_b = 2000; /* 2 sec */
- chip->vendor.timeout_c = 750; /* ms */
- chip->vendor.timeout_d = 750; /* ms */
+ chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
+ chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
+ chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
+ chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
dev_info(&pnp_dev->dev,
"1.2 TPM (device-id 0x%X, rev-id %d)\n",