}
EXPORT_SYMBOL_GPL(virq_to_hw);
-struct irq_host *irq_alloc_host(unsigned int revmap_type,
- unsigned int revmap_arg,
- struct irq_host_ops *ops,
- irq_hw_number_t inval_irq)
+__init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
+ unsigned int revmap_arg,
+ struct irq_host_ops *ops,
+ irq_hw_number_t inval_irq)
{
struct irq_host *host;
unsigned int size = sizeof(struct irq_host);
spin_unlock(&hose_spinlock);
}
-struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
+__init_refok struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
{
struct pci_controller *phb;
subsys_initcall(pcibios_init);
-void __init pcibios_fixup_bus(struct pci_bus *bus)
+void pcibios_fixup_bus(struct pci_bus *bus)
{
struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
unsigned long io_offset;
* Called by setup_system after ppc_md->probe and ppc_md->early_init.
* Call it again after setting udbg_putc in ppc_md->setup_arch.
*/
-void register_early_udbg_console(void)
+void __init register_early_udbg_console(void)
{
if (early_console_initialized)
return;
}
}
-static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev)
+static void __init quirk_fsl_pcie_transparent(struct pci_dev *dev)
{
struct resource *res;
int i, res_idx = PCI_BRIDGE_RESOURCES;