{ 0xfffffee2, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
{ 0xfffffee4, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
{ 0xa4000016, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
- { 0xa4000018, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ4, IRQ5 } },
+ { 0xa4000018, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
{ 0xa400001a, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
{ 0xa4080000, 16, 4, /* IPRF */ { 0, 0, USB } },
{ 0xa4080002, 16, 4, /* IPRG */ { TPU0, TPU1 } },
defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709)
{ 0xa4000016, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
- { 0xa4000018, 16, 4, /* IPRD */ { 0, 0, IRQ4, IRQ5 } },
+ { 0xa4000018, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
{ 0xa400001a, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
{ 0xfffffee2, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
{ 0xfffffee4, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
{ 0xa4000016, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
- { 0xa4000018, 16, 4, /* IPRD */ { 0, 0, IRQ4, IRQ5 } },
+ { 0xa4000018, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
{ 0xa400001a, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } },
{ 0xa4080000, 16, 4, /* IPRF */ { 0, DMAC2 } },
#ifdef CONFIG_CPU_SUBTYPE_SH7710