#define CAC_BASE 0x80000000
#define IO_BASE 0xa0000000
#define UNCAC_BASE 0xa0000000
+
+#ifndef MAP_BASE
#define MAP_BASE 0xc0000000
+#endif
/*
* This handles the memory map.
* We handle pages at KSEG0 for kernels with 32 bit address space.
*/
+#ifndef PAGE_OFFSET
#define PAGE_OFFSET 0x80000000UL
+#endif
/*
* Memory above this physical address will be considered highmem.
/*
* This handles the memory map.
*/
+#ifndef PAGE_OFFSET
#ifdef CONFIG_DMA_NONCOHERENT
#define PAGE_OFFSET 0x9800000000000000UL
#else
#define PAGE_OFFSET 0xa800000000000000UL
#endif
+#endif
/*
* Memory above this physical address will be considered highmem.
#define HIGHMEM_START (1UL << 59UL)
#endif
+#ifndef CAC_BASE
#ifdef CONFIG_DMA_NONCOHERENT
#define CAC_BASE 0x9800000000000000UL
#else
#define CAC_BASE 0xa800000000000000UL
#endif
+#endif
+
+#ifndef IO_BASE
#define IO_BASE 0x9000000000000000UL
+#endif
+
+#ifndef UNCAC_BASE
#define UNCAC_BASE 0x9000000000000000UL
+#endif
+
+#ifndef MAP_BASE
#define MAP_BASE 0xc000000000000000UL
+#endif
#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
#define _ASM_MACH_IP22_SPACES_H
-#ifdef CONFIG_32BIT
-
-#define CAC_BASE 0x80000000
-#define IO_BASE 0xa0000000
-#define UNCAC_BASE 0xa0000000
-#define MAP_BASE 0xc0000000
-
-/*
- * This handles the memory map.
- * We handle pages at KSEG0 for kernels with 32 bit address space.
- */
-#define PAGE_OFFSET 0x80000000UL
-
-/*
- * Memory above this physical address will be considered highmem.
- */
-#ifndef HIGHMEM_START
-#define HIGHMEM_START 0x20000000UL
-#endif
-
-#endif /* CONFIG_32BIT */
-
#ifdef CONFIG_64BIT
-#define PAGE_OFFSET 0xffffffff80000000UL
-#ifndef HIGHMEM_START
-#define HIGHMEM_START (1UL << 59UL)
-#endif
+#define PAGE_OFFSET 0xffffffff80000000UL
#define CAC_BASE 0xffffffff80000000
#define IO_BASE 0xffffffffa0000000
#define UNCAC_BASE 0xffffffffa0000000
#define MAP_BASE 0xc000000000000000
-#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
-#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
-
#endif /* CONFIG_64BIT */
+#include <asm/mach-generic/spaces.h>
+
#endif /* __ASM_MACH_IP22_SPACES_H */
* IP27 uses the R10000's uncached attribute feature. Attribute 3 selects
* uncached memory addressing.
*/
-#define CAC_BASE 0xa800000000000000
#define HSPEC_BASE 0x9000000000000000
#define IO_BASE 0x9200000000000000
#define MSPEC_BASE 0x9400000000000000
#define UNCAC_BASE 0x9600000000000000
-#define MAP_BASE 0xc000000000000000
-#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
-#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
#define TO_MSPEC(x) (MSPEC_BASE | ((x) & TO_PHYS_MASK))
#define TO_HSPEC(x) (HSPEC_BASE | ((x) & TO_PHYS_MASK))
-#define PAGE_OFFSET CAC_BASE
-
#define HIGHMEM_START (~0UL)
+#include <asm/mach-generic/spaces.h>
+
#endif /* _ASM_MACH_IP27_SPACES_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999, 2000, 03, 04, 05 Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2000, 2002 Maciej W. Rozycki
- * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
- */
-#ifndef _ASM_MACH_IP32_SPACES_H
-#define _ASM_MACH_IP32_SPACES_H
-
-/*
- * Memory above this physical address will be considered highmem.
- * Fixme: 59 bits is a fictive number and makes assumptions about processors
- * in the distant future. Nobody will care for a few years :-)
- */
-#ifndef HIGHMEM_START
-#define HIGHMEM_START (1UL << 59UL)
-#endif
-
-#define CAC_BASE 0x9800000000000000UL
-#define IO_BASE 0x9000000000000000UL
-#define UNCAC_BASE 0x9000000000000000UL
-#define MAP_BASE 0xc000000000000000UL
-
-#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
-#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
-
-/*
- * This handles the memory map.
- */
-#define PAGE_OFFSET CAC_BASE
-
-#endif /* __ASM_MACH_IP32_SPACES_H */