[MIPS] Remove set_c0_status(ST0_IM) from wrppmc's irq.c.

mips_cpu_irq_init() does clear_c0_status(ST0_IM) first, so
set_c0_status(ST0_IM) isn't necessary.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c
index 26cf360f16942faf505c5a26ff86518cd106db9e..8d75a43ce877b4fb29c90405567307cba134ea71 100644 (file)
--- a/arch/mips/gt64120/wrppmc/irq.c
+++ b/arch/mips/gt64120/wrppmc/irq.c
@@ -62,9 +62,6 @@ void gt64120_init_pic(void)
 
 void __init arch_init_irq(void)
 {
-       /* enable all CPU interrupt bits. */
-       set_c0_status(ST0_IM);  /* IE bit is still 0 */
-
        /* IRQ 0 - 7 are for MIPS common irq_cpu controller */
        mips_cpu_irq_init(0);