]> err.no Git - linux-2.6/commitdiff
[ARM] 3960/1: AT91: Final SAM9 intergration patches.
authorAndrew Victor <andrew@sanpeople.com>
Fri, 1 Dec 2006 10:51:19 +0000 (11:51 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 1 Dec 2006 13:54:05 +0000 (13:54 +0000)
This patch includes a number of small changes for integrating the
AT91SAM9261 and AT91SAM0260 support.

      * Can only select support for one AT91 processor at a time.
      * Remove most of the remaining static memory mapping for the
        AT91RM9200.
      * Reserve 1Mb of memory below the IO for mapping the internal SRAM
        and any custom board-specific devices (ie, FPGA).
      * The SAM9260 has more serial ports, so increase the maximum to 7.
      * Define the standard chipselect addresses, and define other
        addresses relative to those.
      * CLOCK_TICK_RATE is different on the SAM926x's.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-at91rm9200/Kconfig
arch/arm/mach-at91rm9200/Makefile
arch/arm/mach-at91rm9200/at91rm9200.c
include/asm-arm/arch-at91rm9200/hardware.h
include/asm-arm/arch-at91rm9200/timex.h
include/asm-arm/arch-at91rm9200/vmalloc.h

index 2f85e8693b1ba1e3984f93fa4e83b53fdb38a468..8d44326478941233c71b1681fe2a4b083ac6a13e 100644 (file)
@@ -2,7 +2,8 @@ if ARCH_AT91
 
 menu "Atmel AT91 System-on-Chip"
 
-comment "Atmel AT91 Processors"
+choice
+       prompt "Atmel AT91 Processor"
 
 config ARCH_AT91RM9200
        bool "AT91RM9200"
@@ -13,6 +14,8 @@ config ARCH_AT91SAM9260
 config ARCH_AT91SAM9261
        bool "AT91SAM9261"
 
+endchoice
+
 # ----------------------------------------------------------
 
 if ARCH_AT91RM9200
@@ -33,7 +36,6 @@ config ARCH_AT91RM9200DK
          Select this if you are using Atmel's AT91RM9200-DK Development board.
          (Discontinued)
 
-
 config MACH_AT91RM9200EK
        bool "Atmel AT91RM9200-EK Evaluation Kit"
        depends on ARCH_AT91RM9200
index 6093c31e39a1834be29be01ef089015e538230f3..564ad6e45242e2d181ba17242f0340fea554dbda 100644 (file)
@@ -10,7 +10,7 @@ obj-          :=
 obj-$(CONFIG_PM)               += pm.o
 
 # CPU-specific support
-obj-$(CONFIG_ARCH_AT91RM9200)  += at91rm9200.o at91rm9200_time.o at91rm9200_devices.c
+obj-$(CONFIG_ARCH_AT91RM9200)  += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
 obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
 obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
 
index 0816a8d2e863a76d08fd8f34d888fc73adb405e3..a92e9a495b07a1bdc64e3093a1711abbaf3f0656 100644 (file)
@@ -27,33 +27,13 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
                .pfn            = __phys_to_pfn(AT91_BASE_SYS),
                .length         = SZ_4K,
                .type           = MT_DEVICE,
-       }, {
-               .virtual        = AT91_VA_BASE_SPI,
-               .pfn            = __phys_to_pfn(AT91RM9200_BASE_SPI),
-               .length         = SZ_16K,
-               .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_EMAC,
                .pfn            = __phys_to_pfn(AT91RM9200_BASE_EMAC),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
-               .virtual        = AT91_VA_BASE_TWI,
-               .pfn            = __phys_to_pfn(AT91RM9200_BASE_TWI),
-               .length         = SZ_16K,
-               .type           = MT_DEVICE,
-       }, {
-               .virtual        = AT91_VA_BASE_MCI,
-               .pfn            = __phys_to_pfn(AT91RM9200_BASE_MCI),
-               .length         = SZ_16K,
-               .type           = MT_DEVICE,
-       }, {
-               .virtual        = AT91_VA_BASE_UDP,
-               .pfn            = __phys_to_pfn(AT91RM9200_BASE_UDP),
-               .length         = SZ_16K,
-               .type           = MT_DEVICE,
-       }, {
-               .virtual        = AT91_SRAM_VIRT_BASE,
+               .virtual        = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE,
                .pfn            = __phys_to_pfn(AT91RM9200_SRAM_BASE),
                .length         = AT91RM9200_SRAM_SIZE,
                .type           = MT_DEVICE,
index d42e310584a9c24d6b3c18b8f9780bf50932ee0b..9ea5bfe06320ad908cc6b4e46023ddcbe1263146 100644 (file)
  * Virtual to Physical Address mapping for IO devices.
  */
 #define AT91_VA_BASE_SYS       AT91_IO_P2V(AT91_BASE_SYS)
-#define AT91_VA_BASE_SPI       AT91_IO_P2V(AT91RM9200_BASE_SPI)
 #define AT91_VA_BASE_EMAC      AT91_IO_P2V(AT91RM9200_BASE_EMAC)
-#define AT91_VA_BASE_TWI       AT91_IO_P2V(AT91RM9200_BASE_TWI)
-#define AT91_VA_BASE_MCI       AT91_IO_P2V(AT91RM9200_BASE_MCI)
-#define AT91_VA_BASE_UDP       AT91_IO_P2V(AT91RM9200_BASE_UDP)
 
  /* Internal SRAM is mapped below the IO devices */
-#define AT91_SRAM_VIRT_BASE    (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE)
+#define AT91_SRAM_MAX          SZ_1M
+#define AT91_VIRT_BASE         (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
 
 /* Serial ports */
-#define ATMEL_MAX_UART         5               /* 4 USART3's and one DBGU port */
-
-/* FLASH */
-#define AT91_FLASH_BASE                0x10000000      /* NCS0: Flash physical base address */
+#define ATMEL_MAX_UART         7               /* 6 USART3's and one DBGU port (SAM9260) */
+
+/* External Memory Map */
+#define AT91_CHIPSELECT_0      0x10000000
+#define AT91_CHIPSELECT_1      0x20000000
+#define AT91_CHIPSELECT_2      0x30000000
+#define AT91_CHIPSELECT_3      0x40000000
+#define AT91_CHIPSELECT_4      0x50000000
+#define AT91_CHIPSELECT_5      0x60000000
+#define AT91_CHIPSELECT_6      0x70000000
+#define AT91_CHIPSELECT_7      0x80000000
 
 /* SDRAM */
-#define AT91_SDRAM_BASE                0x20000000      /* NCS1: SDRAM physical base address */
-
-/* SmartMedia */
-#define AT91_SMARTMEDIA_BASE   0x40000000      /* NCS3: Smartmedia physical base address */
-
-/* Compact Flash */
-#define AT91_CF_BASE           0x50000000      /* NCS4-NCS6: Compact Flash physical base address */
+#define AT91_SDRAM_BASE                AT91_CHIPSELECT_1
 
 /* Clocks */
 #define AT91_SLOW_CLOCK                32768           /* slow clock */
index 88687cefe6ebdeae179adc38d03800d7ced22fcc..faeca45a8d446f999badcb3a9fac7c95e4b9dfb4 100644 (file)
 
 #include <asm/hardware.h>
 
+#if defined(CONFIG_ARCH_AT91RM9200)
+
 #define CLOCK_TICK_RATE                (AT91_SLOW_CLOCK)
 
+#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9261)
+
+#define AT91SAM9_MASTER_CLOCK  99300000
+#define CLOCK_TICK_RATE                (AT91SAM9_MASTER_CLOCK/16)
+
+#endif
+
 #endif
index 4c367eb57f47c9dccc242612a71702951def3bfb..0a23b8c562b94f6033bef6c864bce85154e9b21b 100644 (file)
@@ -21,6 +21,6 @@
 #ifndef __ASM_ARCH_VMALLOC_H
 #define __ASM_ARCH_VMALLOC_H
 
-#define VMALLOC_END            (AT91_SRAM_VIRT_BASE & PGDIR_MASK)
+#define VMALLOC_END            (AT91_VIRT_BASE & PGDIR_MASK)
 
 #endif