[ARM] pxa: introduce reset_status and clear_reset_status for driver's usage

Due to the problem of reset status bits being handled by different
registers between pxa2xx and pxa3xx, introduce a global reset_status
variable, initialized by SoC-specific code and later being used by
other drivers.

And also introduce clear_reset_status(), which is used to clear the
corresponding status bits. Pass RESET_STATUS_ALL to clear all bits.

Signed-off-by: Eric Miao <eric.miao@marvell.com>

diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index ca053226fba0b8ad32fbff800d67ba58c2832538..36638926c5ce33d3a879755ee341b578b64f756a 100644 (file)
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -26,9 +26,19 @@
 #include <asm/mach/map.h>
 
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/reset.h>
 
 #include "generic.h"
 
+void clear_reset_status(unsigned int mask)
+{
+       if (cpu_is_pxa2xx())
+               pxa2xx_clear_reset_status(mask);
+
+       if (cpu_is_pxa3xx())
+               pxa3xx_clear_reset_status(mask);
+}
+
 /*
  * Get the clock frequency as reflected by CCCR and the turbo flag.
  * We assume these values have been applied via a fcs.

diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 5bb7ae757831b2e5dbcb172fb12c792fe7c37df9..041c048320e471f07fb2e1cff0a453ea1255d5bd 100644 (file)
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -47,12 +47,20 @@ extern unsigned pxa27x_get_memclk_frequency_10khz(void);
 #define pxa27x_get_memclk_frequency_10khz()    (0)
 #endif
 
+#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
+extern void pxa2xx_clear_reset_status(unsigned int);
+#else
+static inline void pxa2xx_clear_reset_status(unsigned int mask) {}
+#endif
+
 #ifdef CONFIG_PXA3xx
 extern unsigned pxa3xx_get_clk_frequency_khz(int);
 extern unsigned pxa3xx_get_memclk_frequency_10khz(void);
+extern void pxa3xx_clear_reset_status(unsigned int);
 #else
 #define pxa3xx_get_clk_frequency_khz(x)                (0)
 #define pxa3xx_get_memclk_frequency_10khz()    (0)
+static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
 #endif
 
 extern struct sysdev_class pxa_irq_sysclass;

diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index c5b845b935bb6f5122826507bf640b2deb87e61e..49a7a296ff3109e76bf93bec0ea5811e82309ad6 100644 (file)
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -28,6 +28,7 @@
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/mfp-pxa25x.h>
+#include <asm/arch/reset.h>
 #include <asm/arch/pm.h>
 #include <asm/arch/dma.h>
 
@@ -348,6 +349,9 @@ static int __init pxa25x_init(void)
                clks_register(&pxa25x_hwuart_clk, 1);
 
        if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
+
+               reset_status = RCSR;
+
                clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
 
                if ((ret = pxa_init_dma(16)))

diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d5d14ea33f27e693796014c8b4d864208e332d05..a8c12347a5a955f13a072fc13204f3d6875f6b04 100644 (file)
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -24,6 +24,7 @@
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/mfp-pxa27x.h>
+#include <asm/arch/reset.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/pm.h>
 #include <asm/arch/dma.h>
@@ -384,6 +385,9 @@ static int __init pxa27x_init(void)
        int i, ret = 0;
 
        if (cpu_is_pxa27x()) {
+
+               reset_status = RCSR;
+
                clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
 
                if ((ret = pxa_init_dma(32)))

diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c
index d4f6415e8413caaa007f143fd79ea0792f2d43b9..d93d3e6a6e2777a6b83461ae166599330844ce89 100644 (file)
--- a/arch/arm/mach-pxa/pxa2xx.c
+++ b/arch/arm/mach-pxa/pxa2xx.c
@@ -14,10 +14,19 @@
 #include <linux/kernel.h>
 #include <linux/device.h>
 
+#include <asm/hardware.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/mfp-pxa2xx.h>
 #include <asm/arch/mfp-pxa25x.h>
+#include <asm/arch/reset.h>
 #include <asm/arch/irda.h>
 
+void pxa2xx_clear_reset_status(unsigned int mask)
+{
+       /* RESET_STATUS_* has a 1:1 mapping with RCSR */
+       RCSR = mask;
+}
+
 static unsigned long pxa2xx_mfp_fir[] = {
        GPIO46_FICP_RXD,
        GPIO47_FICP_TXD,

diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f491025a0c82c41873bf404494d8a64a35216d28..3d36c790f5ce974009bbc8e313c5f58a08639f6d 100644 (file)
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -24,6 +24,7 @@
 
 #include <asm/hardware.h>
 #include <asm/arch/pxa3xx-regs.h>
+#include <asm/arch/reset.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/pm.h>
 #include <asm/arch/dma.h>
@@ -109,6 +110,12 @@ unsigned int pxa3xx_get_memclk_frequency_10khz(void)
        return (clk / 10000);
 }
 
+void pxa3xx_clear_reset_status(unsigned int mask)
+{
+       /* RESET_STATUS_* has a 1:1 mapping with ARSR */
+       ARSR = mask;
+}
+
 /*
  * Return the current AC97 clock frequency.
  */
@@ -532,6 +539,9 @@ static int __init pxa3xx_init(void)
        int i, ret = 0;
 
        if (cpu_is_pxa3xx()) {
+
+               reset_status = ARSR;
+
                /*
                 * clear RDH bit every time after reset
                 *

diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index d610a1244abbb3497ef08a5482888151357b0e6f..56f60d923a9dc7a71e2ee2dfe081450fbfe017f6 100644 (file)
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -11,9 +11,11 @@
 #include <asm/proc-fns.h>
 
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/reset.h>
 
+unsigned int reset_status;
+EXPORT_SYMBOL(reset_status);
+
 static void do_hw_reset(void);
 
 static int reset_gpio = -1;
@@ -78,8 +80,7 @@ static void do_hw_reset(void)
 
 void arch_reset(char mode)
 {
-       if (cpu_is_pxa2xx())
-               RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+       clear_reset_status(RESET_STATUS_ALL);
 
        switch (mode) {
        case 's':

diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 0c2fa1c4fb4c776093a4b1460271017b8677c084..3b6fc090c8ef6e28586b2b106e5961f2e7adee02 100644 (file)
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -31,6 +31,9 @@
 
 #include "generic.h"
 
+unsigned int reset_status;
+EXPORT_SYMBOL(reset_status);
+
 #define NR_FREQS       16
 
 /*

diff --git a/include/asm-arm/arch-pxa/reset.h b/include/asm-arm/arch-pxa/reset.h
index 6ca72c5cf7db5df3c2e155c1e6f8c7cb48e4c306..9489a48871a88a8196deb0bb001df9be2cebadb2 100644 (file)
--- a/include/asm-arm/arch-pxa/reset.h
+++ b/include/asm-arm/arch-pxa/reset.h
@@ -1,6 +1,15 @@
 #ifndef __ASM_ARCH_RESET_H
 #define __ASM_ARCH_RESET_H
 
+#define RESET_STATUS_HARDWARE  (1 << 0)        /* Hardware Reset */
+#define RESET_STATUS_WATCHDOG  (1 << 1)        /* Watchdog Reset */
+#define RESET_STATUS_LOWPOWER  (1 << 2)        /* Low Power/Sleep Exit */
+#define RESET_STATUS_GPIO      (1 << 3)        /* GPIO Reset */
+#define RESET_STATUS_ALL       (0xf)
+
+extern unsigned int reset_status;
+extern void clear_reset_status(unsigned int mask);
+
 /*
  * register GPIO as reset generator
  */

diff --git a/include/asm-arm/arch-sa1100/reset.h b/include/asm-arm/arch-sa1100/reset.h
new file mode 100644 (file)
index 0000000..f61957e
--- /dev/null
+++ b/include/asm-arm/arch-sa1100/reset.h
@@ -0,0 +1,18 @@
+#ifndef __ASM_ARCH_RESET_H
+#define __ASM_ARCH_RESET_H
+
+#include "hardware.h"
+
+#define RESET_STATUS_HARDWARE  (1 << 0)        /* Hardware Reset */
+#define RESET_STATUS_WATCHDOG  (1 << 1)        /* Watchdog Reset */
+#define RESET_STATUS_LOWPOWER  (1 << 2)        /* Exit from Low Power/Sleep */
+#define RESET_STATUS_GPIO      (1 << 3)        /* GPIO Reset */
+#define RESET_STATUS_ALL       (0xf)
+
+extern unsigned int reset_status;
+static inline void clear_reset_status(unsigned int mask)
+{
+       RCSR = mask;
+}
+
+#endif /* __ASM_ARCH_RESET_H */