brk.o sbrk.o malloc.o realloc.o calloc.o mmap.o \
memcpy.o memcmp.o memset.o memccpy.o memmem.o memswap.o \
memmove.o \
+ strcasecmp.o strncasecmp.o strndup.o strerror.o \
strcat.o strchr.o strcmp.o strcpy.o strdup.o strlen.o \
strncat.o strstr.o strncmp.o strncpy.o strrchr.o strspn.o \
strsep.o strtok.o \
The following is the last known status of various architectures:
- Known to work: alpha arm i386 s390 s390x sparc sparc64 x86_64*
+ Known to work: alpha arm ia64 i386 s390 s390x sparc
+ sparc64 x86_64*
Works static, not shared: mips* arm-thumb sh*
- Need crt0.S updates: ppc
- Missing setjmp: ppc64
- Need porting work: cris ia64 m68k mips64 parisc
+ Might work: ppc ppc64
+ Need porting work: cris m68k mips64 parisc
x86_64: requires a kernel header patch (to be created)
mips, sh: linker problem; might work with fixed linker
#
# Process-related syscalls
#
-<!mips,mips64,sparc> pid_t vfork()
+<!mips,mips64,sparc,ia64> pid_t vfork()
<sparc> pid_t vfork@forkish()
<!alpha> pid_t getpid()
<alpha> pid_t getxpid@dual0::getpid()
int setdomainname(const char *, size_t)
int sethostname(const char *, size_t)
int init_module(const char *, struct module *)
-void * create_module(const char *, size_t)
+<!ia64> void * create_module(const char *, size_t)
int delete_module(const char *)
-int query_module(const char *, int, void *, size_t, size_t)
+<!ia64> int query_module(const char *, int, void *, size_t, size_t)
int reboot::__reboot(int, int, int, void *)
int syslog::klogctl(int, char *, int)
--- /dev/null
+/*
+ * arch/alpha/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/arm/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/cris/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/i386/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+typedef int sig_atomic_t;
+
+#endif
# accordingly.
#
+ARCHOBJS = \
+ arch/$(ARCH)/vfork.o \
+ arch/$(ARCH)/setjmp.o
+
+ARCHSOOBJS = $(patsubst %o,%.lo,%(ARCHOBJS))
+
archclean:
--- /dev/null
+
+#include <asm/fpu.h>
+
+ .align 32
+ .global _start
+
+ .proc _start
+ .type _start,@function
+_start:
+ .prologue
+ .save rp, r0
+
+ alloc r2 = ar.pfs,0,0,2,0
+ movl r3 = FPSR_DEFAULT
+ ;;
+ adds out0= 16,sp /* argc pointer */
+ movl gp = @gprel(0f)
+0: mov r9 = ip
+ ;;
+ sub gp = r9, gp /* back-compute gp value */
+
+ .body
+ br.call.sptk.few rp = __libc_init
+ ;;
+ break 0 /* break miserably if we ever return */
+
+ .endp _start
--- /dev/null
+/*
+ * arch/ia64/include/klibc/archsetjmp.h
+ *
+ * Code borrowed from the FreeBSD kernel.
+ *
+ */
+
+#ifndef _KLIBC_ARCHSETJMP_H
+#define _KLIBC_ARCHSETJMP_H
+
+/* User code must not depend on the internal representation of jmp_buf. */
+#define _JBLEN 0x200
+
+/* guaranteed 128-bit alignment! */
+typedef char jmp_buf[_JBLEN] __attribute__ ((aligned (16)));
+
+#endif
--- /dev/null
+/*
+ * arch/ia64/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions.
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+#define _NSIG 64
+#define _NSIG_BPW 64
+#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
+
+typedef struct {
+ unsigned long sig[_NSIG_WORDS];
+} sigset_t;
+
+struct sigaction {
+ union {
+ __sighandler_t _sa_handler;
+ void (*_sa_sigaction)(int, struct siginfo *, void *);
+ } _u;
+ sigset_t sa_mask;
+ int sa_flags;
+};
+
+#define sa_handler _u._sa_handler
+#define sa_sigaction _u._sa_sigaction
+
+typedef int sig_atomic_t;
+
+#endif
#ifndef _KLIBC_ARCHSYS_H
#define _KLIBC_ARCHSYS_H
-/* No special syscall definitions for this architecture */
+#define __IA64_BREAK "break 0x100000;;\n\t"
+
+#define _syscall0(type,name) \
+type \
+name (void) \
+{ \
+ register long _r8 asm ("r8"); \
+ register long _r10 asm ("r10"); \
+ register long _r15 asm ("r15") = __NR_##name; \
+ long _retval; \
+ __asm __volatile (__IA64_BREAK \
+ : "=r" (_r8), "=r" (_r10), "=r" (_r15) \
+ : "2" (_r15) ASM_ARGS_0 \
+ : "memory" ASM_CLOBBERS_0); \
+ _retval = _r8; \
+ if (_r10 == -1) { \
+ errno = (_retval); \
+ _retval = -1; \
+ } \
+ return _retval; \
+}
+
+#define _syscall1(type,name,type1,arg1) \
+type \
+name (type1 arg1) \
+{ \
+ register long _r8 asm ("r8"); \
+ register long _r10 asm ("r10"); \
+ register long _r15 asm ("r15") = __NR_##name; \
+ long _retval; \
+ LOAD_ARGS_1(arg1); \
+ __asm __volatile (__IA64_BREAK \
+ : "=r" (_r8), "=r" (_r10), "=r" (_r15), \
+ ASM_OUTARGS_1 \
+ : "2" (_r15) ASM_ARGS_1 \
+ : "memory" ASM_CLOBBERS_1); \
+ _retval = _r8; \
+ if (_r10 == -1) { \
+ errno = (_retval); \
+ _retval = -1; \
+ } \
+ return _retval; \
+}
+
+#define _syscall2(type,name,type1,arg1,type2,arg2) \
+type \
+name (type1 arg1, type2 arg2) \
+{ \
+ register long _r8 asm ("r8"); \
+ register long _r10 asm ("r10"); \
+ register long _r15 asm ("r15") = __NR_##name; \
+ long _retval; \
+ LOAD_ARGS_2(arg1, arg2); \
+ __asm __volatile (__IA64_BREAK \
+ : "=r" (_r8), "=r" (_r10), "=r" (_r15), \
+ ASM_OUTARGS_2 \
+ : "2" (_r15) ASM_ARGS_2 \
+ : "memory" ASM_CLOBBERS_2); \
+ _retval = _r8; \
+ if (_r10 == -1) { \
+ errno = (_retval); \
+ _retval = -1; \
+ } \
+ return _retval; \
+}
+
+#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
+type \
+name (type1 arg1, type2 arg2, type3 arg3) \
+{ \
+ register long _r8 asm ("r8"); \
+ register long _r10 asm ("r10"); \
+ register long _r15 asm ("r15") = __NR_##name; \
+ long _retval; \
+ LOAD_ARGS_3(arg1, arg2, arg3); \
+ __asm __volatile (__IA64_BREAK \
+ : "=r" (_r8), "=r" (_r10), "=r" (_r15), \
+ ASM_OUTARGS_3 \
+ : "2" (_r15) ASM_ARGS_3 \
+ : "memory" ASM_CLOBBERS_3); \
+ _retval = _r8; \
+ if (_r10 == -1) { \
+ errno = (_retval); \
+ _retval = -1; \
+ } \
+ return _retval; \
+}
+
+#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
+type \
+name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
+{ \
+ register long _r8 asm ("r8"); \
+ register long _r10 asm ("r10"); \
+ register long _r15 asm ("r15") = __NR_##name; \
+ long _retval; \
+ LOAD_ARGS_4(arg1, arg2, arg3, arg4); \
+ __asm __volatile (__IA64_BREAK \
+ : "=r" (_r8), "=r" (_r10), "=r" (_r15), \
+ ASM_OUTARGS_4 \
+ : "2" (_r15) ASM_ARGS_4 \
+ : "memory" ASM_CLOBBERS_4); \
+ _retval = _r8; \
+ if (_r10 == -1) { \
+ errno = (_retval); \
+ _retval = -1; \
+ } \
+ return _retval; \
+}
+
+#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
+type \
+name (type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
+{ \
+ register long _r8 asm ("r8"); \
+ register long _r10 asm ("r10"); \
+ register long _r15 asm ("r15") = __NR_##name; \
+ long _retval; \
+ LOAD_ARGS_5(arg1, arg2, arg3, arg4, arg5); \
+ __asm __volatile (__IA64_BREAK \
+ : "=r" (_r8), "=r" (_r10), "=r" (_r15), \
+ ASM_OUTARGS_5 \
+ : "2" (_r15) ASM_ARGS_5 \
+ : "memory" ASM_CLOBBERS_5); \
+ _retval = _r8; \
+ if (_r10 == -1) { \
+ errno = (_retval); \
+ _retval = -1; \
+ } \
+ return _retval; \
+}
+
+#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \
+type \
+name (type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \
+{ \
+ register long _r8 asm ("r8"); \
+ register long _r10 asm ("r10"); \
+ register long _r15 asm ("r15") = __NR_##name; \
+ long _retval; \
+ LOAD_ARGS_6(arg1, arg2, arg3, arg4, arg5, arg6); \
+ __asm __volatile (__IA64_BREAK \
+ : "=r" (_r8), "=r" (_r10), "=r" (_r15), \
+ ASM_OUTARGS_6 \
+ : "2" (_r15) ASM_ARGS_6 \
+ : "memory" ASM_CLOBBERS_6); \
+ _retval = _r8; \
+ if (_r10 == -1) { \
+ errno = (_retval); \
+ _retval = -1; \
+ } \
+ return _retval; \
+}
+
+
+#define LOAD_ARGS_0() do { } while (0)
+#define LOAD_ARGS_1(out0) \
+ register long _out0 asm ("out0") = (long) (out0); \
+ LOAD_ARGS_0 ()
+#define LOAD_ARGS_2(out0, out1) \
+ register long _out1 asm ("out1") = (long) (out1); \
+ LOAD_ARGS_1 (out0)
+#define LOAD_ARGS_3(out0, out1, out2) \
+ register long _out2 asm ("out2") = (long) (out2); \
+ LOAD_ARGS_2 (out0, out1)
+#define LOAD_ARGS_4(out0, out1, out2, out3) \
+ register long _out3 asm ("out3") = (long) (out3); \
+ LOAD_ARGS_3 (out0, out1, out2)
+#define LOAD_ARGS_5(out0, out1, out2, out3, out4) \
+ register long _out4 asm ("out4") = (long) (out4); \
+ LOAD_ARGS_4 (out0, out1, out2, out3)
+#define LOAD_ARGS_6(out0, out1, out2, out3, out4, out5) \
+ register long _out5 asm ("out5") = (long) (out5); \
+ LOAD_ARGS_5 (out0, out1, out2, out3, out4)
+
+#define ASM_OUTARGS_1 "=r" (_out0)
+#define ASM_OUTARGS_2 ASM_OUTARGS_1, "=r" (_out1)
+#define ASM_OUTARGS_3 ASM_OUTARGS_2, "=r" (_out2)
+#define ASM_OUTARGS_4 ASM_OUTARGS_3, "=r" (_out3)
+#define ASM_OUTARGS_5 ASM_OUTARGS_4, "=r" (_out4)
+#define ASM_OUTARGS_6 ASM_OUTARGS_5, "=r" (_out5)
+
+#define ASM_ARGS_0
+#define ASM_ARGS_1 ASM_ARGS_0, "3" (_out0)
+#define ASM_ARGS_2 ASM_ARGS_1, "4" (_out1)
+#define ASM_ARGS_3 ASM_ARGS_2, "5" (_out2)
+#define ASM_ARGS_4 ASM_ARGS_3, "6" (_out3)
+#define ASM_ARGS_5 ASM_ARGS_4, "7" (_out4)
+#define ASM_ARGS_6 ASM_ARGS_5, "8" (_out5)
+
+#define ASM_CLOBBERS_0 ASM_CLOBBERS_1, "out0"
+#define ASM_CLOBBERS_1 ASM_CLOBBERS_2, "out1"
+#define ASM_CLOBBERS_2 ASM_CLOBBERS_3, "out2"
+#define ASM_CLOBBERS_3 ASM_CLOBBERS_4, "out3"
+#define ASM_CLOBBERS_4 ASM_CLOBBERS_5, "out4"
+#define ASM_CLOBBERS_5 ASM_CLOBBERS_6, "out5"
+#define ASM_CLOBBERS_6 , "out6", "out7", \
+ /* Non-stacked integer registers, minus r8, r10, r15. */ \
+ "r2", "r3", "r9", "r11", "r12", "r13", "r14", "r16", "r17", "r18", \
+ "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", \
+ "r28", "r29", "r30", "r31", \
+ /* Predicate registers. */ \
+ "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", \
+ /* Non-rotating fp registers. */ \
+ "f6", "f7", "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+ /* Branch registers. */ \
+ "b6", "b7"
#endif /* _KLIBC_ARCHSYS_H */
--- /dev/null
+/*
+ * IA-64 specific setjmp/longjmp routines
+ *
+ * Inspired by setjmp.s from the FreeBSD kernel.
+ */
+
+#define J_UNAT 0
+#define J_NATS 0x8
+#define J_PFS 0x10
+#define J_BSP 0x18
+#define J_RNAT 0x20
+#define J_PREDS 0x28
+#define J_LC 0x30
+#define J_R4 0x38
+#define J_R5 0x40
+#define J_R6 0x48
+#define J_R7 0x50
+#define J_SP 0x58
+#define J_F2 0x60
+#define J_F3 0x70
+#define J_F4 0x80
+#define J_F5 0x90
+#define J_F16 0xa0
+#define J_F17 0xb0
+#define J_F18 0xc0
+#define J_F19 0xd0
+#define J_F20 0xe0
+#define J_F21 0xf0
+#define J_F22 0x100
+#define J_F23 0x110
+#define J_F24 0x120
+#define J_F25 0x130
+#define J_F26 0x140
+#define J_F27 0x150
+#define J_F28 0x160
+#define J_F29 0x170
+#define J_F30 0x180
+#define J_F31 0x190
+#define J_FPSR 0x1a0
+#define J_B0 0x1a8
+#define J_B1 0x1b0
+#define J_B2 0x1b8
+#define J_B3 0x1c0
+#define J_B4 0x1c8
+#define J_B5 0x1d0
+#define J_SIGMASK 0x1d8
+#define J_SIGSET 0x1e0
+#define J_GP 0x1f0
+
+// int setjmp(struct jmp_buffer *)
+//
+// Setup a non-local goto.
+//
+// Description:
+//
+// SetJump stores the current register set in the area pointed to
+// by "save". It returns zero. Subsequent calls to "LongJump" will
+// restore the registers and return non-zero to the same location.
+//
+// On entry, r32 contains the pointer to the jmp_buffer
+//
+ .align 32
+ .global setjmp
+setjmp:
+ //
+ // Make sure buffer is aligned at 16byte boundary
+ //
+ add r10 = -0x10,r0 ;; // mask the lower 4 bits
+ and r32 = r32, r10;;
+ add r32 = 0x10, r32;; // move to next 16 byte boundary
+
+ add r10 = J_PREDS, r32 // skip Unats & pfs save area
+ add r11 = J_BSP, r32
+ //
+ // save immediate context
+ //
+ mov r2 = ar.bsp // save backing store pointer
+ mov r3 = pr // save predicates
+ flushrs
+ ;;
+ //
+ // save user Unat register
+ //
+ mov r16 = ar.lc // save loop count register
+ mov r14 = ar.unat // save user Unat register
+
+ st8 [r10] = r3, J_LC-J_PREDS
+ st8 [r11] = r2, J_R4-J_BSP
+ ;;
+ st8 [r10] = r16, J_R5-J_LC
+ st8 [r32] = r14, J_NATS // Note: Unat at the
+ // beginning of the save area
+ mov r15 = ar.pfs
+ ;;
+ //
+ // save preserved general registers & NaT's
+ //
+ st8.spill [r11] = r4, J_R6-J_R4
+ ;;
+ st8.spill [r10] = r5, J_R7-J_R5
+ ;;
+ st8.spill [r11] = r6, J_SP-J_R6
+ ;;
+ st8.spill [r10] = r7, J_F3-J_R7
+ ;;
+ st8.spill [r11] = sp, J_F2-J_SP
+ ;;
+ //
+ // save spilled Unat and pfs registers
+ //
+ mov r2 = ar.unat // save Unat register after spill
+ ;;
+ st8 [r32] = r2, J_PFS-J_NATS // save unat for spilled regs
+ ;;
+ st8 [r32] = r15 // save pfs
+ //
+ // save floating registers
+ //
+ stf.spill [r11] = f2, J_F4-J_F2
+ stf.spill [r10] = f3, J_F5-J_F3
+ ;;
+ stf.spill [r11] = f4, J_F16-J_F4
+ stf.spill [r10] = f5, J_F17-J_F5
+ ;;
+ stf.spill [r11] = f16, J_F18-J_F16
+ stf.spill [r10] = f17, J_F19-J_F17
+ ;;
+ stf.spill [r11] = f18, J_F20-J_F18
+ stf.spill [r10] = f19, J_F21-J_F19
+ ;;
+ stf.spill [r11] = f20, J_F22-J_F20
+ stf.spill [r10] = f21, J_F23-J_F21
+ ;;
+ stf.spill [r11] = f22, J_F24-J_F22
+ stf.spill [r10] = f23, J_F25-J_F23
+ ;;
+ stf.spill [r11] = f24, J_F26-J_F24
+ stf.spill [r10] = f25, J_F27-J_F25
+ ;;
+ stf.spill [r11] = f26, J_F28-J_F26
+ stf.spill [r10] = f27, J_F29-J_F27
+ ;;
+ stf.spill [r11] = f28, J_F30-J_F28
+ stf.spill [r10] = f29, J_F31-J_F29
+ ;;
+ stf.spill [r11] = f30, J_FPSR-J_F30
+ stf.spill [r10] = f31, J_B0-J_F31 // size of f31 + fpsr
+ //
+ // save FPSR register & branch registers
+ //
+ mov r2 = ar.fpsr // save fpsr register
+ mov r3 = b0
+ ;;
+ st8 [r11] = r2, J_B1-J_FPSR
+ st8 [r10] = r3, J_B2-J_B0
+ mov r2 = b1
+ mov r3 = b2
+ ;;
+ st8 [r11] = r2, J_B3-J_B1
+ st8 [r10] = r3, J_B4-J_B2
+ mov r2 = b3
+ mov r3 = b4
+ ;;
+ st8 [r11] = r2, J_B5-J_B3
+ st8 [r10] = r3
+ mov r2 = b5
+ ;;
+ st8 [r11] = r2
+ ;;
+ //
+ // return
+ //
+ mov r8 = r0 // return 0 from setjmp
+ mov ar.unat = r14 // restore unat
+ br.ret.sptk b0
+ .endp setjmp
+
+//
+// void longjmp(struct jmp_buffer *, int val)
+//
+// Perform a non-local goto.
+//
+// Description:
+//
+// LongJump initializes the register set to the values saved by a
+// previous 'SetJump' and jumps to the return location saved by that
+// 'SetJump'. This has the effect of unwinding the stack and returning
+// for a second time to the 'SetJump'.
+//
+
+ .align 32
+ .global longjmp
+longjmp:
+ //
+ // Make sure buffer is aligned at 16byte boundary
+ //
+ add r10 = -0x10,r0 ;; // mask the lower 4 bits
+ and r32 = r32, r10;;
+ add r32 = 0x10, r32;; // move to next 16 byte boundary
+
+ //
+ // caching the return value as we do invala in the end
+ //
+ mov r8 = r33 // return value
+
+ //
+ // get immediate context
+ //
+ mov r14 = ar.rsc // get user RSC conf
+ add r10 = J_PFS, r32 // get address of pfs
+ add r11 = J_NATS, r32
+ ;;
+ ld8 r15 = [r10], J_BSP-J_PFS // get pfs
+ ld8 r2 = [r11], J_LC-J_NATS // get unat for spilled regs
+ ;;
+ mov ar.unat = r2
+ ;;
+ ld8 r16 = [r10], J_PREDS-J_BSP // get backing store pointer
+ mov ar.rsc = r0 // put RSE in enforced lazy
+ mov ar.pfs = r15
+ ;;
+
+ //
+ // while returning from longjmp the BSPSTORE and BSP needs to be
+ // same and discard all the registers allocated after we did
+ // setjmp. Also, we need to generate the RNAT register since we
+ // did not flushed the RSE on setjmp.
+ //
+ mov r17 = ar.bspstore // get current BSPSTORE
+ ;;
+ cmp.ltu p6,p7 = r17, r16 // is it less than BSP of
+(p6) br.spnt.few .flush_rse
+ mov r19 = ar.rnat // get current RNAT
+ ;;
+ loadrs // invalidate dirty regs
+ br.sptk.many .restore_rnat // restore RNAT
+
+.flush_rse:
+ flushrs
+ ;;
+ mov r19 = ar.rnat // get current RNAT
+ mov r17 = r16 // current BSPSTORE
+ ;;
+.restore_rnat:
+ //
+ // check if RNAT is saved between saved BSP and curr BSPSTORE
+ //
+ mov r18 = 0x3f
+ ;;
+ dep r18 = r18,r16,3,6 // get RNAT address
+ ;;
+ cmp.ltu p8,p9 = r18, r17 // RNAT saved on RSE
+ ;;
+(p8) ld8 r19 = [r18] // get RNAT from RSE
+ ;;
+ mov ar.bspstore = r16 // set new BSPSTORE
+ ;;
+ mov ar.rnat = r19 // restore RNAT
+ mov ar.rsc = r14 // restore RSC conf
+
+
+ ld8 r3 = [r11], J_R4-J_LC // get lc register
+ ld8 r2 = [r10], J_R5-J_PREDS // get predicates
+ ;;
+ mov pr = r2, -1
+ mov ar.lc = r3
+ //
+ // restore preserved general registers & NaT's
+ //
+ ld8.fill r4 = [r11], J_R6-J_R4
+ ;;
+ ld8.fill r5 = [r10], J_R7-J_R5
+ ld8.fill r6 = [r11], J_SP-J_R6
+ ;;
+ ld8.fill r7 = [r10], J_F2-J_R7
+ ld8.fill sp = [r11], J_F3-J_SP
+ ;;
+ //
+ // restore floating registers
+ //
+ ldf.fill f2 = [r10], J_F4-J_F2
+ ldf.fill f3 = [r11], J_F5-J_F3
+ ;;
+ ldf.fill f4 = [r10], J_F16-J_F4
+ ldf.fill f5 = [r11], J_F17-J_F5
+ ;;
+ ldf.fill f16 = [r10], J_F18-J_F16
+ ldf.fill f17 = [r11], J_F19-J_F17
+ ;;
+ ldf.fill f18 = [r10], J_F20-J_F18
+ ldf.fill f19 = [r11], J_F21-J_F19
+ ;;
+ ldf.fill f20 = [r10], J_F22-J_F20
+ ldf.fill f21 = [r11], J_F23-J_F21
+ ;;
+ ldf.fill f22 = [r10], J_F24-J_F22
+ ldf.fill f23 = [r11], J_F25-J_F23
+ ;;
+ ldf.fill f24 = [r10], J_F26-J_F24
+ ldf.fill f25 = [r11], J_F27-J_F25
+ ;;
+ ldf.fill f26 = [r10], J_F28-J_F26
+ ldf.fill f27 = [r11], J_F29-J_F27
+ ;;
+ ldf.fill f28 = [r10], J_F30-J_F28
+ ldf.fill f29 = [r11], J_F31-J_F29
+ ;;
+ ldf.fill f30 = [r10], J_FPSR-J_F30
+ ldf.fill f31 = [r11], J_B0-J_F31 ;;
+
+ //
+ // restore branch registers and fpsr
+ //
+ ld8 r16 = [r10], J_B1-J_FPSR // get fpsr
+ ld8 r17 = [r11], J_B2-J_B0 // get return pointer
+ ;;
+ mov ar.fpsr = r16
+ mov b0 = r17
+ ld8 r2 = [r10], J_B3-J_B1
+ ld8 r3 = [r11], J_B4-J_B2
+ ;;
+ mov b1 = r2
+ mov b2 = r3
+ ld8 r2 = [r10], J_B5-J_B3
+ ld8 r3 = [r11]
+ ;;
+ mov b3 = r2
+ mov b4 = r3
+ ld8 r2 = [r10]
+ ld8 r21 = [r32] // get user unat
+ ;;
+ mov b5 = r2
+ mov ar.unat = r21
+
+ //
+ // invalidate ALAT
+ //
+ invala ;;
+
+ br.ret.sptk b0
+ .endp longjmp
--- /dev/null
+/*
+ * ia64 specific vfork syscall
+ *
+ * Written By: Martin Hicks <mort@wildopensource.com>
+ *
+ */
+
+/* This syscall is a special case of the clone syscall */
+#include <asm/unistd.h>
+#include <asm/signal.h>
+#include <klibc/archsys.h>
+
+/* These are redefined here because linux/sched.h isn't safe for
+ * inclusion in asm.
+ */
+#define CLONE_VM 0x00000100 /* set if VM shared between processes */
+#define CLONE_VFORK 0x00004000 /* set if parent wants the child to wake it up on exit */
+
+/* pid_t vfork(void) */
+/* Implemented as clone(CLONE_VFORK | CLONE_VM | SIGCHLD, 0) */
+
+ .proc vfork
+ .global vfork
+vfork:
+ alloc r2=ar.pfs,0,0,2,0
+ mov r15=__NR_clone
+ mov out0=CLONE_VM|CLONE_VFORK|SIGCHLD
+ mov out1=0
+ ;;
+ __IA64_BREAK // Do the syscall
+
+ addl r15=0,r1
+ cmp.eq p7,p6 = -1,r10
+ ;;
+ ld8 r14=[r15]
+ ;;
+(p7) st4 [r14]=r8
+ ;;
+(p7) mov r8=-1
+ br.ret.sptk.many b0
+ .endp
--- /dev/null
+/*
+ * arch/m68k/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/mips/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/mips64/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/parisc/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/ppc/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/ppc64/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/s390/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/s390x/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/sh/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/sparc/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/sparc64/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
--- /dev/null
+/*
+ * arch/x86_64/include/klibc/archsignal.h
+ *
+ * Architecture-specific signal definitions
+ *
+ */
+
+#ifndef _KLIBC_ARCHSIGNAL_H
+#define _KLIBC_ARCHSIGNAL_H
+
+/* No special stuff for this architecture */
+
+#endif
const unsigned char __ctypes[257] = {
0, /* EOF */
+
+ 0, /* control character */
0, /* control character */
0, /* control character */
0, /* control character */
__ctype_space, /* FF */
__ctype_space, /* CR */
0, /* control character */
+
0, /* control character */
0, /* control character */
0, /* control character */
__ctype_inline int isspace(int __c)
{
- return __ctypes[__c] & __ctype_space;
+ return __ctypes[__c+1] & __ctype_space;
}
__ctype_inline int isupper(int __c)
return __ctypes[__c+1] & __ctype_xdigit;
}
-#define _toupper(__c) ((__c) & ~0x20)
-#define _tolower(__c) ((__c) | 0x20)
+/* Note: this is decimal, not hex, to avoid accidental promotion to unsigned */
+#define _toupper(__c) ((__c) & ~32)
+#define _tolower(__c) ((__c) | 32)
__ctype_inline int toupper(int __c)
{
#include <sys/types.h>
#include <asm/signal.h>
+#include <klibc/archsignal.h>
+
/* Some architectures don't define these */
#ifndef SA_RESETHAND
# define SA_RESETHAND SA_ONESHOT
# define NSIG _NSIG
#endif
-typedef int sig_atomic_t;
-
__extern const char * const sys_siglist[];
/* This assumes sigset_t is either an unsigned long or an array of such,
__extern void *memset(void *, int, size_t);
__extern void *memmem(const void *, size_t, const void *, size_t);
__extern void memswap(void *, void *, size_t);
+__extern int strcasecmp(const char *, const char *);
+__extern int strncasecmp(const char *, const char *, size_t);
__extern char *strcat(char *, const char *);
__extern char *strchr(const char *, int);
__extern int strcmp(const char *, const char *);
__extern char *strcpy(char *, const char *);
__extern size_t strcspn(const char *, const char *);
__extern char *strdup(const char *);
+__extern char *strndup(const char *, size_t);
__extern char *strerror(int);
__extern size_t strlen(const char *);
__extern char *strncat(char *, const char *, size_t);
#ifndef _SYSLOG_H
#define _SYSLOG_H
+#include <stdio.h>
#include <klibc/extern.h>
-#include <stdarg.h>
/* Alert levels */
#define LOG_EMERG 0
__extern void openlog(const char *, int, int);
__extern void syslog(int, const char *, ...);
+__extern void vsyslog(int, const char *, va_list);
__extern void closelog(void);
-__extern void vsyslog(int, const char *format, va_list ap);
#endif /* _SYSLOG_H */
__extern int flock(int, int);
__extern int fsync(int);
__extern int fdatasync(int);
+__extern int ftruncate(int, off_t);
__extern int pause(void);
__extern unsigned int alarm(unsigned int);
__extern int isatty(int);
-__extern int ftruncate(int, off_t);
-
/* Standard file descriptor numbers. */
#define STDIN_FILENO 0
#define STDOUT_FILENO 1
--- /dev/null
+/*
+ * strcasecmp.c
+ *
+ */
+
+#include <string.h>
+#include <ctype.h>
+
+int strcasecmp(const char *s1, const char *s2)
+{
+ char *n1, *n2;
+ int i, retval;
+
+ n1 = strdup(s1);
+ n2 = strdup(s2);
+
+ for (i = 0; i < strlen(n1); i++)
+ n1[i] = toupper(n1[i]);
+ for (i = 0; i < strlen(n2); i++)
+ n2[i] = toupper(n2[i]);
+ retval = strcmp(n1, n2);
+ free(n1);
+ free(n2);
+ return retval;
+}
--- /dev/null
+/*
+ * strncasecmp.c
+ */
+
+#include <string.h>
+#include <ctype.h>
+
+int strncasecmp(const char *s1, const char *s2, size_t n)
+{
+ char *n1, *n2;
+ int i, retval;
+
+ n1 = strndup(s1, n);
+ n2 = strndup(s2, n);
+
+ for (i = 0; i < strlen(n1); i++)
+ n1[i] = toupper(n1[i]);
+ for (i = 0; i < strlen(n2); i++)
+ n2[i] = toupper(n2[i]);
+ retval = strcmp(n1, n2);
+ free(n1);
+ free(n2);
+ return retval;
+}
--- /dev/null
+/*
+ * strndup.c
+ */
+
+#include <string.h>
+#include <stdlib.h>
+
+char *strndup(const char *s, size_t n)
+{
+ int l = n > strlen(s) ? strlen(s)+1 : n+1;
+ char *d = malloc(l);
+
+ if (d)
+ memcpy(d, s, l);
+ d[n] = '\0';
+ return d;
+}
if ( *id )
len += sprintf(buf+3, "%s: ", id);
-
+
rv = vsnprintf(buf+len, BUFLEN-len, format, ap);
len += rv;
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