]> err.no Git - linux-2.6/commit
[POWERPC] Clear RI bit in MSR before restoring r13 when returning to userspace
authorPaul Mackerras <paulus@samba.org>
Wed, 7 Feb 2007 02:13:26 +0000 (13:13 +1100)
committerPaul Mackerras <paulus@samba.org>
Wed, 7 Feb 2007 03:03:23 +0000 (14:03 +1100)
commite56a6e20f3029ed5c178dd0328bd688dbbc8272a
treed71551d8c5f7fac0a839c02d7bd6abe4d4e571bd
parent449d846dbcbf61bdf7d50a923e4791102168c292
[POWERPC] Clear RI bit in MSR before restoring r13 when returning to userspace

Some instruction tracing tools use the RI (recoverable interrupt) bit
in the MSR to indicate when it's safe to single-step.  Currently we
clear RI after restoring r13 when returning to userspace.  However,
if we single-step past the point where r13 is restored, we'll corrupt
r13 in the exception entry code and not restore it.  This moves the
clearing of RI to just before r13 is restored so this doesn't happen.

Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/kernel/entry_64.S