]> err.no Git - linux-2.6/commit
libata: pata_pdc2027x PLL input clock fix
authorAlbert Lee <albertcc@tw.ibm.com>
Tue, 26 Jun 2007 05:43:15 +0000 (13:43 +0800)
committerJeff Garzik <jeff@garzik.org>
Mon, 2 Jul 2007 14:12:34 +0000 (10:12 -0400)
commit8c781bf77a339748839bfd5eedfe2ad3e0e05c4a
treeb36feb822eaecec5735dcc18244503d5bb88e15e
parentabcdceb9d0bf39da7c7ff8bcdff6eb4d9dfec56f
libata: pata_pdc2027x PLL input clock fix

Recently the PLL input clock of pata_pdc2027x is sometimes detected
higer than expected (e.g. 20.027 MHz compared to 16.714 MHz).
It seems sometimes the mdelay() function is not as precise as it
used to be. Per Alan's advice, HT or power management might affect
the precision of mdelay().

This patch calls gettimeofday() to mesure the time elapsed and
calculate the PLL input clock accordingly.

Signed-off-by: Albert Lee <albertcc@tw.ibm.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
drivers/ata/pata_pdc2027x.c