i2c/eeprom: Fall back to SMBus read word transactions
When I2C block reads are not supported by the underlying adapter, use
SMBus read word transactions instead of consecutive byte reads.
Reasons for this change are:
* The consecutive byte read approach is not safe on multi-master buses.
* While consecutive byte reads have less overhead if you only count the
bytes on the bus, it takes more than twice as many transactions as
with SMBus read word transactions, and each transaction has a cost:
taking and releasing the adapter mutex, and for polling drivers,
waiting for the transaction to complete.
This change yields a significant performance boost at HZ=250 with
EEPROMs on an Intel 82801 bus (basically twice as fast.)
SMBus read word transactions are widely supported so I don't expect
compatibility issues.