]> err.no Git - linux-2.6/commit
[POWERPC] Use 1TB segments
authorPaul Mackerras <paulus@samba.org>
Thu, 11 Oct 2007 10:37:10 +0000 (20:37 +1000)
committerPaul Mackerras <paulus@samba.org>
Fri, 12 Oct 2007 04:05:17 +0000 (14:05 +1000)
commit1189be6508d45183013ddb82b18f4934193de274
tree58924481b4de56699e4a884dce8dc601e71cf7d1
parent287e5d6fcccfa38b953cebe307e1ddfd32363355
[POWERPC] Use 1TB segments

This makes the kernel use 1TB segments for all kernel mappings and for
user addresses of 1TB and above, on machines which support them
(currently POWER5+, POWER6 and PA6T).

We detect that the machine supports 1TB segments by looking at the
ibm,processor-segment-sizes property in the device tree.

We don't currently use 1TB segments for user addresses < 1T, since
that would effectively prevent 32-bit processes from using huge pages
unless we also had a way to revert to using 256MB segments.  That
would be possible but would involve extra complications (such as
keeping track of which segment size was used when HPTEs were inserted)
and is not addressed here.

Parts of this patch were originally written by Ben Herrenschmidt.

Signed-off-by: Paul Mackerras <paulus@samba.org>
23 files changed:
arch/powerpc/kernel/entry_64.S
arch/powerpc/kernel/head_64.S
arch/powerpc/kernel/process.c
arch/powerpc/mm/hash_low_64.S
arch/powerpc/mm/hash_native_64.c
arch/powerpc/mm/hash_utils_64.c
arch/powerpc/mm/hugetlbpage.c
arch/powerpc/mm/pgtable_64.c
arch/powerpc/mm/slb.c
arch/powerpc/mm/slb_low.S
arch/powerpc/mm/stab.c
arch/powerpc/mm/tlb_64.c
arch/powerpc/platforms/cell/spu_base.c
arch/powerpc/platforms/cell/spufs/switch.c
arch/powerpc/platforms/celleb/htab.c
arch/powerpc/platforms/iseries/htab.c
arch/powerpc/platforms/ps3/htab.c
arch/powerpc/platforms/pseries/lpar.c
include/asm-powerpc/cputable.h
include/asm-powerpc/machdep.h
include/asm-powerpc/mmu-hash64.h
include/asm-powerpc/page_64.h
include/asm-powerpc/tlbflush.h