X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-sh%2Fpage.h;h=304c30b5d9472b0eee5b1d167d5c5d4cd485e881;hb=13c48c490208d9e70d8d66d56f96c5054db69af7;hp=d00a8fde7c7f82b965552342cbcef6d05b66bbae;hpb=bce943278dc4aa03b0ef9c7cf8b1b7110eda8b91;p=linux-2.6 diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index d00a8fde7c..304c30b5d9 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -5,15 +5,7 @@ * Copyright (C) 1999 Niibe Yutaka */ -/* - [ P0/U0 (virtual) ] 0x00000000 <------ User space - [ P1 (fixed) cached ] 0x80000000 <------ Kernel space - [ P2 (fixed) non-cachable] 0xA0000000 <------ Physical access - [ P3 (virtual) cached] 0xC0000000 <------ vmalloced area - [ P4 control ] 0xE0000000 - */ - -#ifdef __KERNEL__ +#include /* PAGE_SHIFT determines the page size */ #if defined(CONFIG_PAGE_SIZE_4KB) @@ -26,15 +18,13 @@ # error "Bogus kernel page size?" #endif -#ifdef __ASSEMBLY__ -#define PAGE_SIZE (1 << PAGE_SHIFT) -#else -#define PAGE_SIZE (1UL << PAGE_SHIFT) -#endif - +#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) #define PTE_MASK PAGE_MASK +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) + #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) #define HPAGE_SHIFT 16 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) @@ -45,6 +35,8 @@ #define HPAGE_SHIFT 22 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) #define HPAGE_SHIFT 26 +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) +#define HPAGE_SHIFT 29 #endif #ifdef CONFIG_HUGETLB_PAGE @@ -55,27 +47,22 @@ #ifndef __ASSEMBLY__ -extern void (*clear_page)(void *to); -extern void (*copy_page)(void *to, void *from); - extern unsigned long shm_align_mask; extern unsigned long max_low_pfn, min_low_pfn; extern unsigned long memory_start, memory_end; -#ifdef CONFIG_MMU -extern void clear_page_slow(void *to); -extern void copy_page_slow(void *to, void *from); -#else -extern void clear_page_nommu(void *to); -extern void copy_page_nommu(void *to, void *from); -#endif +extern void clear_page(void *to); +extern void copy_page(void *to, void *from); #if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \ - (defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)) + (defined(CONFIG_CPU_SH5) || defined(CONFIG_CPU_SH4) || \ + defined(CONFIG_SH7705_CACHE_32KB)) struct page; struct vm_area_struct; extern void clear_user_page(void *to, unsigned long address, struct page *page); -#ifdef CONFIG_CPU_SH4 +extern void copy_user_page(void *to, void *from, unsigned long address, + struct page *page); +#if defined(CONFIG_CPU_SH4) extern void copy_user_highpage(struct page *to, struct page *from, unsigned long vaddr, struct vm_area_struct *vma); #define __HAVE_ARCH_COPY_USER_HIGHPAGE @@ -96,12 +83,18 @@ typedef struct { unsigned long long pgd; } pgd_t; ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) #define __pte(x) \ ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) -#else +#elif defined(CONFIG_SUPERH32) typedef struct { unsigned long pte_low; } pte_t; typedef struct { unsigned long pgprot; } pgprot_t; typedef struct { unsigned long pgd; } pgd_t; #define pte_val(x) ((x).pte_low) -#define __pte(x) ((pte_t) { (x) } ) +#define __pte(x) ((pte_t) { (x) } ) +#else +typedef struct { unsigned long long pte_low; } pte_t; +typedef struct { unsigned long pgprot; } pgprot_t; +typedef struct { unsigned long pgd; } pgd_t; +#define pte_val(x) ((x).pte_low) +#define __pte(x) ((pte_t) { (x) } ) #endif #define pgd_val(x) ((x).pgd) @@ -110,30 +103,48 @@ typedef struct { unsigned long pgd; } pgd_t; #define __pgd(x) ((pgd_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } ) -#endif /* !__ASSEMBLY__ */ +typedef struct page *pgtable_t; -/* to align the pointer to the (next) page boundary */ -#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) +#endif /* !__ASSEMBLY__ */ /* - * IF YOU CHANGE THIS, PLEASE ALSO CHANGE - * - * arch/sh/kernel/vmlinux.lds.S - * - * which has the same constant encoded.. + * __MEMORY_START and SIZE are the physical addresses and size of RAM. */ - #define __MEMORY_START CONFIG_MEMORY_START #define __MEMORY_SIZE CONFIG_MEMORY_SIZE +/* + * PAGE_OFFSET is the virtual address of the start of kernel address + * space. + */ #define PAGE_OFFSET CONFIG_PAGE_OFFSET -#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) -#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) -#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) +/* + * Virtual to physical RAM address translation. + * + * In 29 bit mode, the physical offset of RAM from address 0 is visible in + * the kernel virtual address space, and thus we don't have to take + * this into account when translating. However in 32 bit mode this offset + * is not visible (it is part of the PMB mapping) and so needs to be + * added or subtracted as required. + */ +#ifdef CONFIG_32BIT +#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START) +#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START)) +#else +#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) +#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) +#endif + +#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) -/* PFN start number, because of __MEMORY_START */ +/* + * PFN = physical frame number (ie PFN 0 == physical address 0) + * PFN_START is the PFN of the first page of RAM. By defining this we + * don't have struct page entries for the portion of address space + * between physical address 0 and the start of RAM. + */ #define PFN_START (__MEMORY_START >> PAGE_SHIFT) #define ARCH_PFN_OFFSET (PFN_START) #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) @@ -154,11 +165,20 @@ typedef struct { unsigned long pgd; } pgd_t; #endif /* - * Slub defaults to 8-byte alignment, we're only interested in 4. - * Slab defaults to BYTES_PER_WORD, which ends up being the same anyways. + * Some drivers need to perform DMA into kmalloc'ed buffers + * and so we have to increase the kmalloc minalign for this. */ -#define ARCH_KMALLOC_MINALIGN 4 -#define ARCH_SLAB_MINALIGN 4 +#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES + +#ifdef CONFIG_SUPERH64 +/* + * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still + * happily generate {ld/st}.q pairs, requiring us to have 8-byte + * alignment to avoid traps. The kmalloc alignment is gauranteed by + * virtue of L1_CACHE_BYTES, requiring this to only be special cased + * for slab caches. + */ +#define ARCH_SLAB_MINALIGN 8 +#endif -#endif /* __KERNEL__ */ #endif /* __ASM_SH_PAGE_H */