X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-powerpc%2Fppc-pci.h;h=854ab713f56cb62b857216285d3b343c13e9ea66;hb=567e9fdd49bcfa7e15ebc0005853ac5529c81856;hp=4a053404bf6b1766a6b90773075eca5d61056655;hpb=bed59275810a55500e885cbdc5c2a0507f13c00e;p=linux-2.6 diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h index 4a053404bf..854ab713f5 100644 --- a/include/asm-powerpc/ppc-pci.h +++ b/include/asm-powerpc/ppc-pci.h @@ -22,11 +22,10 @@ extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary); extern struct list_head hose_list; -extern int global_phb_number; -extern unsigned long find_and_init_phbs(void); +extern void find_and_init_phbs(void); -extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */ +extern struct pci_dev *isa_bridge_pcidev; /* may be NULL if no ISA bus */ /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */ #define BUID_HI(buid) ((buid) >> 32) @@ -47,9 +46,6 @@ extern void init_pci_config_tokens (void); extern unsigned long get_phb_buid (struct device_node *); extern int rtas_setup_phb(struct pci_controller *phb); -/* From pSeries_pci.h */ -extern void pSeries_final_fixup(void); - extern unsigned long pci_probe_only; /* ---- EEH internal-use-only related routines ---- */ @@ -62,15 +58,18 @@ struct pci_dev *pci_get_device_by_addr(unsigned long addr); /** * eeh_slot_error_detail -- record and EEH error condition to the log - * @severity: 1 if temporary, 2 if permanent failure. + * @pdn: pci device node + * @severity: EEH_LOG_TEMP_FAILURE or EEH_LOG_PERM_FAILURE * - * Obtains the the EEH error details from the RTAS subsystem, + * Obtains the EEH error details from the RTAS subsystem, * and then logs these details with the RTAS error log system. */ +#define EEH_LOG_TEMP_FAILURE 1 +#define EEH_LOG_PERM_FAILURE 2 void eeh_slot_error_detail (struct pci_dn *pdn, int severity); /** - * rtas_pci_enableo - enable IO transfers for this slot + * rtas_pci_enable - enable IO transfers for this slot * @pdn: pci device node * @function: either EEH_THAW_MMIO or EEH_THAW_DMA * @@ -82,6 +81,7 @@ int rtas_pci_enable(struct pci_dn *pdn, int function); /** * rtas_set_slot_reset -- unfreeze a frozen slot + * @pdn: pci device node * * Clear the EEH-frozen condition on a slot. This routine * does this by asserting the PCI #RST line for 1/8th of @@ -91,9 +91,11 @@ int rtas_pci_enable(struct pci_dn *pdn, int function); * Returns a non-zero value if the reset failed. */ int rtas_set_slot_reset (struct pci_dn *); +int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs); /** * eeh_restore_bars - Restore device configuration info. + * @pdn: pci device node * * A reset of a PCI device will clear out its config space. * This routines will restore the config space for this @@ -104,6 +106,7 @@ void eeh_restore_bars(struct pci_dn *); /** * rtas_configure_bridge -- firmware initialization of pci bridge + * @pdn: pci device node * * Ask the firmware to configure all PCI bridges devices * located behind the indicated node. Required after a @@ -117,16 +120,25 @@ int rtas_write_config(struct pci_dn *, int where, int size, u32 val); int rtas_read_config(struct pci_dn *, int where, int size, u32 *val); /** + * eeh_mark_slot -- set mode flags for pertition endpoint + * @pdn: pci device node + * * mark and clear slots: find "partition endpoint" PE and set or * clear the flags for each subnode of the PE. */ void eeh_mark_slot (struct device_node *dn, int mode_flag); void eeh_clear_slot (struct device_node *dn, int mode_flag); -/* Find the associated "Partiationable Endpoint" PE */ +/** + * find_device_pe -- Find the associated "Partiationable Endpoint" PE + * @pdn: pci device node + */ struct device_node * find_device_pe(struct device_node *dn); -#endif +void eeh_sysfs_add_device(struct pci_dev *pdev); +void eeh_sysfs_remove_device(struct pci_dev *pdev); + +#endif /* CONFIG_EEH */ #else /* CONFIG_PCI */ static inline void find_and_init_phbs(void) { }