X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-powerpc%2Fcpm2.h;h=f1112c15ef96dd2ac29ed1cc91aee2744c3c3412;hb=bee86f14d51a5a9a3b1897e301da1e415df0ba23;hp=12a2860f9a9c35d2338d26bcb2cb7ca482501a81;hpb=35438c4327df18dbf5e7f597b69299119f4a14de;p=linux-2.6

diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h
index 12a2860f9a..f1112c15ef 100644
--- a/include/asm-powerpc/cpm2.h
+++ b/include/asm-powerpc/cpm2.h
@@ -11,6 +11,11 @@
 #define __CPM2__
 
 #include <asm/immap_cpm2.h>
+#include <asm/cpm.h>
+
+#ifdef CONFIG_PPC_85xx
+#define CPM_MAP_ADDR (get_immrbase() + 0x80000)
+#endif
 
 /* CPM Command register.
 */
@@ -82,6 +87,7 @@
 #define mk_cr_cmd(PG, SBC, MCN, OP) \
 	((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
 
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
 /* Dual Port RAM addresses.  The first 16K is available for almost
  * any CPM use, so we put the BDs there.  The first 128 bytes are
  * used for SMC1 and SMC2 parameter RAM, so we start allocating
@@ -97,6 +103,7 @@
 #define CPM_DATAONLY_SIZE	((uint)(16 * 1024) - CPM_DATAONLY_BASE)
 #define CPM_FCC_SPECIAL_BASE	((uint)0x0000b000)
 #endif
+#endif
 
 /* The number of pages of host memory we allocate for CPM.  This is
  * done early in kernel initialization to get physically contiguous
@@ -107,13 +114,20 @@
 /* Export the base address of the communication processor registers
  * and dual port ram.
  */
-extern		cpm_cpm2_t	*cpmp;	 /* Pointer to comm processor */
+extern cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor */
 
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+#define cpm_dpalloc cpm_muram_alloc
+#define cpm_dpfree cpm_muram_free
+#define cpm_dpram_addr cpm_muram_addr
+#else
 extern unsigned long cpm_dpalloc(uint size, uint align);
 extern int cpm_dpfree(unsigned long offset);
 extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
 extern void cpm_dpdump(void);
 extern void *cpm_dpram_addr(unsigned long offset);
+#endif
+
 extern void cpm_setbrg(uint brg, uint rate);
 extern void cpm2_fastbrg(uint brg, uint rate, int div16);
 extern void cpm2_reset(void);
@@ -1206,7 +1220,9 @@ enum cpm_clk_target {
 	CPM_CLK_SCC4,
 	CPM_CLK_FCC1,
 	CPM_CLK_FCC2,
-	CPM_CLK_FCC3
+	CPM_CLK_FCC3,
+	CPM_CLK_SMC1,
+	CPM_CLK_SMC2,
 };
 
 enum cpm_clk {
@@ -1243,6 +1259,16 @@ enum cpm_clk {
 };
 
 extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
+extern int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock);
+
+#define CPM_PIN_INPUT     0
+#define CPM_PIN_OUTPUT    1
+#define CPM_PIN_PRIMARY   0
+#define CPM_PIN_SECONDARY 2
+#define CPM_PIN_GPIO      4
+#define CPM_PIN_OPENDRAIN 8
+
+void cpm2_set_pin(int port, int pin, int flags);
 
 #endif /* __CPM2__ */
 #endif /* __KERNEL__ */