X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-mips%2Fsmtc.h;h=ff3e8936b493d8b7137ab991fe84fd9e1bdebc19;hb=2463ef22bf8b6e22048bd26f940c014f7e1f0998;hp=44dfa4adecf323e970fcdd17d6c1aed8e67ab32e;hpb=1ba73b99c34c31ea18b44dcf161c6e1f2838e0fa;p=linux-2.6

diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h
index 44dfa4adec..ff3e8936b4 100644
--- a/include/asm-mips/smtc.h
+++ b/include/asm-mips/smtc.h
@@ -55,4 +55,14 @@ extern void smtc_boot_secondary(int cpu, struct task_struct *t);
 
 #define PARKED_INDEX	((unsigned int)0x80000000)
 
+/*
+ * Define low-level interrupt mask for IPIs, if necessary.
+ * By default, use SW interrupt 1, which requires no external
+ * hardware support, but which works only for single-core
+ * MIPS MT systems.
+ */
+#ifndef MIPS_CPU_IPI_IRQ
+#define MIPS_CPU_IPI_IRQ 1
+#endif
+
 #endif /*  _ASM_SMTC_MT_H */