X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-mips%2Firq.h;h=91803ba30ff2abd2ac5d4c19b39b1f4590e5af8d;hb=e98ff7f6d8164c5636538998fb7d1e08b1fbbddd;hp=0ce2a80b689e5da23a72ed6f17bfe01458325ed5;hpb=71fa0a849b384f066dea6a2351c722c19846f4ac;p=linux-2.6 diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h index 0ce2a80b68..91803ba30f 100644 --- a/include/asm-mips/irq.h +++ b/include/asm-mips/irq.h @@ -18,14 +18,12 @@ #ifdef CONFIG_I8259 static inline int irq_canonicalize(int irq) { - return ((irq == 2) ? 9 : irq); + return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq); } #else #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ #endif -extern asmlinkage unsigned int do_IRQ(unsigned int irq); - #ifdef CONFIG_MIPS_MT_SMTC /* * Clear interrupt mask handling "backstop" if irq_hwmask @@ -33,18 +31,16 @@ extern asmlinkage unsigned int do_IRQ(unsigned int irq); * functions will take over re-enabling the low-level mask. * Otherwise it will be done on return from exception. */ -#define __DO_IRQ_SMTC_HOOK() \ +#define __DO_IRQ_SMTC_HOOK(irq) \ do { \ if (irq_hwmask[irq] & 0x0000ff00) \ write_c0_tccontext(read_c0_tccontext() & \ ~(irq_hwmask[irq] & 0x0000ff00)); \ } while (0) #else -#define __DO_IRQ_SMTC_HOOK() do { } while (0) +#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0) #endif -#ifdef CONFIG_PREEMPT - /* * do_IRQ handles all normal device IRQ's (the special * SMP cross-CPU interrupts have their own specific @@ -56,13 +52,11 @@ do { \ #define do_IRQ(irq) \ do { \ irq_enter(); \ - __DO_IRQ_SMTC_HOOK(); \ - __do_IRQ((irq)); \ + __DO_IRQ_SMTC_HOOK(irq); \ + generic_handle_irq(irq); \ irq_exit(); \ } while (0) -#endif - extern void arch_init_irq(void); extern void spurious_interrupt(void); @@ -74,4 +68,8 @@ extern int setup_irq_smtc(unsigned int irq, struct irqaction * new, unsigned long hwmask); #endif /* CONFIG_MIPS_MT_SMTC */ +extern int allocate_irqno(void); +extern void alloc_legacy_irqno(void); +extern void free_irqno(unsigned int irq); + #endif /* _ASM_IRQ_H */