X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-arm%2Fassembler.h;h=d53bafa9bf1c58f80fffdb2910571d3544340e1d;hb=47005f255ed126a4b48a1a2f63164fb1d83bcb0a;hp=f31ac92b6c7f1c0f69dc90e861a0bad367ff6c5e;hpb=16e85d1a3182009ff81d71aaf65a2808bd395a6b;p=linux-2.6

diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
index f31ac92b6c..d53bafa9bf 100644
--- a/include/asm-arm/assembler.h
+++ b/include/asm-arm/assembler.h
@@ -80,16 +80,33 @@
 	instr	regs
 
 /*
- * Save the current IRQ state and disable IRQs.  Note that this macro
- * assumes FIQs are enabled, and that the processor is in SVC mode.
+ * Enable and disable interrupts
  */
-	.macro	save_and_disable_irqs, oldcpsr
-	mrs	\oldcpsr, cpsr
 #if __LINUX_ARM_ARCH__ >= 6
+	.macro	disable_irq
 	cpsid	i
+	.endm
+
+	.macro	enable_irq
+	cpsie	i
+	.endm
 #else
-	msr	cpsr_c, #PSR_I_BIT | MODE_SVC
+	.macro	disable_irq
+	msr	cpsr_c, #PSR_I_BIT | SVC_MODE
+	.endm
+
+	.macro	enable_irq
+	msr	cpsr_c, #SVC_MODE
+	.endm
 #endif
+
+/*
+ * Save the current IRQ state and disable IRQs.  Note that this macro
+ * assumes FIQs are enabled, and that the processor is in SVC mode.
+ */
+	.macro	save_and_disable_irqs, oldcpsr
+	mrs	\oldcpsr, cpsr
+	disable_irq
 	.endm
 
 /*