X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-arm%2Farch-s3c2410%2Funcompress.h;h=a6f6a0e44afaf2e818a716288fc7ba34e1316ffc;hb=a081568d7016061ed848696984e3acf1ba0b3054;hp=4367ec054b51aeb277040bbee9c5f47bb99b5762;hpb=3747b36eeab93d8969e86987bbc1d44971229b26;p=linux-2.6

diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h
index 4367ec054b..a6f6a0e44a 100644
--- a/include/asm-arm/arch-s3c2410/uncompress.h
+++ b/include/asm-arm/arch-s3c2410/uncompress.h
@@ -67,8 +67,7 @@ uart_rd(unsigned int reg)
  * waiting for tx to happen...
 */
 
-static void
-putc(char ch)
+static void putc(int ch)
 {
 	int cpuid = S3C2410_GSTATUS1_2410;
 
@@ -77,9 +76,6 @@ putc(char ch)
 	cpuid &= S3C2410_GSTATUS1_IDMASK;
 #endif
 
-	if (ch == '\n')
-		putc('\r');    /* expand newline to \r\n */
-
 	if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
 		int level;
 
@@ -101,19 +97,16 @@ putc(char ch)
 	} else {
 		/* not using fifos */
 
-		while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE);
+		while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
+			barrier();
 	}
 
 	/* write byte to transmission register */
 	uart_wr(S3C2410_UTXH, ch);
 }
 
-static void
-putstr(const char *ptr)
+static inline void flush(void)
 {
-	for (; *ptr != '\0'; ptr++) {
-		putc(*ptr);
-	}
 }
 
 #define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)