X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=include%2Fasm-arm%2Farch-ns9xxx%2Firqs.h;h=e83d48ec42c9baab2b2bc9d8554462976d5e3a33;hb=252815b0cfe711001eff0327872209986b36d490;hp=25d8d28b27f3b131ec5a943619caaf50e86b2643;hpb=cb553c480078759014096bc766dc76400e1d8397;p=linux-2.6 diff --git a/include/asm-arm/arch-ns9xxx/irqs.h b/include/asm-arm/arch-ns9xxx/irqs.h index 25d8d28b27..e83d48ec42 100644 --- a/include/asm-arm/arch-ns9xxx/irqs.h +++ b/include/asm-arm/arch-ns9xxx/irqs.h @@ -1,7 +1,7 @@ /* * include/asm-arm/arch-ns9xxx/irqs.h * - * Copyright (C) 2006 by Digi International Inc. + * Copyright (C) 2006,2007 by Digi International Inc. * All rights reserved. * * This program is free software; you can redistribute it and/or modify it @@ -11,38 +11,39 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H -#define IRQ_WATCHDOG 0 -#define IRQ_AHBBUSERR 1 -#define IRQ_BBUSAGG 2 +/* NetSilicon 9360 */ +#define IRQ_NS9XXX_WATCHDOG 0 +#define IRQ_NS9XXX_AHBBUSERR 1 +#define IRQ_NS9360_BBUSAGG 2 /* irq 3 is reserved for NS9360 */ -#define IRQ_ETHRX 4 -#define IRQ_ETHTX 5 -#define IRQ_ETHPHY 6 -#define IRQ_LCD 7 -#define IRQ_SERBRX 8 -#define IRQ_SERBTX 9 -#define IRQ_SERARX 10 -#define IRQ_SERATX 11 -#define IRQ_SERCRX 12 -#define IRQ_SERCTX 13 -#define IRQ_I2C 14 -#define IRQ_BBUSDMA 15 -#define IRQ_TIMER0 16 -#define IRQ_TIMER1 17 -#define IRQ_TIMER2 18 -#define IRQ_TIMER3 19 -#define IRQ_TIMER4 20 -#define IRQ_TIMER5 21 -#define IRQ_TIMER6 22 -#define IRQ_TIMER7 23 -#define IRQ_RTC 24 -#define IRQ_USBHOST 25 -#define IRQ_USBDEVICE 26 -#define IRQ_IEEE1284 27 -#define IRQ_EXT0 28 -#define IRQ_EXT1 29 -#define IRQ_EXT2 30 -#define IRQ_EXT3 31 +#define IRQ_NS9XXX_ETHRX 4 +#define IRQ_NS9XXX_ETHTX 5 +#define IRQ_NS9XXX_ETHPHY 6 +#define IRQ_NS9360_LCD 7 +#define IRQ_NS9360_SERBRX 8 +#define IRQ_NS9360_SERBTX 9 +#define IRQ_NS9360_SERARX 10 +#define IRQ_NS9360_SERATX 11 +#define IRQ_NS9360_SERCRX 12 +#define IRQ_NS9360_SERCTX 13 +#define IRQ_NS9360_I2C 14 +#define IRQ_NS9360_BBUSDMA 15 +#define IRQ_NS9360_TIMER0 16 +#define IRQ_NS9360_TIMER1 17 +#define IRQ_NS9360_TIMER2 18 +#define IRQ_NS9360_TIMER3 19 +#define IRQ_NS9360_TIMER4 20 +#define IRQ_NS9360_TIMER5 21 +#define IRQ_NS9360_TIMER6 22 +#define IRQ_NS9360_TIMER7 23 +#define IRQ_NS9360_RTC 24 +#define IRQ_NS9360_USBHOST 25 +#define IRQ_NS9360_USBDEVICE 26 +#define IRQ_NS9360_IEEE1284 27 +#define IRQ_NS9XXX_EXT0 28 +#define IRQ_NS9XXX_EXT1 29 +#define IRQ_NS9XXX_EXT2 30 +#define IRQ_NS9XXX_EXT3 31 #define BBUS_IRQ(irq) (32 + irq) @@ -67,7 +68,7 @@ /* * these Interrupts are specific for the a9m9750dev board. * They are generated by an FPGA that interrupts the CPU on - * IRQ_EXT2 + * IRQ_NS9360_EXT2 */ #define FPGA_IRQ(irq) (64 + irq)