X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fvideo%2Fs3c2410fb.c;h=ae08d45870917e3fac1dc70dca5201c87ff147d3;hb=a57793651ff1a09ef18bade998632435ca2dc13f;hp=e52ec22831615d481b2c4a1fd7b2e6f55bc1115f;hpb=09fe75f6f934597f765748342ca6fb378ee7ecdb;p=linux-2.6 diff --git a/drivers/video/s3c2410fb.c b/drivers/video/s3c2410fb.c index e52ec22831..ae08d45870 100644 --- a/drivers/video/s3c2410fb.c +++ b/drivers/video/s3c2410fb.c @@ -20,7 +20,7 @@ * * 2004-12-04: Arnaud Patard * - Added the possibility to set on or off the - * debugging mesaages + * debugging messages * - Replaced 0 and 1 by on or off when reading the * /sys files * @@ -31,7 +31,7 @@ * - add pixel clock divisor control * * 2004-11-11: Arnaud Patard - * - Removed the use of currcon as it no more exist + * - Removed the use of currcon as it no more exists * - Added LCD power sysfs interface * * 2004-11-03: Ben Dooks @@ -82,13 +82,10 @@ #include #include #include -#include -#include #include #include #include -#include #include #include @@ -102,8 +99,6 @@ #include "s3c2410fb.h" -static struct s3c2410fb_mach_info *mach_info; - /* Debugging stuff */ #ifdef CONFIG_FB_S3C2410_DEBUG static int debug = 1; @@ -122,23 +117,24 @@ static int debug = 0; static void s3c2410fb_set_lcdaddr(struct fb_info *info) { unsigned long saddr1, saddr2, saddr3; - int line_length = info->var.xres * info->var.bits_per_pixel; + struct s3c2410fb_info *fbi = info->par; + void __iomem *regs = fbi->io; saddr1 = info->fix.smem_start >> 1; saddr2 = info->fix.smem_start; - saddr2 += (line_length * info->var.yres) / 8; + saddr2 += info->fix.line_length * info->var.yres; saddr2 >>= 1; saddr3 = S3C2410_OFFSIZE(0) | - S3C2410_PAGEWIDTH((line_length / 16) & 0x3ff); + S3C2410_PAGEWIDTH((info->fix.line_length / 2) & 0x3ff); dprintk("LCDSADDR1 = 0x%08lx\n", saddr1); dprintk("LCDSADDR2 = 0x%08lx\n", saddr2); dprintk("LCDSADDR3 = 0x%08lx\n", saddr3); - writel(saddr1, S3C2410_LCDSADDR1); - writel(saddr2, S3C2410_LCDSADDR2); - writel(saddr3, S3C2410_LCDSADDR3); + writel(saddr1, regs + S3C2410_LCDSADDR1); + writel(saddr2, regs + S3C2410_LCDSADDR2); + writel(saddr3, regs + S3C2410_LCDSADDR3); } /* s3c2410fb_calc_pixclk() @@ -151,14 +147,14 @@ static unsigned int s3c2410fb_calc_pixclk(struct s3c2410fb_info *fbi, unsigned long clk = clk_get_rate(fbi->clk); unsigned long long div; - /* pixclk is in picoseoncds, our clock is in Hz + /* pixclk is in picoseconds, our clock is in Hz * * Hz -> picoseconds is / 10^-12 */ div = (unsigned long long)clk * pixclk; - do_div(div, 1000000UL); - do_div(div, 1000000UL); + div >>= 12; /* div / 2^12 */ + do_div(div, 625 * 625UL * 625); /* div / 5^12 */ dprintk("pixclk %ld, divisor is %ld\n", pixclk, (long)div); return div; @@ -174,22 +170,30 @@ static int s3c2410fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { struct s3c2410fb_info *fbi = info->par; - struct s3c2410fb_mach_info *mach_info = fbi->mach_info; + struct s3c2410fb_mach_info *mach_info = fbi->dev->platform_data; struct s3c2410fb_display *display = NULL; + struct s3c2410fb_display *default_display = mach_info->displays + + mach_info->default_display; + int type = default_display->type; unsigned i; dprintk("check_var(var=%p, info=%p)\n", var, info); /* validate x/y resolution */ - - for (i = 0; i < mach_info->num_displays; i++) - if (var->yres == mach_info->displays[i].yres && - var->xres == mach_info->displays[i].xres && - var->bits_per_pixel == mach_info->displays[i].bpp) { - display = mach_info->displays + i; - fbi->current_display = i; - break; - } + /* choose default mode if possible */ + if (var->yres == default_display->yres && + var->xres == default_display->xres && + var->bits_per_pixel == default_display->bpp) + display = default_display; + else + for (i = 0; i < mach_info->num_displays; i++) + if (type == mach_info->displays[i].type && + var->yres == mach_info->displays[i].yres && + var->xres == mach_info->displays[i].xres && + var->bits_per_pixel == mach_info->displays[i].bpp) { + display = mach_info->displays + i; + break; + } if (!display) { dprintk("wrong resolution or depth %dx%d at %d bpp\n", @@ -197,6 +201,25 @@ static int s3c2410fb_check_var(struct fb_var_screeninfo *var, return -EINVAL; } + /* it is always the size as the display */ + var->xres_virtual = display->xres; + var->yres_virtual = display->yres; + var->height = display->height; + var->width = display->width; + + /* copy lcd settings */ + var->pixclock = display->pixclock; + var->left_margin = display->left_margin; + var->right_margin = display->right_margin; + var->upper_margin = display->upper_margin; + var->lower_margin = display->lower_margin; + var->vsync_len = display->vsync_len; + var->hsync_len = display->hsync_len; + + fbi->regs.lcdcon5 = display->lcdcon5; + /* set display type */ + fbi->regs.lcdcon1 = display->type; + var->transp.offset = 0; var->transp.length = 0; /* set r/g/b positions */ @@ -237,7 +260,7 @@ static int s3c2410fb_check_var(struct fb_var_screeninfo *var, default: case 16: - if (display->regs.lcdcon5 & S3C2410_LCDCON5_FRM565) { + if (display->lcdcon5 & S3C2410_LCDCON5_FRM565) { /* 16 bpp, 565 format */ var->red.offset = 11; var->green.offset = 5; @@ -255,8 +278,8 @@ static int s3c2410fb_check_var(struct fb_var_screeninfo *var, var->blue.length = 5; } break; - case 24: - /* 24 bpp 888 */ + case 32: + /* 24 bpp 888 and 8 dummy */ var->red.length = 8; var->red.offset = 16; var->green.length = 8; @@ -264,148 +287,161 @@ static int s3c2410fb_check_var(struct fb_var_screeninfo *var, var->blue.length = 8; var->blue.offset = 0; break; - - } return 0; } -/* s3c2410fb_activate_var +/* s3c2410fb_calculate_stn_lcd_regs * - * activate (set) the controller from the given framebuffer - * information + * calculate register values from var settings */ -static void s3c2410fb_activate_var(struct fb_info *info, - struct fb_var_screeninfo *var) +static void s3c2410fb_calculate_stn_lcd_regs(const struct fb_info *info, + struct s3c2410fb_hw *regs) { - struct s3c2410fb_info *fbi = info->par; - struct s3c2410fb_mach_info *mach_info = fbi->mach_info; - struct s3c2410fb_display *display = mach_info->displays + - fbi->current_display; - int hs; - - fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_MODEMASK; - fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_TFT; - - dprintk("%s: var->xres = %d\n", __FUNCTION__, var->xres); - dprintk("%s: var->yres = %d\n", __FUNCTION__, var->yres); - dprintk("%s: var->bpp = %d\n", __FUNCTION__, var->bits_per_pixel); + const struct s3c2410fb_info *fbi = info->par; + const struct fb_var_screeninfo *var = &info->var; + int type = regs->lcdcon1 & ~S3C2410_LCDCON1_TFT; + int hs = var->xres >> 2; + unsigned wdly = (var->left_margin >> 4) - 1; + unsigned wlh = (var->hsync_len >> 4) - 1; - fbi->regs.lcdcon1 |= display->type; - - if (display->type == S3C2410_LCDCON1_TFT) - switch (var->bits_per_pixel) { - case 1: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT1BPP; - break; - case 2: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT2BPP; - break; - case 4: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT4BPP; - break; - case 8: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT8BPP; - break; - case 16: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT16BPP; - break; - - default: - /* invalid pixel depth */ - dev_err(fbi->dev, "invalid bpp %d\n", - var->bits_per_pixel); - } - else - switch (var->bits_per_pixel) { - case 1: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN1BPP; - break; - case 2: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN2GREY; - break; - case 4: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN4GREY; - break; - case 8: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN8BPP; - break; - case 12: - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_STN12BPP; - break; - - default: - /* invalid pixel depth */ - dev_err(fbi->dev, "invalid bpp %d\n", - var->bits_per_pixel); - } + if (type != S3C2410_LCDCON1_STN4) + hs >>= 1; - /* check to see if we need to update sync/borders */ + switch (var->bits_per_pixel) { + case 1: + regs->lcdcon1 |= S3C2410_LCDCON1_STN1BPP; + break; + case 2: + regs->lcdcon1 |= S3C2410_LCDCON1_STN2GREY; + break; + case 4: + regs->lcdcon1 |= S3C2410_LCDCON1_STN4GREY; + break; + case 8: + regs->lcdcon1 |= S3C2410_LCDCON1_STN8BPP; + hs *= 3; + break; + case 12: + regs->lcdcon1 |= S3C2410_LCDCON1_STN12BPP; + hs *= 3; + break; - if (!mach_info->fixed_syncs) { - dprintk("setting vert: up=%d, low=%d, sync=%d\n", - var->upper_margin, var->lower_margin, var->vsync_len); + default: + /* invalid pixel depth */ + dev_err(fbi->dev, "invalid bpp %d\n", + var->bits_per_pixel); + } + /* update X/Y info */ + dprintk("setting horz: lft=%d, rt=%d, sync=%d\n", + var->left_margin, var->right_margin, var->hsync_len); - dprintk("setting horz: lft=%d, rt=%d, sync=%d\n", - var->left_margin, var->right_margin, var->hsync_len); + regs->lcdcon2 = S3C2410_LCDCON2_LINEVAL(var->yres - 1); - fbi->regs.lcdcon2 = - S3C2410_LCDCON2_VBPD(var->upper_margin - 1) | - S3C2410_LCDCON2_VFPD(var->lower_margin - 1) | - S3C2410_LCDCON2_VSPW(var->vsync_len - 1); + if (wdly > 3) + wdly = 3; - fbi->regs.lcdcon3 = - S3C2410_LCDCON3_HBPD(var->right_margin - 1) | - S3C2410_LCDCON3_HFPD(var->left_margin - 1); + if (wlh > 3) + wlh = 3; - fbi->regs.lcdcon4 &= ~S3C2410_LCDCON4_HSPW(0xff); - fbi->regs.lcdcon4 |= S3C2410_LCDCON4_HSPW(var->hsync_len - 1); - } + regs->lcdcon3 = S3C2410_LCDCON3_WDLY(wdly) | + S3C2410_LCDCON3_LINEBLANK(var->right_margin / 8) | + S3C2410_LCDCON3_HOZVAL(hs - 1); - /* update X/Y info */ + regs->lcdcon4 = S3C2410_LCDCON4_WLH(wlh); +} - fbi->regs.lcdcon2 &= ~S3C2410_LCDCON2_LINEVAL(0x3ff); - fbi->regs.lcdcon2 |= S3C2410_LCDCON2_LINEVAL(var->yres - 1); +/* s3c2410fb_calculate_tft_lcd_regs + * + * calculate register values from var settings + */ +static void s3c2410fb_calculate_tft_lcd_regs(const struct fb_info *info, + struct s3c2410fb_hw *regs) +{ + const struct s3c2410fb_info *fbi = info->par; + const struct fb_var_screeninfo *var = &info->var; - switch (display->type) { - case S3C2410_LCDCON1_DSCAN4: - case S3C2410_LCDCON1_STN8: - hs = var->xres / 8; + switch (var->bits_per_pixel) { + case 1: + regs->lcdcon1 |= S3C2410_LCDCON1_TFT1BPP; break; - case S3C2410_LCDCON1_STN4: - hs = var->xres / 4; + case 2: + regs->lcdcon1 |= S3C2410_LCDCON1_TFT2BPP; break; - default: - case S3C2410_LCDCON1_TFT: - hs = var->xres; + case 4: + regs->lcdcon1 |= S3C2410_LCDCON1_TFT4BPP; + break; + case 8: + regs->lcdcon1 |= S3C2410_LCDCON1_TFT8BPP; + regs->lcdcon5 |= S3C2410_LCDCON5_BSWP | + S3C2410_LCDCON5_FRM565; + regs->lcdcon5 &= ~S3C2410_LCDCON5_HWSWP; + break; + case 16: + regs->lcdcon1 |= S3C2410_LCDCON1_TFT16BPP; + regs->lcdcon5 &= ~S3C2410_LCDCON5_BSWP; + regs->lcdcon5 |= S3C2410_LCDCON5_HWSWP; + break; + case 32: + regs->lcdcon1 |= S3C2410_LCDCON1_TFT24BPP; + regs->lcdcon5 &= ~(S3C2410_LCDCON5_BSWP | + S3C2410_LCDCON5_HWSWP | + S3C2410_LCDCON5_BPP24BL); break; + default: + /* invalid pixel depth */ + dev_err(fbi->dev, "invalid bpp %d\n", + var->bits_per_pixel); } + /* update X/Y info */ + dprintk("setting vert: up=%d, low=%d, sync=%d\n", + var->upper_margin, var->lower_margin, var->vsync_len); - /* Special cases : STN color displays */ - if (((fbi->regs.lcdcon1 & S3C2410_LCDCON1_MODEMASK) == S3C2410_LCDCON1_STN8BPP) || - ((fbi->regs.lcdcon1 & S3C2410_LCDCON1_MODEMASK) == S3C2410_LCDCON1_STN12BPP)) - hs = hs * 3; + dprintk("setting horz: lft=%d, rt=%d, sync=%d\n", + var->left_margin, var->right_margin, var->hsync_len); - fbi->regs.lcdcon3 &= ~S3C2410_LCDCON3_HOZVAL(0x7ff); - fbi->regs.lcdcon3 |= S3C2410_LCDCON3_HOZVAL(hs - 1); + regs->lcdcon2 = S3C2410_LCDCON2_LINEVAL(var->yres - 1) | + S3C2410_LCDCON2_VBPD(var->upper_margin - 1) | + S3C2410_LCDCON2_VFPD(var->lower_margin - 1) | + S3C2410_LCDCON2_VSPW(var->vsync_len - 1); - if (var->pixclock > 0) { - int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock); + regs->lcdcon3 = S3C2410_LCDCON3_HBPD(var->right_margin - 1) | + S3C2410_LCDCON3_HFPD(var->left_margin - 1) | + S3C2410_LCDCON3_HOZVAL(var->xres - 1); - if (display->type == S3C2410_LCDCON1_TFT) { - clkdiv = (clkdiv / 2) - 1; - if (clkdiv < 0) - clkdiv = 0; - } else { - clkdiv = (clkdiv / 2); - if (clkdiv < 2) - clkdiv = 2; - } + regs->lcdcon4 = S3C2410_LCDCON4_HSPW(var->hsync_len - 1); +} + +/* s3c2410fb_activate_var + * + * activate (set) the controller from the given framebuffer + * information + */ +static void s3c2410fb_activate_var(struct fb_info *info) +{ + struct s3c2410fb_info *fbi = info->par; + void __iomem *regs = fbi->io; + int type = fbi->regs.lcdcon1 & S3C2410_LCDCON1_TFT; + struct fb_var_screeninfo *var = &info->var; + int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock) / 2; - fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_CLKVAL(0x3ff); - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_CLKVAL(clkdiv); + dprintk("%s: var->xres = %d\n", __FUNCTION__, var->xres); + dprintk("%s: var->yres = %d\n", __FUNCTION__, var->yres); + dprintk("%s: var->bpp = %d\n", __FUNCTION__, var->bits_per_pixel); + + if (type == S3C2410_LCDCON1_TFT) { + s3c2410fb_calculate_tft_lcd_regs(info, &fbi->regs); + --clkdiv; + if (clkdiv < 0) + clkdiv = 0; + } else { + s3c2410fb_calculate_stn_lcd_regs(info, &fbi->regs); + if (clkdiv < 2) + clkdiv = 2; } + fbi->regs.lcdcon1 |= S3C2410_LCDCON1_CLKVAL(clkdiv); + /* write new registers */ dprintk("new register set:\n"); @@ -415,16 +451,18 @@ static void s3c2410fb_activate_var(struct fb_info *info, dprintk("lcdcon[4] = 0x%08lx\n", fbi->regs.lcdcon4); dprintk("lcdcon[5] = 0x%08lx\n", fbi->regs.lcdcon5); - writel(fbi->regs.lcdcon1 & ~S3C2410_LCDCON1_ENVID, S3C2410_LCDCON1); - writel(fbi->regs.lcdcon2, S3C2410_LCDCON2); - writel(fbi->regs.lcdcon3, S3C2410_LCDCON3); - writel(fbi->regs.lcdcon4, S3C2410_LCDCON4); - writel(fbi->regs.lcdcon5, S3C2410_LCDCON5); + writel(fbi->regs.lcdcon1 & ~S3C2410_LCDCON1_ENVID, + regs + S3C2410_LCDCON1); + writel(fbi->regs.lcdcon2, regs + S3C2410_LCDCON2); + writel(fbi->regs.lcdcon3, regs + S3C2410_LCDCON3); + writel(fbi->regs.lcdcon4, regs + S3C2410_LCDCON4); + writel(fbi->regs.lcdcon5, regs + S3C2410_LCDCON5); /* set lcd address pointers */ s3c2410fb_set_lcdaddr(info); - writel(fbi->regs.lcdcon1, S3C2410_LCDCON1); + fbi->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID, + writel(fbi->regs.lcdcon1, regs + S3C2410_LCDCON1); } /* @@ -437,7 +475,9 @@ static int s3c2410fb_set_par(struct fb_info *info) struct fb_var_screeninfo *var = &info->var; switch (var->bits_per_pixel) { + case 32: case 16: + case 12: info->fix.visual = FB_VISUAL_TRUECOLOR; break; case 1: @@ -452,7 +492,7 @@ static int s3c2410fb_set_par(struct fb_info *info) /* activate this new configuration */ - s3c2410fb_activate_var(info, var); + s3c2410fb_activate_var(info); return 0; } @@ -493,6 +533,7 @@ static int s3c2410fb_setcolreg(unsigned regno, unsigned transp, struct fb_info *info) { struct s3c2410fb_info *fbi = info->par; + void __iomem *regs = fbi->io; unsigned int val; /* dprintk("setcol: regno=%d, rgb=%d,%d,%d\n", @@ -517,11 +558,11 @@ static int s3c2410fb_setcolreg(unsigned regno, if (regno < 256) { /* currently assume RGB 5-6-5 mode */ - val = ((red >> 0) & 0xf800); - val |= ((green >> 5) & 0x07e0); - val |= ((blue >> 11) & 0x001f); + val = (red >> 0) & 0xf800; + val |= (green >> 5) & 0x07e0; + val |= (blue >> 11) & 0x001f; - writel(val, S3C2410_TFTPAL(regno)); + writel(val, regs + S3C2410_TFTPAL(regno)); schedule_palette_update(fbi, regno, val); } @@ -552,16 +593,16 @@ static int s3c2410fb_setcolreg(unsigned regno, */ static int s3c2410fb_blank(int blank_mode, struct fb_info *info) { - dprintk("blank(mode=%d, info=%p)\n", blank_mode, info); + struct s3c2410fb_info *fbi = info->par; + void __iomem *regs = fbi->io; - if (mach_info == NULL) - return -EINVAL; + dprintk("blank(mode=%d, info=%p)\n", blank_mode, info); if (blank_mode == FB_BLANK_UNBLANK) - writel(0x0, S3C2410_TPAL); + writel(0x0, regs + S3C2410_TPAL); else { dprintk("setting TPAL to output 0x000000\n"); - writel(S3C2410_TPAL_EN, S3C2410_TPAL); + writel(S3C2410_TPAL_EN, regs + S3C2410_TPAL); } return 0; @@ -572,13 +613,11 @@ static int s3c2410fb_debug_show(struct device *dev, { return snprintf(buf, PAGE_SIZE, "%s\n", debug ? "on" : "off"); } + static int s3c2410fb_debug_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) { - if (mach_info == NULL) - return -EINVAL; - if (len < 1) return -EINVAL; @@ -621,36 +660,35 @@ static struct fb_ops s3c2410fb_ops = { static int __init s3c2410fb_map_video_memory(struct fb_info *info) { struct s3c2410fb_info *fbi = info->par; + dma_addr_t map_dma; + unsigned map_size = PAGE_ALIGN(info->fix.smem_len); dprintk("map_video_memory(fbi=%p)\n", fbi); - fbi->map_size = PAGE_ALIGN(info->fix.smem_len + PAGE_SIZE); - fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size, - &fbi->map_dma, GFP_KERNEL); + info->screen_base = dma_alloc_writecombine(fbi->dev, map_size, + &map_dma, GFP_KERNEL); - fbi->map_size = info->fix.smem_len; - - if (fbi->map_cpu) { + if (info->screen_base) { /* prevent initial garbage on screen */ dprintk("map_video_memory: clear %p:%08x\n", - fbi->map_cpu, fbi->map_size); - memset(fbi->map_cpu, 0xf0, fbi->map_size); + info->screen_base, map_size); + memset(info->screen_base, 0xf0, map_size); - fbi->screen_dma = fbi->map_dma; - info->screen_base = fbi->map_cpu; - info->fix.smem_start = fbi->screen_dma; + info->fix.smem_start = map_dma; - dprintk("map_video_memory: dma=%08x cpu=%p size=%08x\n", - fbi->map_dma, fbi->map_cpu, info->fix.smem_len); + dprintk("map_video_memory: dma=%08lx cpu=%p size=%08x\n", + info->fix.smem_start, info->screen_base, map_size); } - return fbi->map_cpu ? 0 : -ENOMEM; + return info->screen_base ? 0 : -ENOMEM; } -static inline void s3c2410fb_unmap_video_memory(struct s3c2410fb_info *fbi) +static inline void s3c2410fb_unmap_video_memory(struct fb_info *info) { - dma_free_writecombine(fbi->dev, fbi->map_size, fbi->map_cpu, - fbi->map_dma); + struct s3c2410fb_info *fbi = info->par; + + dma_free_writecombine(fbi->dev, PAGE_ALIGN(info->fix.smem_len), + info->screen_base, info->fix.smem_start); } static inline void modify_gpio(void __iomem *reg, @@ -668,6 +706,7 @@ static inline void modify_gpio(void __iomem *reg, static int s3c2410fb_init_registers(struct fb_info *info) { struct s3c2410fb_info *fbi = info->par; + struct s3c2410fb_mach_info *mach_info = fbi->dev->platform_data; unsigned long flags; void __iomem *regs = fbi->io; @@ -684,14 +723,6 @@ static int s3c2410fb_init_registers(struct fb_info *info) local_irq_restore(flags); - writel(fbi->regs.lcdcon1, regs + S3C2410_LCDCON1); - writel(fbi->regs.lcdcon2, regs + S3C2410_LCDCON2); - writel(fbi->regs.lcdcon3, regs + S3C2410_LCDCON3); - writel(fbi->regs.lcdcon4, regs + S3C2410_LCDCON4); - writel(fbi->regs.lcdcon5, regs + S3C2410_LCDCON5); - - s3c2410fb_set_lcdaddr(info); - dprintk("LPCSEL = 0x%08lx\n", mach_info->lpcsel); writel(mach_info->lpcsel, regs + S3C2410_LPCSEL); @@ -700,9 +731,6 @@ static int s3c2410fb_init_registers(struct fb_info *info) /* ensure temporary palette disabled */ writel(0x00, regs + S3C2410_TPAL); - /* Enable video by setting the ENVID bit to 1 */ - fbi->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID; - writel(fbi->regs.lcdcon1, regs + S3C2410_LCDCON1); return 0; } @@ -756,7 +784,7 @@ static int __init s3c2410fb_probe(struct platform_device *pdev) struct s3c2410fb_info *info; struct s3c2410fb_display *display; struct fb_info *fbinfo; - struct s3c2410fb_hw *mregs; + struct s3c2410fb_mach_info *mach_info; struct resource *res; int ret; int irq; @@ -772,7 +800,6 @@ static int __init s3c2410fb_probe(struct platform_device *pdev) } display = mach_info->displays + mach_info->default_display; - mregs = &display->regs; irq = platform_get_irq(pdev, 0); if (irq < 0) { @@ -784,6 +811,8 @@ static int __init s3c2410fb_probe(struct platform_device *pdev) if (!fbinfo) return -ENOMEM; + platform_set_drvdata(pdev, fbinfo); + info = fbinfo->par; info->dev = &pdev->dev; @@ -809,22 +838,14 @@ static int __init s3c2410fb_probe(struct platform_device *pdev) goto release_mem; } - platform_set_drvdata(pdev, fbinfo); - dprintk("devinit\n"); strcpy(fbinfo->fix.id, driver_name); - memcpy(&info->regs, &display->regs, sizeof(info->regs)); - - /* Stop the video and unset ENVID if set */ - info->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID; + /* Stop the video */ lcdcon1 = readl(info->io + S3C2410_LCDCON1); writel(lcdcon1 & ~S3C2410_LCDCON1_ENVID, info->io + S3C2410_LCDCON1); - info->mach_info = pdev->dev.platform_data; - info->current_display = mach_info->default_display; - fbinfo->fix.type = FB_TYPE_PACKED_PIXELS; fbinfo->fix.type_aux = 0; fbinfo->fix.xpanstep = 0; @@ -834,8 +855,6 @@ static int __init s3c2410fb_probe(struct platform_device *pdev) fbinfo->var.nonstd = 0; fbinfo->var.activate = FB_ACTIVATE_NOW; - fbinfo->var.height = display->height; - fbinfo->var.width = display->width; fbinfo->var.accel_flags = 0; fbinfo->var.vmode = FB_VMODE_NONINTERLACED; @@ -843,46 +862,6 @@ static int __init s3c2410fb_probe(struct platform_device *pdev) fbinfo->flags = FBINFO_FLAG_DEFAULT; fbinfo->pseudo_palette = &info->pseudo_pal; - fbinfo->var.xres = display->xres; - fbinfo->var.xres_virtual = display->xres; - fbinfo->var.yres = display->yres; - fbinfo->var.yres_virtual = display->yres; - fbinfo->var.bits_per_pixel = display->bpp; - - fbinfo->var.upper_margin = - S3C2410_LCDCON2_GET_VBPD(mregs->lcdcon2) + 1; - fbinfo->var.lower_margin = - S3C2410_LCDCON2_GET_VFPD(mregs->lcdcon2) + 1; - fbinfo->var.vsync_len = - S3C2410_LCDCON2_GET_VSPW(mregs->lcdcon2) + 1; - - fbinfo->var.left_margin = - S3C2410_LCDCON3_GET_HFPD(mregs->lcdcon3) + 1; - fbinfo->var.right_margin = - S3C2410_LCDCON3_GET_HBPD(mregs->lcdcon3) + 1; - fbinfo->var.hsync_len = - S3C2410_LCDCON4_GET_HSPW(mregs->lcdcon4) + 1; - - fbinfo->var.red.offset = 11; - fbinfo->var.green.offset = 5; - fbinfo->var.blue.offset = 0; - fbinfo->var.transp.offset = 0; - fbinfo->var.red.length = 5; - fbinfo->var.green.length = 6; - fbinfo->var.blue.length = 5; - fbinfo->var.transp.length = 0; - - /* find maximum required memory size for display */ - for (i = 0; i < mach_info->num_displays; i++) { - unsigned long smem_len = mach_info->displays[i].xres; - - smem_len *= mach_info->displays[i].yres; - smem_len *= mach_info->displays[i].bpp; - smem_len >>= 3; - if (fbinfo->fix.smem_len < smem_len) - fbinfo->fix.smem_len = smem_len; - } - for (i = 0; i < 256; i++) info->palette_buffer[i] = PALETTE_BUFF_CLEAR; @@ -905,6 +884,17 @@ static int __init s3c2410fb_probe(struct platform_device *pdev) msleep(1); + /* find maximum required memory size for display */ + for (i = 0; i < mach_info->num_displays; i++) { + unsigned long smem_len = mach_info->displays[i].xres; + + smem_len *= mach_info->displays[i].yres; + smem_len *= mach_info->displays[i].bpp; + smem_len >>= 3; + if (fbinfo->fix.smem_len < smem_len) + fbinfo->fix.smem_len = smem_len; + } + /* Initialize video memory */ ret = s3c2410fb_map_video_memory(fbinfo); if (ret) { @@ -915,6 +905,10 @@ static int __init s3c2410fb_probe(struct platform_device *pdev) dprintk("got video memory\n"); + fbinfo->var.xres = display->xres; + fbinfo->var.yres = display->yres; + fbinfo->var.bits_per_pixel = display->bpp; + s3c2410fb_init_registers(fbinfo); s3c2410fb_check_var(&fbinfo->var, fbinfo); @@ -935,7 +929,7 @@ static int __init s3c2410fb_probe(struct platform_device *pdev) return 0; free_video_memory: - s3c2410fb_unmap_video_memory(info); + s3c2410fb_unmap_video_memory(fbinfo); release_clock: clk_disable(info->clk); clk_put(info->clk); @@ -947,6 +941,7 @@ release_mem: release_resource(info->mem); kfree(info->mem); dealloc_fb: + platform_set_drvdata(pdev, NULL); framebuffer_release(fbinfo); return ret; } @@ -976,10 +971,12 @@ static int s3c2410fb_remove(struct platform_device *pdev) struct s3c2410fb_info *info = fbinfo->par; int irq; + unregister_framebuffer(fbinfo); + s3c2410fb_stop_lcd(info); msleep(1); - s3c2410fb_unmap_video_memory(info); + s3c2410fb_unmap_video_memory(fbinfo); if (info->clk) { clk_disable(info->clk); @@ -990,10 +987,13 @@ static int s3c2410fb_remove(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); free_irq(irq, info); + iounmap(info->io); + release_resource(info->mem); kfree(info->mem); - iounmap(info->io); - unregister_framebuffer(fbinfo); + + platform_set_drvdata(pdev, NULL); + framebuffer_release(fbinfo); return 0; } @@ -1047,7 +1047,7 @@ static struct platform_driver s3c2410fb_driver = { }, }; -int __devinit s3c2410fb_init(void) +int __init s3c2410fb_init(void) { return platform_driver_register(&s3c2410fb_driver); }