X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fscsi%2Fips.c;h=bb152fb9fec7dc4b3260c2b4add978ba4af0e314;hb=b1c118121ae37285ddc0a7a908999196bb35fb0b;hp=2ed099e2c20d50ae6d91dacd3832c57f61de6c24;hpb=419217cb1d0266f62cbea6cdc6b1d1324350bc34;p=linux-2.6 diff --git a/drivers/scsi/ips.c b/drivers/scsi/ips.c index 2ed099e2c2..bb152fb9fe 100644 --- a/drivers/scsi/ips.c +++ b/drivers/scsi/ips.c @@ -389,17 +389,17 @@ static struct pci_device_id ips_pci_table[] = { MODULE_DEVICE_TABLE( pci, ips_pci_table ); static char ips_hot_plug_name[] = "ips"; - + static int __devinit ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent); static void __devexit ips_remove_device(struct pci_dev *pci_dev); - + static struct pci_driver ips_pci_driver = { .name = ips_hot_plug_name, .id_table = ips_pci_table, .probe = ips_insert_device, .remove = __devexit_p(ips_remove_device), }; - + /* * Necessary forward function protoypes @@ -587,7 +587,7 @@ static void ips_setup_funclist(ips_ha_t * ha) { - /* + /* * Setup Functions */ if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) { @@ -702,12 +702,8 @@ ips_release(struct Scsi_Host *sh) /* free extra memory */ ips_free(ha); - /* Free I/O Region */ - if (ha->io_addr) - release_region(ha->io_addr, ha->io_len); - /* free IRQ */ - free_irq(ha->irq, ha); + free_irq(ha->pcidev->irq, ha); scsi_host_put(sh); @@ -1313,7 +1309,7 @@ ips_intr_copperhead(ips_ha_t * ha) cstatus.value = (*ha->func.statupd) (ha); if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) { - /* Spurious Interupt ? */ + /* Spurious Interrupt ? */ continue; } @@ -1515,7 +1511,7 @@ static int ips_is_passthru(struct scsi_cmnd *SC) /* kmap_atomic() ensures addressability of the user buffer.*/ /* local_irq_save() protects the KM_IRQ0 address slot. */ local_irq_save(flags); - buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset; + buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; if (buffer && buffer[0] == 'C' && buffer[1] == 'O' && buffer[2] == 'P' && buffer[3] == 'P') { kunmap_atomic(buffer - sg->offset, KM_IRQ0); @@ -1637,7 +1633,7 @@ ips_make_passthru(ips_ha_t *ha, struct scsi_cmnd *SC, ips_scb_t *scb, int intr) return (IPS_FAILURE); } - if (ha->device_id == IPS_DEVICEID_COPPERHEAD && + if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD && pt->CoppCP.cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW) { ret = ips_flash_copperhead(ha, pt, scb); @@ -2021,7 +2017,7 @@ ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb) pt->ExtendedStatus = scb->extended_status; pt->AdapterType = ha->ad_type; - if (ha->device_id == IPS_DEVICEID_COPPERHEAD && + if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD && (scb->cmd.flashfw.op_code == IPS_CMD_DOWNLOAD || scb->cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW)) ips_free_flash_copperhead(ha); @@ -2075,13 +2071,13 @@ ips_host_info(ips_ha_t * ha, char *ptr, off_t offset, int len) ha->mem_ptr); } - copy_info(&info, "\tIRQ number : %d\n", ha->irq); + copy_info(&info, "\tIRQ number : %d\n", ha->pcidev->irq); /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */ /* That keeps everything happy for "text" operations on the proc file. */ if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) { - if (ha->nvram->bios_low[3] == 0) { + if (ha->nvram->bios_low[3] == 0) { copy_info(&info, "\tBIOS Version : %c%c%c%c%c%c%c\n", ha->nvram->bios_high[0], ha->nvram->bios_high[1], @@ -2232,31 +2228,31 @@ ips_identify_controller(ips_ha_t * ha) { METHOD_TRACE("ips_identify_controller", 1); - switch (ha->device_id) { + switch (ha->pcidev->device) { case IPS_DEVICEID_COPPERHEAD: - if (ha->revision_id <= IPS_REVID_SERVERAID) { + if (ha->pcidev->revision <= IPS_REVID_SERVERAID) { ha->ad_type = IPS_ADTYPE_SERVERAID; - } else if (ha->revision_id == IPS_REVID_SERVERAID2) { + } else if (ha->pcidev->revision == IPS_REVID_SERVERAID2) { ha->ad_type = IPS_ADTYPE_SERVERAID2; - } else if (ha->revision_id == IPS_REVID_NAVAJO) { + } else if (ha->pcidev->revision == IPS_REVID_NAVAJO) { ha->ad_type = IPS_ADTYPE_NAVAJO; - } else if ((ha->revision_id == IPS_REVID_SERVERAID2) + } else if ((ha->pcidev->revision == IPS_REVID_SERVERAID2) && (ha->slot_num == 0)) { ha->ad_type = IPS_ADTYPE_KIOWA; - } else if ((ha->revision_id >= IPS_REVID_CLARINETP1) && - (ha->revision_id <= IPS_REVID_CLARINETP3)) { + } else if ((ha->pcidev->revision >= IPS_REVID_CLARINETP1) && + (ha->pcidev->revision <= IPS_REVID_CLARINETP3)) { if (ha->enq->ucMaxPhysicalDevices == 15) ha->ad_type = IPS_ADTYPE_SERVERAID3L; else ha->ad_type = IPS_ADTYPE_SERVERAID3; - } else if ((ha->revision_id >= IPS_REVID_TROMBONE32) && - (ha->revision_id <= IPS_REVID_TROMBONE64)) { + } else if ((ha->pcidev->revision >= IPS_REVID_TROMBONE32) && + (ha->pcidev->revision <= IPS_REVID_TROMBONE64)) { ha->ad_type = IPS_ADTYPE_SERVERAID4H; } break; case IPS_DEVICEID_MORPHEUS: - switch (ha->subdevice_id) { + switch (ha->pcidev->subsystem_device) { case IPS_SUBDEVICEID_4L: ha->ad_type = IPS_ADTYPE_SERVERAID4L; break; @@ -2285,7 +2281,7 @@ ips_identify_controller(ips_ha_t * ha) break; case IPS_DEVICEID_MARCO: - switch (ha->subdevice_id) { + switch (ha->pcidev->subsystem_device) { case IPS_SUBDEVICEID_6M: ha->ad_type = IPS_ADTYPE_SERVERAID6M; break; @@ -2332,20 +2328,20 @@ ips_get_bios_version(ips_ha_t * ha, int intr) strncpy(ha->bios_version, " ?", 8); - if (ha->device_id == IPS_DEVICEID_COPPERHEAD) { + if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD) { if (IPS_USE_MEMIO(ha)) { /* Memory Mapped I/O */ /* test 1st byte */ writel(0, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55) return; writel(1, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA) @@ -2353,20 +2349,20 @@ ips_get_bios_version(ips_ha_t * ha, int intr) /* Get Major version */ writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ major = readb(ha->mem_ptr + IPS_REG_FLDP); /* Get Minor version */ writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ minor = readb(ha->mem_ptr + IPS_REG_FLDP); /* Get SubMinor version */ writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ subminor = readb(ha->mem_ptr + IPS_REG_FLDP); @@ -2375,14 +2371,14 @@ ips_get_bios_version(ips_ha_t * ha, int intr) /* test 1st byte */ outl(0, ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55) return; outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA) @@ -2390,21 +2386,21 @@ ips_get_bios_version(ips_ha_t * ha, int intr) /* Get Major version */ outl(cpu_to_le32(0x1FF), ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ major = inb(ha->io_addr + IPS_REG_FLDP); /* Get Minor version */ outl(cpu_to_le32(0x1FE), ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ minor = inb(ha->io_addr + IPS_REG_FLDP); /* Get SubMinor version */ outl(cpu_to_le32(0x1FD), ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ subminor = inb(ha->io_addr + IPS_REG_FLDP); @@ -2740,8 +2736,6 @@ ips_next(ips_ha_t * ha, int intr) SC->result = DID_OK; SC->host_scribble = NULL; - memset(SC->sense_buffer, 0, sizeof (SC->sense_buffer)); - scb->target_id = SC->device->id; scb->lun = SC->device->lun; scb->bus = SC->device->channel; @@ -2780,10 +2774,11 @@ ips_next(ips_ha_t * ha, int intr) scb->dcdb.cmd_attribute = ips_command_direction[scb->scsi_cmd->cmnd[0]]; - /* Allow a WRITE BUFFER Command to Have no Data */ - /* This is Used by Tape Flash Utilites */ - if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) && (scb->data_len == 0)) - scb->dcdb.cmd_attribute = 0; + /* Allow a WRITE BUFFER Command to Have no Data */ + /* This is Used by Tape Flash Utilites */ + if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) && + (scb->data_len == 0)) + scb->dcdb.cmd_attribute = 0; if (!(scb->dcdb.cmd_attribute & 0x3)) scb->dcdb.transfer_length = 0; @@ -3252,7 +3247,7 @@ ips_done(ips_ha_t * ha, ips_scb_t * scb) */ if ((scb->breakup) || (scb->sg_break)) { struct scatterlist *sg; - int sg_dma_index, ips_sg_index = 0; + int i, sg_dma_index, ips_sg_index = 0; /* we had a data breakup */ scb->data_len = 0; @@ -3261,20 +3256,22 @@ ips_done(ips_ha_t * ha, ips_scb_t * scb) /* Spin forward to last dma chunk */ sg_dma_index = scb->breakup; + for (i = 0; i < scb->breakup; i++) + sg = sg_next(sg); /* Take care of possible partial on last chunk */ ips_fill_scb_sg_single(ha, - sg_dma_address(&sg[sg_dma_index]), + sg_dma_address(sg), scb, ips_sg_index++, - sg_dma_len(&sg[sg_dma_index])); + sg_dma_len(sg)); for (; sg_dma_index < scsi_sg_count(scb->scsi_cmd); - sg_dma_index++) { + sg_dma_index++, sg = sg_next(sg)) { if (ips_fill_scb_sg_single (ha, - sg_dma_address(&sg[sg_dma_index]), + sg_dma_address(sg), scb, ips_sg_index++, - sg_dma_len(&sg[sg_dma_index])) < 0) + sg_dma_len(sg)) < 0) break; } @@ -3402,7 +3399,7 @@ ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp) /* Restrict access to physical DASD */ if (scb->scsi_cmd->cmnd[0] == INQUIRY) { - ips_scmd_buf_read(scb->scsi_cmd, + ips_scmd_buf_read(scb->scsi_cmd, &inquiryData, sizeof (inquiryData)); if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) { errcode = DID_TIME_OUT; @@ -3436,13 +3433,11 @@ ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp) (IPS_DCDB_TABLE_TAPE *) & scb->dcdb; memcpy(scb->scsi_cmd->sense_buffer, tapeDCDB->sense_info, - sizeof (scb->scsi_cmd-> - sense_buffer)); + SCSI_SENSE_BUFFERSIZE); } else { memcpy(scb->scsi_cmd->sense_buffer, scb->dcdb.sense_info, - sizeof (scb->scsi_cmd-> - sense_buffer)); + SCSI_SENSE_BUFFERSIZE); } device_error = 2; /* check condition */ } @@ -3521,7 +3516,7 @@ ips_scmd_buf_write(struct scsi_cmnd *scmd, void *data, unsigned int count) /* kmap_atomic() ensures addressability of the data buffer.*/ /* local_irq_save() protects the KM_IRQ0 address slot. */ local_irq_save(flags); - buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset; + buffer = kmap_atomic(sg_page(&sg[i]), KM_IRQ0) + sg[i].offset; memcpy(buffer, &cdata[xfer_cnt], min_cnt); kunmap_atomic(buffer - sg[i].offset, KM_IRQ0); local_irq_restore(flags); @@ -3554,7 +3549,7 @@ ips_scmd_buf_read(struct scsi_cmnd *scmd, void *data, unsigned int count) /* kmap_atomic() ensures addressability of the data buffer.*/ /* local_irq_save() protects the KM_IRQ0 address slot. */ local_irq_save(flags); - buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset; + buffer = kmap_atomic(sg_page(&sg[i]), KM_IRQ0) + sg[i].offset; memcpy(&cdata[xfer_cnt], buffer, min_cnt); kunmap_atomic(buffer - sg[i].offset, KM_IRQ0); local_irq_restore(flags); @@ -3822,7 +3817,6 @@ ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb) /* attempted, a Check Condition occurred, and Sense */ /* Data indicating an Invalid CDB OpCode is returned. */ sp = (char *) scb->scsi_cmd->sense_buffer; - memset(sp, 0, sizeof (scb->scsi_cmd->sense_buffer)); sp[0] = 0x70; /* Error Code */ sp[2] = ILLEGAL_REQUEST; /* Sense Key 5 Illegal Req. */ @@ -4088,10 +4082,10 @@ ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus) scb->scsi_cmd->result = errcode << 16; } else { /* bus == 0 */ /* restrict access to physical drives */ - if (scb->scsi_cmd->cmnd[0] == INQUIRY) { - ips_scmd_buf_read(scb->scsi_cmd, + if (scb->scsi_cmd->cmnd[0] == INQUIRY) { + ips_scmd_buf_read(scb->scsi_cmd, &inquiryData, sizeof (inquiryData)); - if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) + if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) scb->scsi_cmd->result = DID_TIME_OUT << 16; } } /* else */ @@ -4391,8 +4385,6 @@ ips_free(ips_ha_t * ha) ha->mem_ptr = NULL; } - if (ha->mem_addr) - release_mem_region(ha->mem_addr, ha->mem_len); ha->mem_addr = 0; } @@ -4659,8 +4651,8 @@ ips_isinit_morpheus(ips_ha_t * ha) uint32_t bits; METHOD_TRACE("ips_is_init_morpheus", 1); - - if (ips_isintr_morpheus(ha)) + + if (ips_isintr_morpheus(ha)) ips_flush_and_reset(ha); post = readl(ha->mem_ptr + IPS_REG_I960_MSG0); @@ -4684,7 +4676,7 @@ ips_isinit_morpheus(ips_ha_t * ha) /* state ( was trying to INIT and an interrupt was already pending ) ... */ /* */ /****************************************************************************/ -static void +static void ips_flush_and_reset(ips_ha_t *ha) { ips_scb_t *scb; @@ -4716,9 +4708,9 @@ ips_flush_and_reset(ips_ha_t *ha) if (ret == IPS_SUCCESS) { time = 60 * IPS_ONE_SEC; /* Max Wait time is 60 seconds */ done = 0; - + while ((time > 0) && (!done)) { - done = ips_poll_for_flush_complete(ha); + done = ips_poll_for_flush_complete(ha); /* This may look evil, but it's only done during extremely rare start-up conditions ! */ udelay(1000); time--; @@ -4747,17 +4739,17 @@ static int ips_poll_for_flush_complete(ips_ha_t * ha) { IPS_STATUS cstatus; - + while (TRUE) { cstatus.value = (*ha->func.statupd) (ha); if (cstatus.value == 0xffffffff) /* If No Interrupt to process */ break; - + /* Success is when we see the Flush Command ID */ - if (cstatus.fields.command_id == IPS_MAX_CMDS ) + if (cstatus.fields.command_id == IPS_MAX_CMDS) return 1; - } + } return 0; } @@ -4901,7 +4893,7 @@ ips_init_copperhead(ips_ha_t * ha) /* Enable busmastering */ outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) /* fix for anaconda64 */ outl(0, ha->io_addr + IPS_REG_NDAE); @@ -4995,7 +4987,7 @@ ips_init_copperhead_memio(ips_ha_t * ha) /* Enable busmastering */ writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) /* fix for anaconda64 */ writel(0, ha->mem_ptr + IPS_REG_NDAE); @@ -5140,7 +5132,7 @@ ips_reset_copperhead(ips_ha_t * ha) METHOD_TRACE("ips_reset_copperhead", 1); DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d", - ips_name, ha->host_num, ha->io_addr, ha->irq); + ips_name, ha->host_num, ha->io_addr, ha->pcidev->irq); reset_counter = 0; @@ -5185,7 +5177,7 @@ ips_reset_copperhead_memio(ips_ha_t * ha) METHOD_TRACE("ips_reset_copperhead_memio", 1); DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d", - ips_name, ha->host_num, ha->mem_addr, ha->irq); + ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq); reset_counter = 0; @@ -5231,7 +5223,7 @@ ips_reset_morpheus(ips_ha_t * ha) METHOD_TRACE("ips_reset_morpheus", 1); DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d", - ips_name, ha->host_num, ha->mem_addr, ha->irq); + ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq); reset_counter = 0; @@ -5918,7 +5910,7 @@ ips_read_config(ips_ha_t * ha, int intr) return (0); } - + memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf)); return (1); } @@ -5957,7 +5949,7 @@ ips_readwrite_page5(ips_ha_t * ha, int write, int intr) scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr; if (write) memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram)); - + /* issue the command */ if (((ret = ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE) @@ -6194,32 +6186,32 @@ ips_erase_bios(ips_ha_t * ha) /* Clear the status register */ outl(0, ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ outb(0x50, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* Erase Setup */ outb(0x20, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* Erase Confirm */ outb(0xD0, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* Erase Status */ outb(0x70, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ timeout = 80000; /* 80 seconds */ while (timeout > 0) { - if (ha->revision_id == IPS_REVID_TROMBONE64) { + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { outl(0, ha->io_addr + IPS_REG_FLAP); udelay(25); /* 25 us */ } @@ -6239,13 +6231,13 @@ ips_erase_bios(ips_ha_t * ha) /* try to suspend the erase */ outb(0xB0, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* wait for 10 seconds */ timeout = 10000; while (timeout > 0) { - if (ha->revision_id == IPS_REVID_TROMBONE64) { + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { outl(0, ha->io_addr + IPS_REG_FLAP); udelay(25); /* 25 us */ } @@ -6275,12 +6267,12 @@ ips_erase_bios(ips_ha_t * ha) /* Otherwise, we were successful */ /* clear status */ outb(0x50, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* enable reads */ outb(0xFF, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ return (0); @@ -6306,32 +6298,32 @@ ips_erase_bios_memio(ips_ha_t * ha) /* Clear the status register */ writel(0, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ writeb(0x50, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* Erase Setup */ writeb(0x20, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* Erase Confirm */ writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* Erase Status */ writeb(0x70, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ timeout = 80000; /* 80 seconds */ while (timeout > 0) { - if (ha->revision_id == IPS_REVID_TROMBONE64) { + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { writel(0, ha->mem_ptr + IPS_REG_FLAP); udelay(25); /* 25 us */ } @@ -6351,13 +6343,13 @@ ips_erase_bios_memio(ips_ha_t * ha) /* try to suspend the erase */ writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* wait for 10 seconds */ timeout = 10000; while (timeout > 0) { - if (ha->revision_id == IPS_REVID_TROMBONE64) { + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { writel(0, ha->mem_ptr + IPS_REG_FLAP); udelay(25); /* 25 us */ } @@ -6387,12 +6379,12 @@ ips_erase_bios_memio(ips_ha_t * ha) /* Otherwise, we were successful */ /* clear status */ writeb(0x50, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* enable reads */ writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ return (0); @@ -6421,21 +6413,21 @@ ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, for (i = 0; i < buffersize; i++) { /* write a byte */ outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ outb(0x40, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ outb(buffer[i], ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* wait up to one second */ timeout = 1000; while (timeout > 0) { - if (ha->revision_id == IPS_REVID_TROMBONE64) { + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { outl(0, ha->io_addr + IPS_REG_FLAP); udelay(25); /* 25 us */ } @@ -6452,11 +6444,11 @@ ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, if (timeout == 0) { /* timeout error */ outl(0, ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ outb(0xFF, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ return (1); @@ -6466,11 +6458,11 @@ ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, if (status & 0x18) { /* programming error */ outl(0, ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ outb(0xFF, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ return (1); @@ -6479,11 +6471,11 @@ ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, /* Enable reading */ outl(0, ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ outb(0xFF, ha->io_addr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ return (0); @@ -6512,21 +6504,21 @@ ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize, for (i = 0; i < buffersize; i++) { /* write a byte */ writel(i + offset, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ writeb(0x40, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ /* wait up to one second */ timeout = 1000; while (timeout > 0) { - if (ha->revision_id == IPS_REVID_TROMBONE64) { + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { writel(0, ha->mem_ptr + IPS_REG_FLAP); udelay(25); /* 25 us */ } @@ -6543,11 +6535,11 @@ ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize, if (timeout == 0) { /* timeout error */ writel(0, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ return (1); @@ -6557,11 +6549,11 @@ ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize, if (status & 0x18) { /* programming error */ writel(0, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ return (1); @@ -6570,11 +6562,11 @@ ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize, /* Enable reading */ writel(0, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ return (0); @@ -6599,14 +6591,14 @@ ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, /* test 1st byte */ outl(0, ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55) return (1); outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA) return (1); @@ -6615,7 +6607,7 @@ ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, for (i = 2; i < buffersize; i++) { outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP); @@ -6648,14 +6640,14 @@ ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize, /* test 1st byte */ writel(0, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55) return (1); writel(1, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA) return (1); @@ -6664,7 +6656,7 @@ ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize, for (i = 2; i < buffersize; i++) { writel(i + offset, ha->mem_ptr + IPS_REG_FLAP); - if (ha->revision_id == IPS_REVID_TROMBONE64) + if (ha->pcidev->revision == IPS_REVID_TROMBONE64) udelay(25); /* 25 us */ checksum = @@ -6835,24 +6827,18 @@ ips_register_scsi(int index) } ha = IPS_HA(sh); memcpy(ha, oldha, sizeof (ips_ha_t)); - free_irq(oldha->irq, oldha); + free_irq(oldha->pcidev->irq, oldha); /* Install the interrupt handler with the new ha */ - if (request_irq(ha->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) { + if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) { IPS_PRINTK(KERN_WARNING, ha->pcidev, "Unable to install interrupt handler\n"); - scsi_host_put(sh); - return -1; + goto err_out_sh; } kfree(oldha); - ips_sh[index] = sh; - ips_ha[index] = ha; /* Store away needed values for later use */ - sh->io_port = ha->io_addr; - sh->n_io_port = ha->io_addr ? 255 : 0; sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr; - sh->irq = ha->irq; sh->sg_tablesize = sh->hostt->sg_tablesize; sh->can_queue = sh->hostt->can_queue; sh->cmd_per_lun = sh->hostt->cmd_per_lun; @@ -6865,10 +6851,21 @@ ips_register_scsi(int index) sh->max_channel = ha->nbus - 1; sh->can_queue = ha->max_cmds - 1; - scsi_add_host(sh, NULL); + if (scsi_add_host(sh, &ha->pcidev->dev)) + goto err_out; + + ips_sh[index] = sh; + ips_ha[index] = ha; + scsi_scan_host(sh); return 0; + +err_out: + free_irq(ha->pcidev->irq, ha); +err_out_sh: + scsi_host_put(sh); + return -1; } /*---------------------------------------------------------------------------*/ @@ -6880,20 +6877,14 @@ ips_register_scsi(int index) static void __devexit ips_remove_device(struct pci_dev *pci_dev) { - int i; - struct Scsi_Host *sh; - ips_ha_t *ha; + struct Scsi_Host *sh = pci_get_drvdata(pci_dev); - for (i = 0; i < IPS_MAX_ADAPTERS; i++) { - ha = ips_ha[i]; - if (ha) { - if ((pci_dev->bus->number == ha->pcidev->bus->number) && - (pci_dev->devfn == ha->pcidev->devfn)) { - sh = ips_sh[i]; - ips_release(sh); - } - } - } + pci_set_drvdata(pci_dev, NULL); + + ips_release(sh); + + pci_release_regions(pci_dev); + pci_disable_device(pci_dev); } /****************************************************************************/ @@ -6947,12 +6938,17 @@ module_exit(ips_module_exit); static int __devinit ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent) { - int uninitialized_var(index); + int index = -1; int rc; METHOD_TRACE("ips_insert_device", 1); - if (pci_enable_device(pci_dev)) - return -1; + rc = pci_enable_device(pci_dev); + if (rc) + return rc; + + rc = pci_request_regions(pci_dev, "ips"); + if (rc) + goto err_out; rc = ips_init_phase1(pci_dev, &index); if (rc == SUCCESS) @@ -6968,6 +6964,19 @@ ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent) ips_num_controllers++; ips_next_controller = ips_num_controllers; + + if (rc < 0) { + rc = -ENODEV; + goto err_out_regions; + } + + pci_set_drvdata(pci_dev, ips_sh[index]); + return 0; + +err_out_regions: + pci_release_regions(pci_dev); +err_out: + pci_disable_device(pci_dev); return rc; } @@ -6990,8 +6999,6 @@ ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr) uint32_t mem_len; uint8_t bus; uint8_t func; - uint8_t irq; - uint16_t subdevice_id; int j; int index; dma_addr_t dma_address; @@ -7002,7 +7009,7 @@ ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr) METHOD_TRACE("ips_init_phase1", 1); index = IPS_MAX_ADAPTERS; for (j = 0; j < IPS_MAX_ADAPTERS; j++) { - if (ips_ha[j] == 0) { + if (ips_ha[j] == NULL) { index = j; break; } @@ -7012,7 +7019,6 @@ ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr) return -1; /* stuff that we get in dev */ - irq = pci_dev->irq; bus = pci_dev->bus->number; func = pci_dev->devfn; @@ -7040,34 +7046,17 @@ ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr) uint32_t base; uint32_t offs; - if (!request_mem_region(mem_addr, mem_len, "ips")) { - IPS_PRINTK(KERN_WARNING, pci_dev, - "Couldn't allocate IO Memory space %x len %d.\n", - mem_addr, mem_len); - return -1; - } - base = mem_addr & PAGE_MASK; offs = mem_addr - base; ioremap_ptr = ioremap(base, PAGE_SIZE); + if (!ioremap_ptr) + return -1; mem_ptr = ioremap_ptr + offs; } else { ioremap_ptr = NULL; mem_ptr = NULL; } - /* setup I/O mapped area (if applicable) */ - if (io_addr) { - if (!request_region(io_addr, io_len, "ips")) { - IPS_PRINTK(KERN_WARNING, pci_dev, - "Couldn't allocate IO space %x len %d.\n", - io_addr, io_len); - return -1; - } - } - - subdevice_id = pci_dev->subsystem_device; - /* found a controller */ ha = kzalloc(sizeof (ips_ha_t), GFP_KERNEL); if (ha == NULL) { @@ -7076,13 +7065,11 @@ ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr) return -1; } - ips_sh[index] = NULL; ips_ha[index] = ha; ha->active = 1; /* Store info in HA structure */ - ha->irq = irq; ha->io_addr = io_addr; ha->io_len = io_len; ha->mem_addr = mem_addr; @@ -7090,10 +7077,7 @@ ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr) ha->mem_ptr = mem_ptr; ha->ioremap_ptr = ioremap_ptr; ha->host_num = (uint32_t) index; - ha->revision_id = pci_dev->revision; ha->slot_num = PCI_SLOT(pci_dev->devfn); - ha->device_id = pci_dev->device; - ha->subdevice_id = subdevice_id; ha->pcidev = pci_dev; /* @@ -7238,7 +7222,7 @@ ips_init_phase2(int index) } /* Install the interrupt handler */ - if (request_irq(ha->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) { + if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) { IPS_PRINTK(KERN_WARNING, ha->pcidev, "Unable to install interrupt handler\n"); return ips_abort_init(ha, index); @@ -7251,14 +7235,14 @@ ips_init_phase2(int index) if (!ips_allocatescbs(ha)) { IPS_PRINTK(KERN_WARNING, ha->pcidev, "Unable to allocate a CCB\n"); - free_irq(ha->irq, ha); + free_irq(ha->pcidev->irq, ha); return ips_abort_init(ha, index); } if (!ips_hainit(ha)) { IPS_PRINTK(KERN_WARNING, ha->pcidev, "Unable to initialize controller\n"); - free_irq(ha->irq, ha); + free_irq(ha->pcidev->irq, ha); return ips_abort_init(ha, index); } /* Free the temporary SCB */ @@ -7268,7 +7252,7 @@ ips_init_phase2(int index) if (!ips_allocatescbs(ha)) { IPS_PRINTK(KERN_WARNING, ha->pcidev, "Unable to allocate CCBs\n"); - free_irq(ha->irq, ha); + free_irq(ha->pcidev->irq, ha); return ips_abort_init(ha, index); }