X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fnet%2Fsky2.c;h=7eeefa2d6c89c8fd1691add25fbbbfde5ea7c2cd;hb=8a84fc15ae5cafcc366dd85cf8e1ab2040679abc;hp=f37fe8fabe7b3dd10d76202707c8de72e7087354;hpb=b4d01327e4c05ab555a4cf38a33f4b4fa2f75e64;p=linux-2.6 diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index f37fe8fabe..7eeefa2d6c 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c @@ -106,6 +106,7 @@ static const struct pci_device_id sky2_id_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */ + { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */ { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, @@ -117,6 +118,7 @@ static const struct pci_device_id sky2_id_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, + { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, @@ -126,6 +128,7 @@ static const struct pci_device_id sky2_id_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, + { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, { 0 } }; @@ -286,7 +289,7 @@ static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port) static void sky2_phy_init(struct sky2_hw *hw, unsigned port) { struct sky2_port *sky2 = netdev_priv(hw->dev[port]); - u16 ctrl, ct1000, adv, pg, ledctrl, ledover; + u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg; if (sky2->autoneg == AUTONEG_ENABLE && !(hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)) { @@ -305,7 +308,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) } ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); - if (hw->copper) { + if (sky2_is_copper(hw)) { if (hw->chip_id == CHIP_ID_YUKON_FE) { /* enable automatic crossover */ ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1; @@ -322,25 +325,37 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA; } } - gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); } else { /* workaround for deviation #4.88 (CRC errors) */ /* disable Automatic Crossover */ ctrl &= ~PHY_M_PC_MDIX_MSK; - gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); + } - if (hw->chip_id == CHIP_ID_YUKON_XL) { - /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */ - gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); - ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); - ctrl &= ~PHY_M_MAC_MD_MSK; - ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX); - gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); + gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); + + /* special setup for PHY 88E1112 Fiber */ + if (hw->chip_id == CHIP_ID_YUKON_XL && !sky2_is_copper(hw)) { + pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); + /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */ + gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); + ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); + ctrl &= ~PHY_M_MAC_MD_MSK; + ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX); + gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); + + if (hw->pmd_type == 'P') { /* select page 1 to access Fiber registers */ gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1); + + /* for SFP-module set SIGDET polarity to low */ + ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); + ctrl |= PHY_M_FIB_SIGD_POL; + gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); } + + gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); } ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); @@ -355,9 +370,10 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) ctrl = 0; ct1000 = 0; adv = PHY_AN_CSMA; + reg = 0; if (sky2->autoneg == AUTONEG_ENABLE) { - if (hw->copper) { + if (sky2_is_copper(hw)) { if (sky2->advertising & ADVERTISED_1000baseT_Full) ct1000 |= PHY_M_1000C_AFD; if (sky2->advertising & ADVERTISED_1000baseT_Half) @@ -370,8 +386,12 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) adv |= PHY_M_AN_10_FD; if (sky2->advertising & ADVERTISED_10baseT_Half) adv |= PHY_M_AN_10_HD; - } else /* special defines for FIBER (88E1011S only) */ - adv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD; + } else { /* special defines for FIBER (88E1040S only) */ + if (sky2->advertising & ADVERTISED_1000baseT_Full) + adv |= PHY_M_AN_1000X_AFD; + if (sky2->advertising & ADVERTISED_1000baseT_Half) + adv |= PHY_M_AN_1000X_AHD; + } /* Set Flow-control capabilities */ if (sky2->tx_pause && sky2->rx_pause) @@ -387,21 +407,46 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) /* forced speed/duplex settings */ ct1000 = PHY_M_1000C_MSE; - if (sky2->duplex == DUPLEX_FULL) - ctrl |= PHY_CT_DUP_MD; + /* Disable auto update for duplex flow control and speed */ + reg |= GM_GPCR_AU_ALL_DIS; switch (sky2->speed) { case SPEED_1000: ctrl |= PHY_CT_SP1000; + reg |= GM_GPCR_SPEED_1000; break; case SPEED_100: ctrl |= PHY_CT_SP100; + reg |= GM_GPCR_SPEED_100; break; } + if (sky2->duplex == DUPLEX_FULL) { + reg |= GM_GPCR_DUP_FULL; + ctrl |= PHY_CT_DUP_MD; + } else if (sky2->speed != SPEED_1000 && hw->chip_id != CHIP_ID_YUKON_EC_U) { + /* Turn off flow control for 10/100mbps */ + sky2->rx_pause = 0; + sky2->tx_pause = 0; + } + + if (!sky2->rx_pause) + reg |= GM_GPCR_FC_RX_DIS; + + if (!sky2->tx_pause) + reg |= GM_GPCR_FC_TX_DIS; + + /* Forward pause packets to GMAC? */ + if (sky2->tx_pause || sky2->rx_pause) + sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); + else + sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); + ctrl |= PHY_CT_RESET; } + gma_write16(hw, port, GM_GP_CTRL, reg); + if (hw->chip_id != CHIP_ID_YUKON_FE) gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); @@ -505,6 +550,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); } + /* Enable phy interrupt on auto-negotiation complete (or link up) */ if (sky2->autoneg == AUTONEG_ENABLE) gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); @@ -567,49 +613,11 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0); } - if (sky2->autoneg == AUTONEG_DISABLE) { - reg = gma_read16(hw, port, GM_GP_CTRL); - reg |= GM_GPCR_AU_ALL_DIS; - gma_write16(hw, port, GM_GP_CTRL, reg); - gma_read16(hw, port, GM_GP_CTRL); - - switch (sky2->speed) { - case SPEED_1000: - reg &= ~GM_GPCR_SPEED_100; - reg |= GM_GPCR_SPEED_1000; - break; - case SPEED_100: - reg &= ~GM_GPCR_SPEED_1000; - reg |= GM_GPCR_SPEED_100; - break; - case SPEED_10: - reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100); - break; - } - - if (sky2->duplex == DUPLEX_FULL) - reg |= GM_GPCR_DUP_FULL; - - /* turn off pause in 10/100mbps half duplex */ - else if (sky2->speed != SPEED_1000 && - hw->chip_id != CHIP_ID_YUKON_EC_U) - sky2->tx_pause = sky2->rx_pause = 0; - } else - reg = GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100 | GM_GPCR_DUP_FULL; - - if (!sky2->tx_pause && !sky2->rx_pause) { - sky2_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); - reg |= - GM_GPCR_FC_TX_DIS | GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS; - } else if (sky2->tx_pause && !sky2->rx_pause) { - /* disable Rx flow-control */ - reg |= GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS; - } - - gma_write16(hw, port, GM_GP_CTRL, reg); - sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC)); + /* Enable Transmit FIFO Underrun */ + sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK); + spin_lock_bh(&sky2->phy_lock); sky2_phy_init(hw, port); spin_unlock_bh(&sky2->phy_lock); @@ -819,7 +827,7 @@ static void rx_set_checksum(struct sky2_port *sky2) struct sky2_rx_le *le; le = sky2_next_rx(sky2); - le->addr = (ETH_HLEN << 16) | ETH_HLEN; + le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN); le->ctrl = 0; le->opcode = OP_TCPSTART | HW_OWNER; @@ -1176,7 +1184,7 @@ static unsigned tx_le_req(const struct sk_buff *skb) if (skb_is_gso(skb)) ++count; - if (skb->ip_summed == CHECKSUM_HW) + if (skb->ip_summed == CHECKSUM_PARTIAL) ++count; return count; @@ -1237,7 +1245,7 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev) /* Send high bits if changed or crosses boundary */ if (addr64 != sky2->tx_addr64 || high32(mapping + len) != sky2->tx_addr64) { le = get_tx_le(sky2); - le->tx.addr = cpu_to_le32(addr64); + le->addr = cpu_to_le32(addr64); le->ctrl = 0; le->opcode = OP_ADDR64 | HW_OWNER; sky2->tx_addr64 = high32(mapping + len); @@ -1252,8 +1260,7 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev) if (mss != sky2->tx_last_mss) { le = get_tx_le(sky2); - le->tx.tso.size = cpu_to_le16(mss); - le->tx.tso.rsvd = 0; + le->addr = cpu_to_le32(mss); le->opcode = OP_LRGLEN | HW_OWNER; le->ctrl = 0; sky2->tx_last_mss = mss; @@ -1266,7 +1273,7 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev) if (sky2->vlgrp && vlan_tx_tag_present(skb)) { if (!le) { le = get_tx_le(sky2); - le->tx.addr = 0; + le->addr = 0; le->opcode = OP_VLAN|HW_OWNER; le->ctrl = 0; } else @@ -1277,21 +1284,22 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev) #endif /* Handle TCP checksum offload */ - if (skb->ip_summed == CHECKSUM_HW) { - u16 hdr = skb->h.raw - skb->data; - u16 offset = hdr + skb->csum; + if (skb->ip_summed == CHECKSUM_PARTIAL) { + unsigned offset = skb->h.raw - skb->data; + u32 tcpsum; + + tcpsum = offset << 16; /* sum start */ + tcpsum |= offset + skb->csum; /* sum write */ ctrl = CALSUM | WR_SUM | INIT_SUM | LOCK_SUM; if (skb->nh.iph->protocol == IPPROTO_UDP) ctrl |= UDPTCP; - if (hdr != sky2->tx_csum_start || offset != sky2->tx_csum_offset) { - sky2->tx_csum_start = hdr; - sky2->tx_csum_offset = offset; + if (tcpsum != sky2->tx_tcpsum) { + sky2->tx_tcpsum = tcpsum; le = get_tx_le(sky2); - le->tx.csum.start = cpu_to_le16(hdr); - le->tx.csum.offset = cpu_to_le16(offset); + le->addr = cpu_to_le32(tcpsum); le->length = 0; /* initial checksum value */ le->ctrl = 1; /* one packet */ le->opcode = OP_TCPLISW | HW_OWNER; @@ -1299,7 +1307,7 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev) } le = get_tx_le(sky2); - le->tx.addr = cpu_to_le32((u32) mapping); + le->addr = cpu_to_le32((u32) mapping); le->length = cpu_to_le16(len); le->ctrl = ctrl; le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER); @@ -1317,14 +1325,14 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev) addr64 = high32(mapping); if (addr64 != sky2->tx_addr64) { le = get_tx_le(sky2); - le->tx.addr = cpu_to_le32(addr64); + le->addr = cpu_to_le32(addr64); le->ctrl = 0; le->opcode = OP_ADDR64 | HW_OWNER; sky2->tx_addr64 = addr64; } le = get_tx_le(sky2); - le->tx.addr = cpu_to_le32((u32) mapping); + le->addr = cpu_to_le32((u32) mapping); le->length = cpu_to_le16(frag->size); le->ctrl = ctrl; le->opcode = OP_BUFFER | HW_OWNER; @@ -1504,7 +1512,7 @@ static int sky2_down(struct net_device *dev) static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux) { - if (!hw->copper) + if (!sky2_is_copper(hw)) return SPEED_1000; if (hw->chip_id == CHIP_ID_YUKON_FE) @@ -1526,40 +1534,10 @@ static void sky2_link_up(struct sky2_port *sky2) unsigned port = sky2->port; u16 reg; - /* Enable Transmit FIFO Underrun */ - sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK); - - reg = gma_read16(hw, port, GM_GP_CTRL); - if (sky2->autoneg == AUTONEG_DISABLE) { - reg |= GM_GPCR_AU_ALL_DIS; - - /* Is write/read necessary? Copied from sky2_mac_init */ - gma_write16(hw, port, GM_GP_CTRL, reg); - gma_read16(hw, port, GM_GP_CTRL); - - switch (sky2->speed) { - case SPEED_1000: - reg &= ~GM_GPCR_SPEED_100; - reg |= GM_GPCR_SPEED_1000; - break; - case SPEED_100: - reg &= ~GM_GPCR_SPEED_1000; - reg |= GM_GPCR_SPEED_100; - break; - case SPEED_10: - reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100); - break; - } - } else - reg &= ~GM_GPCR_AU_ALL_DIS; - - if (sky2->duplex == DUPLEX_FULL || sky2->autoneg == AUTONEG_ENABLE) - reg |= GM_GPCR_DUP_FULL; - /* enable Rx/Tx */ + reg = gma_read16(hw, port, GM_GP_CTRL); reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA; gma_write16(hw, port, GM_GP_CTRL, reg); - gma_read16(hw, port, GM_GP_CTRL); gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); @@ -1613,7 +1591,6 @@ static void sky2_link_down(struct sky2_port *sky2) reg = gma_read16(hw, port, GM_GP_CTRL); reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA); gma_write16(hw, port, GM_GP_CTRL, reg); - gma_read16(hw, port, GM_GP_CTRL); /* PCI post */ if (sky2->rx_pause && !sky2->tx_pause) { /* restore Asymmetric Pause bit */ @@ -1630,6 +1607,7 @@ static void sky2_link_down(struct sky2_port *sky2) if (netif_msg_link(sky2)) printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name); + sky2_phy_init(hw, port); } @@ -1670,8 +1648,11 @@ static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux) sky2->rx_pause = (aux & PHY_M_PS_RX_P_EN) != 0; sky2->tx_pause = (aux & PHY_M_PS_TX_P_EN) != 0; - if ((sky2->tx_pause || sky2->rx_pause) - && !(sky2->speed < SPEED_1000 && sky2->duplex == DUPLEX_HALF)) + if (sky2->duplex == DUPLEX_HALF && sky2->speed != SPEED_1000 + && hw->chip_id != CHIP_ID_YUKON_EC_U) + sky2->rx_pause = sky2->tx_pause = 0; + + if (sky2->rx_pause || sky2->tx_pause) sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); else sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); @@ -1697,7 +1678,7 @@ static void sky2_phy_intr(struct sky2_hw *hw, unsigned port) printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n", sky2->netdev->name, istatus, phystat); - if (istatus & PHY_M_IS_AN_COMPL) { + if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) { if (sky2_autoneg_done(sky2, phystat) == 0) sky2_link_up(sky2); goto out; @@ -1957,8 +1938,8 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do) dev = hw->dev[le->link]; sky2 = netdev_priv(dev); - length = le->length; - status = le->status; + length = le16_to_cpu(le->length); + status = le32_to_cpu(le->status); switch (le->opcode & ~HW_OWNER) { case OP_RXSTAT: @@ -2001,8 +1982,8 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do) #endif case OP_RXCHKS: skb = sky2->rx_ring[sky2->rx_next].skb; - skb->ip_summed = CHECKSUM_HW; - skb->csum = le16_to_cpu(status); + skb->ip_summed = CHECKSUM_COMPLETE; + skb->csum = status & 0xffff; break; case OP_TXINDEXLE: @@ -2304,7 +2285,7 @@ static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk) static int sky2_reset(struct sky2_hw *hw) { u16 status; - u8 t8, pmd_type; + u8 t8; int i; sky2_write8(hw, B0_CTST, CS_RST_CLR); @@ -2350,9 +2331,7 @@ static int sky2_reset(struct sky2_hw *hw) sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL); - pmd_type = sky2_read8(hw, B2_PMD_TYP); - hw->copper = !(pmd_type == 'L' || pmd_type == 'S'); - + hw->pmd_type = sky2_read8(hw, B2_PMD_TYP); hw->ports = 1; t8 = sky2_read8(hw, B2_Y2_HW_RES); if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) { @@ -2449,21 +2428,22 @@ static int sky2_reset(struct sky2_hw *hw) static u32 sky2_supported_modes(const struct sky2_hw *hw) { - u32 modes; - if (hw->copper) { - modes = SUPPORTED_10baseT_Half - | SUPPORTED_10baseT_Full - | SUPPORTED_100baseT_Half - | SUPPORTED_100baseT_Full - | SUPPORTED_Autoneg | SUPPORTED_TP; + if (sky2_is_copper(hw)) { + u32 modes = SUPPORTED_10baseT_Half + | SUPPORTED_10baseT_Full + | SUPPORTED_100baseT_Half + | SUPPORTED_100baseT_Full + | SUPPORTED_Autoneg | SUPPORTED_TP; if (hw->chip_id != CHIP_ID_YUKON_FE) modes |= SUPPORTED_1000baseT_Half - | SUPPORTED_1000baseT_Full; + | SUPPORTED_1000baseT_Full; + return modes; } else - modes = SUPPORTED_1000baseT_Full | SUPPORTED_FIBRE - | SUPPORTED_Autoneg; - return modes; + return SUPPORTED_1000baseT_Half + | SUPPORTED_1000baseT_Full + | SUPPORTED_Autoneg + | SUPPORTED_FIBRE; } static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) @@ -2474,7 +2454,7 @@ static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) ecmd->transceiver = XCVR_INTERNAL; ecmd->supported = sky2_supported_modes(hw); ecmd->phy_address = PHY_ADDR_MARV; - if (hw->copper) { + if (sky2_is_copper(hw)) { ecmd->supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half @@ -2483,12 +2463,14 @@ static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_TP; ecmd->port = PORT_TP; - } else + ecmd->speed = sky2->speed; + } else { + ecmd->speed = SPEED_1000; ecmd->port = PORT_FIBRE; + } ecmd->advertising = sky2->advertising; ecmd->autoneg = sky2->autoneg; - ecmd->speed = sky2->speed; ecmd->duplex = sky2->duplex; return 0; } @@ -2887,7 +2869,6 @@ static int sky2_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam *ecmd) { struct sky2_port *sky2 = netdev_priv(dev); - int err = 0; sky2->autoneg = ecmd->autoneg; sky2->tx_pause = ecmd->tx_pause != 0; @@ -2895,7 +2876,7 @@ static int sky2_set_pauseparam(struct net_device *dev, sky2_phy_reinit(sky2); - return err; + return 0; } static int sky2_get_coalesce(struct net_device *dev, @@ -3052,7 +3033,7 @@ static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs, regs->len - B3_RI_WTO_R1); } -static struct ethtool_ops sky2_ethtool_ops = { +static const struct ethtool_ops sky2_ethtool_ops = { .get_settings = sky2_get_settings, .set_settings = sky2_set_settings, .get_drvinfo = sky2_get_drvinfo, @@ -3305,12 +3286,13 @@ static int __devinit sky2_probe(struct pci_dev *pdev, hw->pm_cap = pm_cap; #ifdef __BIG_ENDIAN - /* byte swap descriptors in hardware */ + /* The sk98lin vendor driver uses hardware byte swapping but + * this driver uses software swapping. + */ { u32 reg; - reg = sky2_pci_read32(hw, PCI_DEV_REG2); - reg |= PCI_REV_DESC; + reg &= ~PCI_REV_DESC; sky2_pci_write32(hw, PCI_DEV_REG2, reg); } #endif