X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fnet%2Fskge.c;h=d7c98515fdfdd55d91cdd3fb54b1ca252ce2ec09;hb=502c7f1dd566e7ca8aabdb755182664c5fdaebf1;hp=290d6aa923832267bbee660c0d0b63d54afe94a0;hpb=7e676d9136d89d0cdf661de4b9a5f8955af94e03;p=linux-2.6 diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 290d6aa923..d7c98515fd 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c @@ -7,7 +7,7 @@ * of the original driver such as link fail-over and link management because * those should be done at higher levels. * - * Copyright (C) 2004, Stephen Hemminger + * Copyright (C) 2004, 2005 Stephen Hemminger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -42,18 +42,20 @@ #include "skge.h" #define DRV_NAME "skge" -#define DRV_VERSION "0.6" +#define DRV_VERSION "0.9" #define PFX DRV_NAME " " #define DEFAULT_TX_RING_SIZE 128 #define DEFAULT_RX_RING_SIZE 512 #define MAX_TX_RING_SIZE 1024 #define MAX_RX_RING_SIZE 4096 +#define RX_COPY_THRESHOLD 128 +#define RX_BUF_SIZE 1536 #define PHY_RETRIES 1000 #define ETH_JUMBO_MTU 9000 #define TX_WATCHDOG (5 * HZ) #define NAPI_WEIGHT 64 -#define BLINK_HZ (HZ/4) +#define BLINK_MS 250 MODULE_DESCRIPTION("SysKonnect Gigabit Ethernet driver"); MODULE_AUTHOR("Stephen Hemminger "); @@ -73,13 +75,12 @@ static const struct pci_device_id skge_id_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C940B) }, { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE) }, { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU) }, - { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */ { PCI_DEVICE(PCI_VENDOR_ID_DLINK, PCI_DEVICE_ID_DLINK_DGE510T), }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4320) }, { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x5005) }, /* Belkin */ { PCI_DEVICE(PCI_VENDOR_ID_CNET, PCI_DEVICE_ID_CNET_GIGACARD) }, - { PCI_DEVICE(PCI_VENDOR_ID_LINKSYS, PCI_DEVICE_ID_LINKSYS_EG1032) }, { PCI_DEVICE(PCI_VENDOR_ID_LINKSYS, PCI_DEVICE_ID_LINKSYS_EG1064) }, + { PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, 0x0015, }, { 0 } }; MODULE_DEVICE_TABLE(pci, skge_id_table); @@ -188,7 +189,7 @@ static u32 skge_supported_modes(const struct skge_hw *hw) { u32 supported; - if (iscopper(hw)) { + if (hw->copper) { supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half @@ -221,7 +222,7 @@ static int skge_get_settings(struct net_device *dev, ecmd->transceiver = XCVR_INTERNAL; ecmd->supported = skge_supported_modes(hw); - if (iscopper(hw)) { + if (hw->copper) { ecmd->port = PORT_TP; ecmd->phy_address = hw->phy_addr; } else @@ -247,7 +248,7 @@ static int skge_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) } else { u32 setting; - switch(ecmd->speed) { + switch (ecmd->speed) { case SPEED_1000: if (ecmd->duplex == DUPLEX_FULL) setting = SUPPORTED_1000baseT_Full; @@ -618,84 +619,98 @@ static int skge_set_coalesce(struct net_device *dev, return 0; } -static void skge_led_on(struct skge_hw *hw, int port) +enum led_mode { LED_MODE_OFF, LED_MODE_ON, LED_MODE_TST }; +static void skge_led(struct skge_port *skge, enum led_mode mode) { + struct skge_hw *hw = skge->hw; + int port = skge->port; + + spin_lock_bh(&hw->phy_lock); if (hw->chip_id == CHIP_ID_GENESIS) { - skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_ON); - skge_write8(hw, B0_LED, LED_STAT_ON); + switch (mode) { + case LED_MODE_OFF: + xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_OFF); + skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); + skge_write32(hw, SK_REG(port, RX_LED_VAL), 0); + skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_T_OFF); + break; - skge_write8(hw, SK_REG(port, RX_LED_TST), LED_T_ON); - skge_write32(hw, SK_REG(port, RX_LED_VAL), 100); - skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); + case LED_MODE_ON: + skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_ON); + skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_LINKSYNC_ON); - /* For Broadcom Phy only */ - xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_ON); - } else { - gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); - gm_phy_write(hw, port, PHY_MARV_LED_OVER, - PHY_M_LED_MO_DUP(MO_LED_ON) | - PHY_M_LED_MO_10(MO_LED_ON) | - PHY_M_LED_MO_100(MO_LED_ON) | - PHY_M_LED_MO_1000(MO_LED_ON) | - PHY_M_LED_MO_RX(MO_LED_ON)); - } -} + skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); + skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_START); -static void skge_led_off(struct skge_hw *hw, int port) -{ - if (hw->chip_id == CHIP_ID_GENESIS) { - skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); - skge_write8(hw, B0_LED, LED_STAT_OFF); + break; - skge_write32(hw, SK_REG(port, RX_LED_VAL), 0); - skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_T_OFF); + case LED_MODE_TST: + skge_write8(hw, SK_REG(port, RX_LED_TST), LED_T_ON); + skge_write32(hw, SK_REG(port, RX_LED_VAL), 100); + skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); - /* Broadcom only */ - xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_OFF); + xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_ON); + break; + } } else { - gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); - gm_phy_write(hw, port, PHY_MARV_LED_OVER, - PHY_M_LED_MO_DUP(MO_LED_OFF) | - PHY_M_LED_MO_10(MO_LED_OFF) | - PHY_M_LED_MO_100(MO_LED_OFF) | - PHY_M_LED_MO_1000(MO_LED_OFF) | - PHY_M_LED_MO_RX(MO_LED_OFF)); + switch (mode) { + case LED_MODE_OFF: + gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); + gm_phy_write(hw, port, PHY_MARV_LED_OVER, + PHY_M_LED_MO_DUP(MO_LED_OFF) | + PHY_M_LED_MO_10(MO_LED_OFF) | + PHY_M_LED_MO_100(MO_LED_OFF) | + PHY_M_LED_MO_1000(MO_LED_OFF) | + PHY_M_LED_MO_RX(MO_LED_OFF)); + break; + case LED_MODE_ON: + gm_phy_write(hw, port, PHY_MARV_LED_CTRL, + PHY_M_LED_PULS_DUR(PULS_170MS) | + PHY_M_LED_BLINK_RT(BLINK_84MS) | + PHY_M_LEDC_TX_CTRL | + PHY_M_LEDC_DP_CTRL); + + gm_phy_write(hw, port, PHY_MARV_LED_OVER, + PHY_M_LED_MO_RX(MO_LED_OFF) | + (skge->speed == SPEED_100 ? + PHY_M_LED_MO_100(MO_LED_ON) : 0)); + break; + case LED_MODE_TST: + gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); + gm_phy_write(hw, port, PHY_MARV_LED_OVER, + PHY_M_LED_MO_DUP(MO_LED_ON) | + PHY_M_LED_MO_10(MO_LED_ON) | + PHY_M_LED_MO_100(MO_LED_ON) | + PHY_M_LED_MO_1000(MO_LED_ON) | + PHY_M_LED_MO_RX(MO_LED_ON)); + } } -} - -static void skge_blink_timer(unsigned long data) -{ - struct skge_port *skge = (struct skge_port *) data; - struct skge_hw *hw = skge->hw; - unsigned long flags; - - spin_lock_irqsave(&hw->phy_lock, flags); - if (skge->blink_on) - skge_led_on(hw, skge->port); - else - skge_led_off(hw, skge->port); - spin_unlock_irqrestore(&hw->phy_lock, flags); - - skge->blink_on = !skge->blink_on; - mod_timer(&skge->led_blink, jiffies + BLINK_HZ); + spin_unlock_bh(&hw->phy_lock); } /* blink LED's for finding board */ static int skge_phys_id(struct net_device *dev, u32 data) { struct skge_port *skge = netdev_priv(dev); + unsigned long ms; + enum led_mode mode = LED_MODE_TST; if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ)) - data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ); + ms = jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT / HZ) * 1000; + else + ms = data * 1000; - /* start blinking */ - skge->blink_on = 1; - mod_timer(&skge->led_blink, jiffies+1); + while (ms > 0) { + skge_led(skge, mode); + mode ^= LED_MODE_TST; - msleep_interruptible(data * 1000); - del_timer_sync(&skge->led_blink); + if (msleep_interruptible(BLINK_MS)) + break; + ms -= BLINK_MS; + } - skge_led_off(skge->hw, skge->port); + /* back to regular LED state */ + skge_led(skge, netif_running(dev) ? LED_MODE_ON : LED_MODE_OFF); return 0; } @@ -746,6 +761,7 @@ static int skge_ring_alloc(struct skge_ring *ring, void *vaddr, u64 base) for (i = 0, e = ring->start, d = vaddr; i < ring->count; i++, e++, d++) { e->desc = d; + e->skb = NULL; if (i == ring->count - 1) { e->next = ring->start; d->next_offset = base; @@ -759,24 +775,23 @@ static int skge_ring_alloc(struct skge_ring *ring, void *vaddr, u64 base) return 0; } -/* Setup buffer for receiving */ -static inline int skge_rx_alloc(struct skge_port *skge, - struct skge_element *e) +static struct sk_buff *skge_rx_alloc(struct net_device *dev, unsigned int size) { - unsigned long bufsize = skge->netdev->mtu + ETH_HLEN; /* VLAN? */ - struct skge_rx_desc *rd = e->desc; - struct sk_buff *skb; - u64 map; + struct sk_buff *skb = dev_alloc_skb(size); - skb = dev_alloc_skb(bufsize + NET_IP_ALIGN); - if (unlikely(!skb)) { - printk(KERN_DEBUG PFX "%s: out of memory for receive\n", - skge->netdev->name); - return -ENOMEM; + if (likely(skb)) { + skb->dev = dev; + skb_reserve(skb, NET_IP_ALIGN); } + return skb; +} - skb->dev = skge->netdev; - skb_reserve(skb, NET_IP_ALIGN); +/* Allocate and setup a new buffer for receiving */ +static void skge_rx_setup(struct skge_port *skge, struct skge_element *e, + struct sk_buff *skb, unsigned int bufsize) +{ + struct skge_rx_desc *rd = e->desc; + u64 map; map = pci_map_single(skge->hw->pdev, skb->data, bufsize, PCI_DMA_FROMDEVICE); @@ -794,59 +809,76 @@ static inline int skge_rx_alloc(struct skge_port *skge, rd->control = BMU_OWN | BMU_STF | BMU_IRQ_EOF | BMU_TCP_CHECK | bufsize; pci_unmap_addr_set(e, mapaddr, map); pci_unmap_len_set(e, maplen, bufsize); - return 0; } -/* Free all unused buffers in receive ring, assumes receiver stopped */ +/* Resume receiving using existing skb, + * Note: DMA address is not changed by chip. + * MTU not changed while receiver active. + */ +static void skge_rx_reuse(struct skge_element *e, unsigned int size) +{ + struct skge_rx_desc *rd = e->desc; + + rd->csum2 = 0; + rd->csum2_start = ETH_HLEN; + + wmb(); + + rd->control = BMU_OWN | BMU_STF | BMU_IRQ_EOF | BMU_TCP_CHECK | size; +} + + +/* Free all buffers in receive ring, assumes receiver stopped */ static void skge_rx_clean(struct skge_port *skge) { struct skge_hw *hw = skge->hw; struct skge_ring *ring = &skge->rx_ring; struct skge_element *e; - for (e = ring->to_clean; e != ring->to_use; e = e->next) { + e = ring->start; + do { struct skge_rx_desc *rd = e->desc; rd->control = 0; - - pci_unmap_single(hw->pdev, - pci_unmap_addr(e, mapaddr), - pci_unmap_len(e, maplen), - PCI_DMA_FROMDEVICE); - dev_kfree_skb(e->skb); - e->skb = NULL; - } - ring->to_clean = e; + if (e->skb) { + pci_unmap_single(hw->pdev, + pci_unmap_addr(e, mapaddr), + pci_unmap_len(e, maplen), + PCI_DMA_FROMDEVICE); + dev_kfree_skb(e->skb); + e->skb = NULL; + } + } while ((e = e->next) != ring->start); } + /* Allocate buffers for receive ring - * For receive: to_use is refill location - * to_clean is next received frame. - * - * if (to_use == to_clean) - * then ring all frames in ring need buffers - * if (to_use->next == to_clean) - * then ring all frames in ring have buffers + * For receive: to_clean is next received frame. */ static int skge_rx_fill(struct skge_port *skge) { struct skge_ring *ring = &skge->rx_ring; struct skge_element *e; - int ret = 0; + unsigned int bufsize = skge->rx_buf_size; - for (e = ring->to_use; e->next != ring->to_clean; e = e->next) { - if (skge_rx_alloc(skge, e)) { - ret = 1; - break; - } + e = ring->start; + do { + struct sk_buff *skb = skge_rx_alloc(skge->netdev, bufsize); - } - ring->to_use = e; + if (!skb) + return -ENOMEM; + + skge_rx_setup(skge, e, skb, bufsize); + } while ( (e = e->next) != ring->start); - return ret; + ring->to_clean = ring->start; + return 0; } static void skge_link_up(struct skge_port *skge) { + skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), + LED_BLK_OFF|LED_SYNC_OFF|LED_ON); + netif_carrier_on(skge->netdev); if (skge->tx_avail > MAX_SKB_FRAGS + 1) netif_wake_queue(skge->netdev); @@ -865,6 +897,7 @@ static void skge_link_up(struct skge_port *skge) static void skge_link_down(struct skge_port *skge) { + skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF); netif_carrier_off(skge->netdev); netif_stop_queue(skge->netdev); @@ -1012,7 +1045,7 @@ static void bcom_check_link(struct skge_hw *hw, int port) } /* Check Duplex mismatch */ - switch(aux & PHY_B_AS_AN_RES_MSK) { + switch (aux & PHY_B_AS_AN_RES_MSK) { case PHY_B_RES_1000FD: skge->duplex = DUPLEX_FULL; break; @@ -1083,7 +1116,7 @@ static void bcom_phy_init(struct skge_port *skge, int jumbo) r |= XM_MMU_NO_PRE; xm_write16(hw, port, XM_MMU_CMD,r); - switch(id1) { + switch (id1) { case PHY_BCOM_ID1_C0: /* * Workaround BCOM Errata for the C0 type. @@ -1178,13 +1211,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port) xm_write16(hw, port, XM_STAT_CMD, XM_SC_CLR_RXC | XM_SC_CLR_TXC); - /* initialize Rx, Tx and Link LED */ - skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_ON); - skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_LINKSYNC_ON); - - skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); - skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_START); - /* Unreset the XMAC. */ skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); @@ -1193,7 +1219,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port) * namely for the 1000baseTX cards that use the XMAC's * GMII mode. */ - spin_lock_bh(&hw->phy_lock); /* Take external Phy out of reset */ r = skge_read32(hw, B2_GP_IO); if (port == 0) @@ -1203,7 +1228,6 @@ static void genesis_mac_init(struct skge_hw *hw, int port) skge_write32(hw, B2_GP_IO, r); skge_read32(hw, B2_GP_IO); - spin_unlock_bh(&hw->phy_lock); /* Enable GMII interfac */ xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD); @@ -1553,7 +1577,6 @@ static void yukon_init(struct skge_hw *hw, int port) { struct skge_port *skge = netdev_priv(hw->dev[port]); u16 ctrl, ct1000, adv; - u16 ledctrl, ledover; pr_debug("yukon_init\n"); if (skge->autoneg == AUTONEG_ENABLE) { @@ -1580,7 +1603,7 @@ static void yukon_init(struct skge_hw *hw, int port) adv = PHY_AN_CSMA; if (skge->autoneg == AUTONEG_ENABLE) { - if (iscopper(hw)) { + if (hw->copper) { if (skge->advertising & ADVERTISED_1000baseT_Full) ct1000 |= PHY_M_1000C_AFD; if (skge->advertising & ADVERTISED_1000baseT_Half) @@ -1625,32 +1648,11 @@ static void yukon_init(struct skge_hw *hw, int port) gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); - /* Setup Phy LED's */ - ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS); - ledover = 0; - - ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL; - - /* turn off the Rx LED (LED_RX) */ - ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); - - /* disable blink mode (LED_DUPLEX) on collisions */ - ctrl |= PHY_M_LEDC_DP_CTRL; - gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); - - if (skge->autoneg == AUTONEG_DISABLE || skge->speed == SPEED_100) { - /* turn on 100 Mbps LED (LED_LINK100) */ - ledover |= PHY_M_LED_MO_100(MO_LED_ON); - } - - if (ledover) - gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); - /* Enable phy interrupt on autonegotiation complete (or link up) */ if (skge->autoneg == AUTONEG_ENABLE) - gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); + gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_MSK); else - gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); + gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK); } static void yukon_reset(struct skge_hw *hw, int port) @@ -1675,7 +1677,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port) /* WA code for COMA mode -- set PHY reset */ if (hw->chip_id == CHIP_ID_YUKON_LITE && - hw->chip_rev == CHIP_REV_YU_LITE_A3) + hw->chip_rev >= CHIP_REV_YU_LITE_A3) skge_write32(hw, B2_GP_IO, (skge_read32(hw, B2_GP_IO) | GP_DIR_9 | GP_IO_9)); @@ -1685,7 +1687,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port) /* WA code for COMA mode -- clear PHY reset */ if (hw->chip_id == CHIP_ID_YUKON_LITE && - hw->chip_rev == CHIP_REV_YU_LITE_A3) + hw->chip_rev >= CHIP_REV_YU_LITE_A3) skge_write32(hw, B2_GP_IO, (skge_read32(hw, B2_GP_IO) | GP_DIR_9) & ~GP_IO_9); @@ -1693,7 +1695,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port) /* Set hardware config mode */ reg = GPC_INT_POL_HI | GPC_DIS_FC | GPC_DIS_SLEEP | GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE; - reg |= iscopper(hw) ? GPC_HWCFG_GMII_COP : GPC_HWCFG_GMII_FIB; + reg |= hw->copper ? GPC_HWCFG_GMII_COP : GPC_HWCFG_GMII_FIB; /* Clear GMC reset */ skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET); @@ -1729,9 +1731,7 @@ static void yukon_mac_init(struct skge_hw *hw, int port) gma_write16(hw, port, GM_GP_CTRL, reg); skge_read16(hw, GMAC_IRQ_SRC); - spin_lock_bh(&hw->phy_lock); yukon_init(hw, port); - spin_unlock_bh(&hw->phy_lock); /* MIB clear */ reg = gma_read16(hw, port, GM_PHY_ADDR); @@ -1780,11 +1780,16 @@ static void yukon_mac_init(struct skge_hw *hw, int port) skge_write16(hw, SK_REG(port, RX_GMF_FL_MSK), RX_FF_FL_DEF_MSK); reg = GMF_OPER_ON | GMF_RX_F_FL_ON; if (hw->chip_id == CHIP_ID_YUKON_LITE && - hw->chip_rev == CHIP_REV_YU_LITE_A3) + hw->chip_rev >= CHIP_REV_YU_LITE_A3) reg &= ~GMF_RX_F_FL_ON; skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); skge_write16(hw, SK_REG(port, RX_GMF_CTRL_T), reg); - skge_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF); + /* + * because Pause Packet Truncation in GMAC is not working + * we have to increase the Flush Threshold to 64 bytes + * in order to flush pause packets in Rx FIFO on Yukon-1 + */ + skge_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF+1); /* Configure Tx MAC FIFO */ skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); @@ -1797,19 +1802,19 @@ static void yukon_stop(struct skge_port *skge) int port = skge->port; if (hw->chip_id == CHIP_ID_YUKON_LITE && - hw->chip_rev == CHIP_REV_YU_LITE_A3) { + hw->chip_rev >= CHIP_REV_YU_LITE_A3) { skge_write32(hw, B2_GP_IO, skge_read32(hw, B2_GP_IO) | GP_DIR_9 | GP_IO_9); } gma_write16(hw, port, GM_GP_CTRL, gma_read16(hw, port, GM_GP_CTRL) - & ~(GM_GPCR_RX_ENA|GM_GPCR_RX_ENA)); + & ~(GM_GPCR_TX_ENA|GM_GPCR_RX_ENA)); gma_read16(hw, port, GM_GP_CTRL); /* set GPHY Control reset */ - gma_write32(hw, port, GPHY_CTRL, GPC_RST_SET); - gma_write32(hw, port, GMAC_CTRL, GMC_RST_SET); + skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); + skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); } static void yukon_get_stats(struct skge_port *skge, u64 *data) @@ -1840,11 +1845,12 @@ static void yukon_mac_intr(struct skge_hw *hw, int port) if (status & GM_IS_RX_FF_OR) { ++skge->net_stats.rx_fifo_errors; - gma_write8(hw, port, RX_GMF_CTRL_T, GMF_CLI_RX_FO); + skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO); } + if (status & GM_IS_TX_FF_UR) { ++skge->net_stats.tx_fifo_errors; - gma_write8(hw, port, TX_GMF_CTRL_T, GMF_CLI_TX_FU); + skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU); } } @@ -1880,7 +1886,7 @@ static void yukon_link_up(struct skge_port *skge) reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA; gma_write16(hw, port, GM_GP_CTRL, reg); - gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); + gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_DEF_MSK); skge_link_up(skge); } @@ -1888,12 +1894,14 @@ static void yukon_link_down(struct skge_port *skge) { struct skge_hw *hw = skge->hw; int port = skge->port; + u16 ctrl; pr_debug("yukon_link_down\n"); gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); - gm_phy_write(hw, port, GM_GP_CTRL, - gm_phy_read(hw, port, GM_GP_CTRL) - & ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA)); + + ctrl = gma_read16(hw, port, GM_GP_CTRL); + ctrl &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA); + gma_write16(hw, port, GM_GP_CTRL, ctrl); if (skge->flow_control == FLOW_MODE_REM_SEND) { /* restore Asymmetric Pause bit */ @@ -2048,6 +2056,12 @@ static int skge_up(struct net_device *dev) if (netif_msg_ifup(skge)) printk(KERN_INFO PFX "%s: enabling interface\n", dev->name); + if (dev->mtu > RX_BUF_SIZE) + skge->rx_buf_size = dev->mtu + ETH_HLEN + NET_IP_ALIGN; + else + skge->rx_buf_size = RX_BUF_SIZE; + + rx_size = skge->rx_ring.count * sizeof(struct skge_rx_desc); tx_size = skge->tx_ring.count * sizeof(struct skge_tx_desc); skge->mem_size = tx_size + rx_size; @@ -2060,7 +2074,8 @@ static int skge_up(struct net_device *dev) if ((err = skge_ring_alloc(&skge->rx_ring, skge->mem, skge->dma))) goto free_pci_mem; - if (skge_rx_fill(skge)) + err = skge_rx_fill(skge); + if (err) goto free_rx_ring; if ((err = skge_ring_alloc(&skge->tx_ring, skge->mem + rx_size, @@ -2074,10 +2089,12 @@ static int skge_up(struct net_device *dev) skge_write32(hw, B0_IMSK, hw->intr_mask); /* Initialze MAC */ + spin_lock_bh(&hw->phy_lock); if (hw->chip_id == CHIP_ID_GENESIS) genesis_mac_init(hw, port); else yukon_mac_init(hw, port); + spin_unlock_bh(&hw->phy_lock); /* Configure RAMbuffers */ chunk = hw->ram_size / ((hw->ports + 1)*2); @@ -2093,6 +2110,7 @@ static int skge_up(struct net_device *dev) /* Start receiver BMU */ wmb(); skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); + skge_led(skge, LED_MODE_ON); pr_debug("skge_up completed\n"); return 0; @@ -2117,8 +2135,6 @@ static int skge_down(struct net_device *dev) netif_stop_queue(dev); - del_timer_sync(&skge->led_blink); - /* Stop transmitter */ skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), @@ -2152,15 +2168,12 @@ static int skge_down(struct net_device *dev) if (hw->chip_id == CHIP_ID_GENESIS) { skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_RST_SET); skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_RST_SET); - skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_STOP); - skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_STOP); } else { skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); } - /* turn off led's */ - skge_write16(hw, B0_LED, LED_STAT_OFF); + skge_led(skge, LED_MODE_OFF); skge_tx_clean(skge); skge_rx_clean(skge); @@ -2284,6 +2297,7 @@ static int skge_xmit_frame(struct sk_buff *skb, struct net_device *dev) static inline void skge_tx_free(struct skge_hw *hw, struct skge_element *e) { + /* This ring element can be skb or fragment */ if (e->skb) { pci_unmap_single(hw->pdev, pci_unmap_addr(e, mapaddr), @@ -2328,16 +2342,17 @@ static void skge_tx_timeout(struct net_device *dev) static int skge_change_mtu(struct net_device *dev, int new_mtu) { int err = 0; + int running = netif_running(dev); if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) return -EINVAL; - dev->mtu = new_mtu; - if (netif_running(dev)) { + if (running) skge_down(dev); + dev->mtu = new_mtu; + if (running) skge_up(dev); - } return err; } @@ -2436,28 +2451,76 @@ static void skge_rx_error(struct skge_port *skge, int slot, printk(KERN_DEBUG PFX "%s: rx err, slot %d control 0x%x status 0x%x\n", skge->netdev->name, slot, control, status); - if ((control & (BMU_EOF|BMU_STF)) != (BMU_STF|BMU_EOF) - || (control & BMU_BBC) > skge->netdev->mtu + VLAN_ETH_HLEN) + if ((control & (BMU_EOF|BMU_STF)) != (BMU_STF|BMU_EOF)) skge->net_stats.rx_length_errors++; - else { - if (skge->hw->chip_id == CHIP_ID_GENESIS) { - if (status & (XMR_FS_RUNT|XMR_FS_LNG_ERR)) - skge->net_stats.rx_length_errors++; - if (status & XMR_FS_FRA_ERR) - skge->net_stats.rx_frame_errors++; - if (status & XMR_FS_FCS_ERR) - skge->net_stats.rx_crc_errors++; - } else { - if (status & (GMR_FS_LONG_ERR|GMR_FS_UN_SIZE)) - skge->net_stats.rx_length_errors++; - if (status & GMR_FS_FRAGMENT) - skge->net_stats.rx_frame_errors++; - if (status & GMR_FS_CRC_ERR) - skge->net_stats.rx_crc_errors++; + else if (skge->hw->chip_id == CHIP_ID_GENESIS) { + if (status & (XMR_FS_RUNT|XMR_FS_LNG_ERR)) + skge->net_stats.rx_length_errors++; + if (status & XMR_FS_FRA_ERR) + skge->net_stats.rx_frame_errors++; + if (status & XMR_FS_FCS_ERR) + skge->net_stats.rx_crc_errors++; + } else { + if (status & (GMR_FS_LONG_ERR|GMR_FS_UN_SIZE)) + skge->net_stats.rx_length_errors++; + if (status & GMR_FS_FRAGMENT) + skge->net_stats.rx_frame_errors++; + if (status & GMR_FS_CRC_ERR) + skge->net_stats.rx_crc_errors++; + } +} + +/* Get receive buffer from descriptor. + * Handles copy of small buffers and reallocation failures + */ +static inline struct sk_buff *skge_rx_get(struct skge_port *skge, + struct skge_element *e, + unsigned int len) +{ + struct sk_buff *nskb, *skb; + + if (len < RX_COPY_THRESHOLD) { + nskb = skge_rx_alloc(skge->netdev, len + NET_IP_ALIGN); + if (unlikely(!nskb)) + return NULL; + + pci_dma_sync_single_for_cpu(skge->hw->pdev, + pci_unmap_addr(e, mapaddr), + len, PCI_DMA_FROMDEVICE); + memcpy(nskb->data, e->skb->data, len); + pci_dma_sync_single_for_device(skge->hw->pdev, + pci_unmap_addr(e, mapaddr), + len, PCI_DMA_FROMDEVICE); + + if (skge->rx_csum) { + struct skge_rx_desc *rd = e->desc; + nskb->csum = le16_to_cpu(rd->csum2); + nskb->ip_summed = CHECKSUM_HW; } + skge_rx_reuse(e, skge->rx_buf_size); + return nskb; + } else { + nskb = skge_rx_alloc(skge->netdev, skge->rx_buf_size); + if (unlikely(!nskb)) + return NULL; + + pci_unmap_single(skge->hw->pdev, + pci_unmap_addr(e, mapaddr), + pci_unmap_len(e, maplen), + PCI_DMA_FROMDEVICE); + skb = e->skb; + if (skge->rx_csum) { + struct skge_rx_desc *rd = e->desc; + skb->csum = le16_to_cpu(rd->csum2); + skb->ip_summed = CHECKSUM_HW; + } + + skge_rx_setup(skge, e, nskb, skge->rx_buf_size); + return skb; } } + static int skge_poll(struct net_device *dev, int *budget) { struct skge_port *skge = netdev_priv(dev); @@ -2466,14 +2529,12 @@ static int skge_poll(struct net_device *dev, int *budget) struct skge_element *e; unsigned int to_do = min(dev->quota, *budget); unsigned int work_done = 0; - int done; pr_debug("skge_poll\n"); - for (e = ring->to_clean; e != ring->to_use && work_done < to_do; - e = e->next) { + for (e = ring->to_clean; work_done < to_do; e = e->next) { struct skge_rx_desc *rd = e->desc; - struct sk_buff *skb = e->skb; + struct sk_buff *skb; u32 control, len, status; rmb(); @@ -2482,19 +2543,12 @@ static int skge_poll(struct net_device *dev, int *budget) break; len = control & BMU_BBC; - e->skb = NULL; - - pci_unmap_single(hw->pdev, - pci_unmap_addr(e, mapaddr), - pci_unmap_len(e, maplen), - PCI_DMA_FROMDEVICE); - status = rd->status; - if ((control & (BMU_EOF|BMU_STF)) != (BMU_STF|BMU_EOF) - || len > dev->mtu + VLAN_ETH_HLEN - || bad_phy_status(hw, status)) { + + if (unlikely((control & (BMU_EOF|BMU_STF)) != (BMU_STF|BMU_EOF) + || bad_phy_status(hw, status))) { skge_rx_error(skge, e - ring->start, control, status); - dev_kfree_skb(skb); + skge_rx_reuse(e, skge->rx_buf_size); continue; } @@ -2502,42 +2556,37 @@ static int skge_poll(struct net_device *dev, int *budget) printk(KERN_DEBUG PFX "%s: rx slot %td status 0x%x len %d\n", dev->name, e - ring->start, rd->status, len); - skb_put(skb, len); - skb->protocol = eth_type_trans(skb, dev); + skb = skge_rx_get(skge, e, len); + if (likely(skb)) { + skb_put(skb, len); + skb->protocol = eth_type_trans(skb, dev); - if (skge->rx_csum) { - skb->csum = le16_to_cpu(rd->csum2); - skb->ip_summed = CHECKSUM_HW; - } - - dev->last_rx = jiffies; - netif_receive_skb(skb); + dev->last_rx = jiffies; + netif_receive_skb(skb); - ++work_done; + ++work_done; + } else + skge_rx_reuse(e, skge->rx_buf_size); } ring->to_clean = e; - *budget -= work_done; - dev->quota -= work_done; - done = work_done < to_do; - - if (skge_rx_fill(skge)) - done = 0; - /* restart receiver */ wmb(); skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_START | CSR_IRQ_CL_F); - if (done) { - local_irq_disable(); - __netif_rx_complete(dev); - hw->intr_mask |= portirqmask[skge->port]; - skge_write32(hw, B0_IMSK, hw->intr_mask); - local_irq_enable(); - } + *budget -= work_done; + dev->quota -= work_done; - return !done; + if (work_done >= to_do) + return 1; /* not done */ + + local_irq_disable(); + __netif_rx_complete(dev); + hw->intr_mask |= portirqmask[skge->port]; + skge_write32(hw, B0_IMSK, hw->intr_mask); + local_irq_enable(); + return 0; } static inline void skge_tx_intr(struct net_device *dev) @@ -2574,11 +2623,17 @@ static inline void skge_tx_intr(struct net_device *dev) spin_unlock(&skge->tx_lock); } +/* Parity errors seem to happen when Genesis is connected to a switch + * with no other ports present. Heartbeat error?? + */ static void skge_mac_parity(struct skge_hw *hw, int port) { - printk(KERN_ERR PFX "%s: mac data parity error\n", - hw->dev[port] ? hw->dev[port]->name - : (port == 0 ? "(port A)": "(port B")); + struct net_device *dev = hw->dev[port]; + + if (dev) { + struct skge_port *skge = netdev_priv(dev); + ++skge->net_stats.tx_heartbeat_errors; + } if (hw->chip_id == CHIP_ID_GENESIS) skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), @@ -2624,18 +2679,6 @@ static void skge_error_irq(struct skge_hw *hw) /* Timestamp (unused) overflow */ if (hwstatus & IS_IRQ_TIST_OV) skge_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); - - if (hwstatus & IS_IRQ_SENSOR) { - /* no sensors on 32-bit Yukon */ - if (!(skge_read16(hw, B0_CTST) & CS_BUS_SLOT_SZ)) { - printk(KERN_ERR PFX "ignoring bogus sensor interrups\n"); - skge_write32(hw, B0_HWE_IMSK, - IS_ERR_MSK & ~IS_IRQ_SENSOR); - } else - printk(KERN_WARNING PFX "sensor interrupt\n"); - } - - } if (hwstatus & IS_RAM_RD_PAR) { @@ -2666,9 +2709,10 @@ static void skge_error_irq(struct skge_hw *hw) skge_pci_clear(hw); + /* if error still set then just ignore it */ hwstatus = skge_read32(hw, B0_HWE_ISRC); if (hwstatus & IS_IRQ_STAT) { - printk(KERN_WARNING PFX "IRQ status %x: still set ignoring hardware errors\n", + pr_debug("IRQ status %x: still set ignoring hardware errors\n", hwstatus); hw->intr_mask &= ~IS_HW_ERR; } @@ -2731,6 +2775,24 @@ static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs) if (status & IS_XA2_F) skge_tx_intr(hw->dev[1]); + if (status & IS_PA_TO_RX1) { + struct skge_port *skge = netdev_priv(hw->dev[0]); + ++skge->net_stats.rx_over_errors; + skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX1); + } + + if (status & IS_PA_TO_RX2) { + struct skge_port *skge = netdev_priv(hw->dev[1]); + ++skge->net_stats.rx_over_errors; + skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX2); + } + + if (status & IS_PA_TO_TX1) + skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX1); + + if (status & IS_PA_TO_TX2) + skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX2); + if (status & IS_MAC1) skge_mac_intr(hw, 0); @@ -2812,7 +2874,7 @@ static const char *skge_board_name(const struct skge_hw *hw) static int skge_reset(struct skge_hw *hw) { u16 ctst; - u8 t8, mac_cfg; + u8 t8, mac_cfg, pmd_type, phy_type; int i; ctst = skge_read16(hw, B0_CTST); @@ -2831,18 +2893,19 @@ static int skge_reset(struct skge_hw *hw) ctst & (CS_CLK_RUN_HOT|CS_CLK_RUN_RST|CS_CLK_RUN_ENA)); hw->chip_id = skge_read8(hw, B2_CHIP_ID); - hw->phy_type = skge_read8(hw, B2_E_1) & 0xf; - hw->pmd_type = skge_read8(hw, B2_PMD_TYP); + phy_type = skge_read8(hw, B2_E_1) & 0xf; + pmd_type = skge_read8(hw, B2_PMD_TYP); + hw->copper = (pmd_type == 'T' || pmd_type == '1'); switch (hw->chip_id) { case CHIP_ID_GENESIS: - switch (hw->phy_type) { + switch (phy_type) { case SK_PHY_BCOM: hw->phy_addr = PHY_ADDR_BCOM; break; default: printk(KERN_ERR PFX "%s: unsupported phy type 0x%x\n", - pci_name(hw->pdev), hw->phy_type); + pci_name(hw->pdev), phy_type); return -EOPNOTSUPP; } break; @@ -2850,13 +2913,10 @@ static int skge_reset(struct skge_hw *hw) case CHIP_ID_YUKON: case CHIP_ID_YUKON_LITE: case CHIP_ID_YUKON_LP: - if (hw->phy_type < SK_PHY_MARV_COPPER && hw->pmd_type != 'S') - hw->phy_type = SK_PHY_MARV_COPPER; + if (phy_type < SK_PHY_MARV_COPPER && pmd_type != 'S') + hw->copper = 1; hw->phy_addr = PHY_ADDR_MARV; - if (!iscopper(hw)) - hw->phy_type = SK_PHY_MARV_FIBER; - break; default: @@ -2884,12 +2944,20 @@ static int skge_reset(struct skge_hw *hw) else hw->ram_size = t8 * 4096; + hw->intr_mask = IS_HW_ERR | IS_EXT_REG; if (hw->chip_id == CHIP_ID_GENESIS) genesis_init(hw); else { /* switch power to VCC (WA for VAUX problem) */ skge_write8(hw, B0_POWER_CTRL, PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON); + /* avoid boards with stuck Hardware error bits */ + if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) && + (skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) { + printk(KERN_WARNING PFX "stuck hardware sensor bit\n"); + hw->intr_mask &= ~IS_HW_ERR; + } + for (i = 0; i < hw->ports; i++) { skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); @@ -2930,7 +2998,6 @@ static int skge_reset(struct skge_hw *hw) skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100)); skge_write32(hw, B2_IRQM_CTRL, TIM_START); - hw->intr_mask = IS_HW_ERR | IS_EXT_REG; skge_write32(hw, B0_IMSK, hw->intr_mask); if (hw->chip_id != CHIP_ID_GENESIS) @@ -3006,10 +3073,6 @@ static struct net_device *skge_devinit(struct skge_hw *hw, int port, spin_lock_init(&skge->tx_lock); - init_timer(&skge->led_blink); - skge->led_blink.function = skge_blink_timer; - skge->led_blink.data = (unsigned long) skge; - if (hw->chip_id != CHIP_ID_GENESIS) { dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; skge->rx_csum = 1; @@ -3182,7 +3245,7 @@ static void __devexit skge_remove(struct pci_dev *pdev) } #ifdef CONFIG_PM -static int skge_suspend(struct pci_dev *pdev, u32 state) +static int skge_suspend(struct pci_dev *pdev, pm_message_t state) { struct skge_hw *hw = pci_get_drvdata(pdev); int i, wol = 0; @@ -3202,7 +3265,7 @@ static int skge_suspend(struct pci_dev *pdev, u32 state) } pci_save_state(pdev); - pci_enable_wake(pdev, state, wol); + pci_enable_wake(pdev, pci_choose_state(pdev, state), wol); pci_disable_device(pdev); pci_set_power_state(pdev, pci_choose_state(pdev, state));