X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=drivers%2Fide%2Fpci%2Fslc90e66.c;h=2fc2f2cf22063b4d5ae220d8b2a1ea5cb7e1d99f;hb=87d8b61356108835f5e91c0fb32b830ec585978c;hp=4f22dffdf8ef634c674c1c857bbed2459f86a965;hpb=fe2520094d88018423dfc42b3cd0015f74e8adea;p=linux-2.6 diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c index 4f22dffdf8..2fc2f2cf22 100644 --- a/drivers/ide/pci/slc90e66.c +++ b/drivers/ide/pci/slc90e66.c @@ -1,6 +1,4 @@ /* - * linux/drivers/ide/pci/slc90e66.c Version 0.18 Aug 9, 2007 - * * Copyright (C) 2000-2002 Andre Hedrick * Copyright (C) 2006-2007 MontaVista Software, Inc. * @@ -12,35 +10,33 @@ #include #include #include -#include #include #include #include -#include #include -#include +static DEFINE_SPINLOCK(slc90e66_lock); static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) { ide_hwif_t *hwif = HWIF(drive); - struct pci_dev *dev = hwif->pci_dev; + struct pci_dev *dev = to_pci_dev(hwif->dev); int is_slave = drive->dn & 1; int master_port = hwif->channel ? 0x42 : 0x40; int slave_port = 0x44; unsigned long flags; u16 master_data; u8 slave_data; - int control = 0; + int control = 0; /* ISP RTC */ - static const u8 timings[][2]= { + static const u8 timings[][2] = { { 0, 0 }, { 0, 0 }, { 1, 0 }, { 2, 1 }, { 2, 3 }, }; - spin_lock_irqsave(&ide_lock, flags); + spin_lock_irqsave(&slc90e66_lock, flags); pci_read_config_word(dev, master_port, &master_data); if (pio > 1) @@ -71,13 +67,13 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) pci_write_config_word(dev, master_port, master_data); if (is_slave) pci_write_config_byte(dev, slave_port, slave_data); - spin_unlock_irqrestore(&ide_lock, flags); + spin_unlock_irqrestore(&slc90e66_lock, flags); } static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) { ide_hwif_t *hwif = HWIF(drive); - struct pci_dev *dev = hwif->pci_dev; + struct pci_dev *dev = to_pci_dev(hwif->dev); u8 maslave = hwif->channel ? 0x42 : 0x40; int sitre = 0, a_speed = 7 << (drive->dn * 4); int u_speed = 0, u_flag = 1 << drive->dn; @@ -89,19 +85,9 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) pci_read_config_word(dev, 0x48, ®48); pci_read_config_word(dev, 0x4a, ®4a); - switch(speed) { - case XFER_UDMA_4: u_speed = 4 << (drive->dn * 4); break; - case XFER_UDMA_3: u_speed = 3 << (drive->dn * 4); break; - case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break; - case XFER_UDMA_1: u_speed = 1 << (drive->dn * 4); break; - case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break; - case XFER_MW_DMA_2: - case XFER_MW_DMA_1: - case XFER_SW_DMA_2: break; - default: return; - } - if (speed >= XFER_UDMA_0) { + u_speed = (speed - XFER_UDMA_0) << (drive->dn * 4); + if (!(reg48 & u_flag)) pci_write_config_word(dev, 0x48, reg48|u_flag); /* FIXME: (reg4a & a_speed) ? */ @@ -128,29 +114,28 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) } } -static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif) +static u8 __devinit slc90e66_cable_detect(ide_hwif_t *hwif) { - u8 reg47 = 0; - u8 mask = hwif->channel ? 0x01 : 0x02; /* bit0:Primary */ + struct pci_dev *dev = to_pci_dev(hwif->dev); + u8 reg47 = 0, mask = hwif->channel ? 0x01 : 0x02; - hwif->set_pio_mode = &slc90e66_set_pio_mode; - hwif->set_dma_mode = &slc90e66_set_dma_mode; + pci_read_config_byte(dev, 0x47, ®47); - pci_read_config_byte(hwif->pci_dev, 0x47, ®47); - - if (hwif->dma_base == 0) - return; - - if (hwif->cbl != ATA_CBL_PATA40_SHORT) - /* bit[0(1)]: 0:80, 1:40 */ - hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; + /* bit[0(1)]: 0:80, 1:40 */ + return (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; } -static ide_pci_device_t slc90e66_chipset __devinitdata = { +static const struct ide_port_ops slc90e66_port_ops = { + .set_pio_mode = slc90e66_set_pio_mode, + .set_dma_mode = slc90e66_set_dma_mode, + .cable_detect = slc90e66_cable_detect, +}; + +static const struct ide_port_info slc90e66_chipset __devinitdata = { .name = "SLC90E66", - .init_hwif = init_hwif_slc90e66, - .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, - .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, + .enablebits = { {0x41, 0x80, 0x80}, {0x43, 0x80, 0x80} }, + .port_ops = &slc90e66_port_ops, + .host_flags = IDE_HFLAG_LEGACY_IRQS, .pio_mask = ATA_PIO4, .swdma_mask = ATA_SWDMA2_ONLY, .mwdma_mask = ATA_MWDMA12_ONLY, @@ -159,7 +144,7 @@ static ide_pci_device_t slc90e66_chipset __devinitdata = { static int __devinit slc90e66_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - return ide_setup_pci_device(dev, &slc90e66_chipset); + return ide_pci_init_one(dev, &slc90e66_chipset, NULL); } static const struct pci_device_id slc90e66_pci_tbl[] = {