X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=arch%2Fmips%2Fdec%2Fecc-berr.c;h=6a17c9b508eaa06dea5f66791e06e9f6f3d8dfc5;hb=b2798bf0ec2cb5a17bfc1430c5ba6d971c436a03;hp=cc24c5ed0c05d2b90a87c1829ca8c384111d2ce1;hpb=4fd5f8267dd37aaebadfabe71d9c808821eea05a;p=linux-2.6 diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c index cc24c5ed0c..6a17c9b508 100644 --- a/arch/mips/dec/ecc-berr.c +++ b/arch/mips/dec/ecc-berr.c @@ -18,13 +18,14 @@ #include #include #include -#include #include #include #include #include +#include #include +#include #include #include @@ -200,8 +201,10 @@ int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup) return dec_ecc_be_backend(regs, is_fixup, 0); } -irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs) +irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id) { + struct pt_regs *regs = get_irq_regs(); + int action = dec_ecc_be_backend(regs, 0, 1); if (action == MIPS_BE_DISCARD) @@ -228,13 +231,10 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs) static inline void dec_kn02_be_init(void) { volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); - unsigned long flags; kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR); kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN); - spin_lock_irqsave(&kn02_lock, flags); - /* Preset write-only bits of the Control Register cache. */ cached_kn02_csr = *csr | KN02_CSR_LEDS; @@ -244,8 +244,6 @@ static inline void dec_kn02_be_init(void) cached_kn02_csr |= KN02_CSR_CORRECT; *csr = cached_kn02_csr; iob(); - - spin_unlock_irqrestore(&kn02_lock, flags); } static inline void dec_kn03_be_init(void) @@ -265,7 +263,7 @@ static inline void dec_kn03_be_init(void) */ *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) | KN03_MCR_CORRECT; - if (current_cpu_data.cputype == CPU_R4400SC) + if (current_cpu_type() == CPU_R4400SC) *mbcs |= KN4K_MB_CSR_EE; fast_iob(); }