X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=arch%2Fia64%2Fia32%2Fia32priv.h;h=c5c872b250da5e420a661fb25223115fe2c7b424;hb=8d0a6e4da5ecde2022025ee764e4f7e425a53770;hp=703a67c934f84c6619bfa7693c247eb9fca6e143;hpb=22a3e233ca08a2ddc949ba1ae8f6e16ec7ef1a13;p=linux-2.6 diff --git a/arch/ia64/ia32/ia32priv.h b/arch/ia64/ia32/ia32priv.h index 703a67c934..c5c872b250 100644 --- a/arch/ia64/ia32/ia32priv.h +++ b/arch/ia64/ia32/ia32priv.h @@ -25,8 +25,8 @@ * partially mapped pages provide precise accounting of which 4k sub pages * are mapped and which ones are not, thereby improving IA-32 compatibility. */ -struct partial_page { - struct partial_page *next; /* linked list, sorted by address */ +struct ia64_partial_page { + struct ia64_partial_page *next; /* linked list, sorted by address */ struct rb_node pp_rb; /* 64K is the largest "normal" page supported by ia64 ABI. So 4K*64 * should suffice.*/ @@ -34,17 +34,17 @@ struct partial_page { unsigned int base; }; -struct partial_page_list { - struct partial_page *pp_head; /* list head, points to the lowest +struct ia64_partial_page_list { + struct ia64_partial_page *pp_head; /* list head, points to the lowest * addressed partial page */ struct rb_root ppl_rb; - struct partial_page *pp_hint; /* pp_hint->next is the last + struct ia64_partial_page *pp_hint; /* pp_hint->next is the last * accessed partial page */ atomic_t pp_count; /* reference count */ }; #if PAGE_SHIFT > IA32_PAGE_SHIFT -struct partial_page_list* ia32_init_pp_list (void); +struct ia64_partial_page_list* ia32_init_pp_list (void); #else # define ia32_init_pp_list() 0 #endif @@ -290,7 +290,6 @@ struct old_linux32_dirent { #define _ASM_IA64_ELF_H /* Don't include elf.h */ #include -#include /* * This is used to ensure we don't load something for the wrong architecture. @@ -330,8 +329,6 @@ struct old_linux32_dirent { void ia64_elf32_init(struct pt_regs *regs); #define ELF_PLAT_INIT(_r, load_addr) ia64_elf32_init(_r) -#define elf_addr_t u32 - /* This macro yields a bitmask that programs can use to figure out what instruction set this CPU supports. */ #define ELF_HWCAP 0