X-Git-Url: https://err.no/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=arch%2Farm%2Fmach-ixp2000%2Fcore.c;h=81cdc826720663722f574605d58cc9b99833cbd5;hb=537388bb6563bfde7c0307b95ecc1f7a1ae39b02;hp=27b7480f4afe94cc873fb62e9547c67b8cf86caa;hpb=fb7665544dd60e016494cd5531f5b65ddae22ddc;p=linux-2.6 diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 27b7480f4a..81cdc82672 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -84,59 +84,59 @@ static struct map_desc ixp2000_io_desc[] __initdata = { .virtual = IXP2000_CAP_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), .length = IXP2000_CAP_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_INTCTL_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), .length = IXP2000_INTCTL_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_CREG_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), .length = IXP2000_PCI_CREG_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_CSR_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), .length = IXP2000_PCI_CSR_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_MSF_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), .length = IXP2000_MSF_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), .length = IXP2000_SCRATCH_RING_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_SRAM0_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), .length = IXP2000_SRAM0_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_IO_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), .length = IXP2000_PCI_IO_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_CFG0_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), .length = IXP2000_PCI_CFG0_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, }, { .virtual = IXP2000_PCI_CFG1_VIRT_BASE, .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), .length = IXP2000_PCI_CFG1_SIZE, - .type = MT_IXP2000_DEVICE, + .type = MT_DEVICE_IXP2000, } }; void __init ixp2000_map_io(void) { /* - * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE so that + * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that * XCB=101 (to avoid triggering erratum #66), and given that * this mode speeds up I/O accesses and we have write buffer * flushes in the right places anyway, it doesn't hurt to use @@ -206,8 +206,6 @@ unsigned long ixp2000_gettimeoffset (void) static int ixp2000_timer_interrupt(int irq, void *dev_id) { - write_seqlock(&xtime_lock); - /* clear timer 1 */ ixp2000_reg_wrb(IXP2000_T1_CLR, 1); @@ -217,14 +215,12 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id) next_jiffy_time -= ticks_per_jiffy; } - write_sequnlock(&xtime_lock); - return IRQ_HANDLED; } static struct irqaction ixp2000_timer_irq = { .name = "IXP2000 Timer Tick", - .flags = IRQF_DISABLED | IRQF_TIMER, + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, .handler = ixp2000_timer_interrupt, };