check_mute(chip, &mix->line_mute, 0, mix->auto_mute_notify,
chip->lineout_sw_ctl);
if (mix->anded_reset)
- big_mdelay(10);
+ msleep(10);
check_mute(chip, &mix->amp_mute, 1, mix->auto_mute_notify,
chip->speaker_sw_ctl);
mix->drc_enable = 0;
check_mute(chip, &mix->amp_mute, 0, mix->auto_mute_notify,
chip->speaker_sw_ctl);
if (mix->anded_reset)
- big_mdelay(10);
+ msleep(10);
check_mute(chip, &mix->hp_mute, 1, mix->auto_mute_notify,
chip->master_sw_ctl);
if (mix->line_mute.addr != 0)
DBG("(I) codec anded reset !\n");
write_audio_gpio(&mix->hp_mute, 0);
write_audio_gpio(&mix->amp_mute, 0);
- big_mdelay(200);
+ msleep(200);
write_audio_gpio(&mix->hp_mute, 1);
write_audio_gpio(&mix->amp_mute, 1);
- big_mdelay(100);
+ msleep(100);
write_audio_gpio(&mix->hp_mute, 0);
write_audio_gpio(&mix->amp_mute, 0);
- big_mdelay(100);
+ msleep(100);
} else {
DBG("(I) codec normal reset !\n");
write_audio_gpio(&mix->audio_reset, 0);
- big_mdelay(200);
+ msleep(200);
write_audio_gpio(&mix->audio_reset, 1);
- big_mdelay(100);
+ msleep(100);
write_audio_gpio(&mix->audio_reset, 0);
- big_mdelay(100);
+ msleep(100);
}
}