]> err.no Git - linux-2.6/blobdiff - sound/pci/hda/hda_intel.c
Merge branch 'linus' into cpus4096
[linux-2.6] / sound / pci / hda / hda_intel.c
index 9b2dc0669b94f4606b68a4e561ad889b40fa25b3..16715a68ba5e59c362b5ea3d3db252b4f022523d 100644 (file)
@@ -374,6 +374,7 @@ struct azx {
        unsigned int single_cmd :1;
        unsigned int polling_mode :1;
        unsigned int msi :1;
+       unsigned int irq_pending_warned :1;
 
        /* for debugging */
        unsigned int last_cmd;  /* last issued command (to sync) */
@@ -439,11 +440,6 @@ static char *driver_short_names[] __devinitdata = {
 /* for pcm support */
 #define get_azx_dev(substream) (substream->runtime->private_data)
 
-/* Get the upper 32bit of the given dma_addr_t
- * Compiler should optimize and eliminate the code if dma_addr_t is 32bit
- */
-#define upper_32bit(addr) (sizeof(addr) > 4 ? (u32)((addr) >> 32) : (u32)0)
-
 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
 
 /*
@@ -474,7 +470,7 @@ static void azx_init_cmd_io(struct azx *chip)
        chip->corb.addr = chip->rb.addr;
        chip->corb.buf = (u32 *)chip->rb.area;
        azx_writel(chip, CORBLBASE, (u32)chip->corb.addr);
-       azx_writel(chip, CORBUBASE, upper_32bit(chip->corb.addr));
+       azx_writel(chip, CORBUBASE, upper_32_bits(chip->corb.addr));
 
        /* set the corb size to 256 entries (ULI requires explicitly) */
        azx_writeb(chip, CORBSIZE, 0x02);
@@ -489,7 +485,7 @@ static void azx_init_cmd_io(struct azx *chip)
        chip->rirb.addr = chip->rb.addr + 2048;
        chip->rirb.buf = (u32 *)(chip->rb.area + 2048);
        azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr);
-       azx_writel(chip, RIRBUBASE, upper_32bit(chip->rirb.addr));
+       azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr));
 
        /* set the rirb size to 256 entries (ULI requires explicitly) */
        azx_writeb(chip, RIRBSIZE, 0x02);
@@ -860,7 +856,7 @@ static void azx_init_chip(struct azx *chip)
 
        /* program the position buffer */
        azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
-       azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr));
+       azx_writel(chip, DPUBASE, upper_32_bits(chip->posbuf.addr));
 
        chip->initialized = 1;
 }
@@ -1005,7 +1001,7 @@ static int setup_bdle(struct snd_pcm_substream *substream,
                addr = snd_pcm_sgbuf_get_addr(sgbuf, ofs);
                /* program the address field of the BDL entry */
                bdl[0] = cpu_to_le32((u32)addr);
-               bdl[1] = cpu_to_le32(upper_32bit(addr));
+               bdl[1] = cpu_to_le32(upper_32_bits(addr));
                /* program the size field of the BDL entry */
                chunk = PAGE_SIZE - (ofs % PAGE_SIZE);
                if (size < chunk)
@@ -1137,7 +1133,7 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev)
        /* lower BDL address */
        azx_sd_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr);
        /* upper BDL address */
-       azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl.addr));
+       azx_sd_writel(azx_dev, SD_BDLPU, upper_32_bits(azx_dev->bdl.addr));
 
        /* enable the position buffer */
        if (chip->position_fix == POS_FIX_POSBUF ||
@@ -1562,6 +1558,14 @@ static void azx_irq_pending_work(struct work_struct *work)
        struct azx *chip = container_of(work, struct azx, irq_pending_work);
        int i, pending;
 
+       if (!chip->irq_pending_warned) {
+               printk(KERN_WARNING
+                      "hda-intel: IRQ timing workaround is activated "
+                      "for card #%d. Suggest a bigger bdl_pos_adj.\n",
+                      chip->card->number);
+               chip->irq_pending_warned = 1;
+       }
+
        for (;;) {
                pending = 0;
                spin_lock_irq(&chip->reg_lock);
@@ -2015,12 +2019,11 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
 
        if (bdl_pos_adj[dev] < 0) {
                switch (chip->driver_type) {
-               case AZX_DRIVER_ATI:
-               case AZX_DRIVER_ATIHDMI:
-                       bdl_pos_adj[dev] = 32;
+               case AZX_DRIVER_ICH:
+                       bdl_pos_adj[dev] = 1;
                        break;
                default:
-                       bdl_pos_adj[dev] = 1;
+                       bdl_pos_adj[dev] = 32;
                        break;
                }
        }