#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
+/*
+ * Op codes for special requests to be handled by ide_special_rq().
+ * Values should be in the range of 0x20 to 0x3f.
+ */
+#define REQ_DRIVE_RESET 0x20
+
/*
* Check for an interrupt and acknowledge the interrupt status
*/
struct ide_port_info;
struct ide_port_ops {
- /* host specific initialization of devices on a port */
- void (*port_init_devs)(struct hwif_s *);
+ /* host specific initialization of a device */
+ void (*init_dev)(ide_drive_t *);
/* routine to program host for PIO mode */
void (*set_pio_mode)(ide_drive_t *, const u8);
/* routine to program host for DMA mode */
const struct ide_port_ops *port_ops;
const struct ide_dma_ops *dma_ops;
+ void (*exec_command)(struct hwif_s *, u8);
+ u8 (*read_status)(struct hwif_s *);
+ u8 (*read_altstatus)(struct hwif_s *);
+ u8 (*read_sff_dma_status)(struct hwif_s *);
+
+ void (*set_irq)(struct hwif_s *, int);
+
void (*tf_load)(ide_drive_t *, struct ide_task_s *);
void (*tf_read)(ide_drive_t *, struct ide_task_s *);
void (*ide_dma_clear_irq)(ide_drive_t *drive);
- void (*OUTB)(u8 addr, unsigned long port);
- void (*OUTBSYNC)(struct hwif_s *hwif, u8 addr, unsigned long port);
-
- u8 (*INB)(unsigned long port);
-
/* dma physical region descriptor table (cpu view) */
unsigned int *dmatable_cpu;
/* dma physical region descriptor table (dma view) */
int irq; /* our irq number */
unsigned long dma_base; /* base addr for dma ports */
- unsigned long dma_command; /* dma command register */
- unsigned long dma_status; /* dma status register */
unsigned long config_data; /* for use by chipset-specific code */
unsigned long select_data; /* for use by chipset-specific code */
unsigned int sleeping : 1;
/* BOOL: polling active & poll_timeout field valid */
unsigned int polling : 1;
- /* BOOL: in a polling reset situation. Must not trigger another reset yet */
- unsigned int resetting : 1;
/* current drive */
ide_drive_t *drive;
ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
int (*end_request)(ide_drive_t *, int, int);
ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
- ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
struct device_driver gen_driver;
int (*probe)(ide_drive_t *);
void (*remove)(ide_drive_t *);
ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
-ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
-
-extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
-
extern void ide_fix_driveid(struct hd_driveid *);
extern void ide_fixstring(u8 *, const int, const int);
IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
IDE_TFLAG_IN_HOB_NSECT |
IDE_TFLAG_IN_HOB_LBA,
+ IDE_TFLAG_IN_FEATURE = (1 << 1),
IDE_TFLAG_IN_NSECT = (1 << 25),
IDE_TFLAG_IN_LBAL = (1 << 26),
IDE_TFLAG_IN_LBAM = (1 << 27),
extern void SELECT_DRIVE(ide_drive_t *);
void SELECT_MASK(ide_drive_t *, int);
+u8 ide_read_error(ide_drive_t *);
+void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
+
extern int drive_is_ready(ide_drive_t *);
void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
#define ide_pci_register_driver(d) pci_register_driver(d)
#endif
-void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
+void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int,
+ u8 *, hw_regs_t *, hw_regs_t **);
void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
int ide_pci_set_master(struct pci_dev *, const char *);
unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
+extern const struct ide_dma_ops sff_dma_ops;
+int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
#else
static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
}
#endif
-extern void default_hwif_iops(ide_hwif_t *);
-extern void default_hwif_mmiops(ide_hwif_t *);
extern void default_hwif_transport(ide_hwif_t *);
typedef struct ide_pci_enablebit_s {
extern int ide_build_dmatable(ide_drive_t *, struct request *);
int ide_allocate_dma_engine(ide_hwif_t *);
void ide_release_dma_engine(ide_hwif_t *);
-void ide_setup_dma(ide_hwif_t *, unsigned long);
void ide_dma_host_set(ide_drive_t *, int);
extern int ide_dma_setup(ide_drive_t *);
void ide_port_apply_params(ide_hwif_t *);
-int ide_device_add_all(u8 *idx, const struct ide_port_info *);
-int ide_device_add(u8 idx[4], const struct ide_port_info *);
+int ide_device_add_all(u8 *, const struct ide_port_info *, hw_regs_t **);
+int ide_device_add(u8 *, const struct ide_port_info *, hw_regs_t **);
int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
void ide_port_unregister_devices(ide_hwif_t *);
void ide_port_scan(ide_hwif_t *);
return &hwif->drives[(drive->dn ^ 1) & 1];
}
-
-static inline void ide_set_irq(ide_drive_t *drive, int on)
-{
- ide_hwif_t *hwif = drive->hwif;
-
- hwif->OUTBSYNC(hwif, ATA_DEVCTL_OBS | (on ? 0 : 2),
- hwif->io_ports.ctl_addr);
-}
-
-static inline u8 ide_read_status(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = drive->hwif;
-
- return hwif->INB(hwif->io_ports.status_addr);
-}
-
-static inline u8 ide_read_altstatus(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = drive->hwif;
-
- return hwif->INB(hwif->io_ports.ctl_addr);
-}
-
-static inline u8 ide_read_error(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = drive->hwif;
-
- return hwif->INB(hwif->io_ports.error_addr);
-}
#endif /* _IDE_H */
projects / linux-2.6 / blobdiff