* This header file defines the I2O APIs that are available to both
* the kernel and user level applications. Kernel specific structures
* are defined in i2o_osm. OSMs should include _only_ i2o_osm.h which
- * automatically includs this file.
+ * automatically includes this file.
*
*/
/* How many controllers are we allowing */
#define MAX_I2O_CONTROLLERS 32
-//#include <linux/ioctl.h>
-#ifndef __KERNEL__
-
-typedef unsigned char u8;
-typedef unsigned short u16;
-typedef unsigned int u32;
-
-#endif /* __KERNEL__ */
-
+#include <linux/ioctl.h>
/*
* I2O Control IOCTLs and structures
struct i2o_cmd_passthru32 {
unsigned int iop; /* IOP unit number */
- u32 msg; /* message */
+ __u32 msg; /* message */
};
struct i2o_cmd_passthru {
int lost;
};
+typedef struct i2o_sg_io_hdr {
+ unsigned int flags; /* see I2O_DPT_SG_IO_FLAGS */
+} i2o_sg_io_hdr_t;
+
/**************************************************************************
* HRT related constants and structures
**************************************************************************/
#define I2O_BUS_UNKNOWN 0x80
typedef struct _i2o_pci_bus {
- u8 PciFunctionNumber;
- u8 PciDeviceNumber;
- u8 PciBusNumber;
- u8 reserved;
- u16 PciVendorID;
- u16 PciDeviceID;
+ __u8 PciFunctionNumber;
+ __u8 PciDeviceNumber;
+ __u8 PciBusNumber;
+ __u8 reserved;
+ __u16 PciVendorID;
+ __u16 PciDeviceID;
} i2o_pci_bus;
typedef struct _i2o_local_bus {
- u16 LbBaseIOPort;
- u16 reserved;
- u32 LbBaseMemoryAddress;
+ __u16 LbBaseIOPort;
+ __u16 reserved;
+ __u32 LbBaseMemoryAddress;
} i2o_local_bus;
typedef struct _i2o_isa_bus {
- u16 IsaBaseIOPort;
- u8 CSN;
- u8 reserved;
- u32 IsaBaseMemoryAddress;
+ __u16 IsaBaseIOPort;
+ __u8 CSN;
+ __u8 reserved;
+ __u32 IsaBaseMemoryAddress;
} i2o_isa_bus;
typedef struct _i2o_eisa_bus_info {
- u16 EisaBaseIOPort;
- u8 reserved;
- u8 EisaSlotNumber;
- u32 EisaBaseMemoryAddress;
+ __u16 EisaBaseIOPort;
+ __u8 reserved;
+ __u8 EisaSlotNumber;
+ __u32 EisaBaseMemoryAddress;
} i2o_eisa_bus;
typedef struct _i2o_mca_bus {
- u16 McaBaseIOPort;
- u8 reserved;
- u8 McaSlotNumber;
- u32 McaBaseMemoryAddress;
+ __u16 McaBaseIOPort;
+ __u8 reserved;
+ __u8 McaSlotNumber;
+ __u32 McaBaseMemoryAddress;
} i2o_mca_bus;
typedef struct _i2o_other_bus {
- u16 BaseIOPort;
- u16 reserved;
- u32 BaseMemoryAddress;
+ __u16 BaseIOPort;
+ __u16 reserved;
+ __u32 BaseMemoryAddress;
} i2o_other_bus;
typedef struct _i2o_hrt_entry {
- u32 adapter_id;
- u32 parent_tid:12;
- u32 state:4;
- u32 bus_num:8;
- u32 bus_type:8;
+ __u32 adapter_id;
+ __u32 parent_tid:12;
+ __u32 state:4;
+ __u32 bus_num:8;
+ __u32 bus_type:8;
union {
i2o_pci_bus pci_bus;
i2o_local_bus local_bus;
} i2o_hrt_entry;
typedef struct _i2o_hrt {
- u16 num_entries;
- u8 entry_len;
- u8 hrt_version;
- u32 change_ind;
+ __u16 num_entries;
+ __u8 entry_len;
+ __u8 hrt_version;
+ __u32 change_ind;
i2o_hrt_entry hrt_entry[1];
} i2o_hrt;
typedef struct _i2o_lct_entry {
- u32 entry_size:16;
- u32 tid:12;
- u32 reserved:4;
- u32 change_ind;
- u32 device_flags;
- u32 class_id:12;
- u32 version:4;
- u32 vendor_id:16;
- u32 sub_class;
- u32 user_tid:12;
- u32 parent_tid:12;
- u32 bios_info:8;
- u8 identity_tag[8];
- u32 event_capabilities;
+ __u32 entry_size:16;
+ __u32 tid:12;
+ __u32 reserved:4;
+ __u32 change_ind;
+ __u32 device_flags;
+ __u32 class_id:12;
+ __u32 version:4;
+ __u32 vendor_id:16;
+ __u32 sub_class;
+ __u32 user_tid:12;
+ __u32 parent_tid:12;
+ __u32 bios_info:8;
+ __u8 identity_tag[8];
+ __u32 event_capabilities;
} i2o_lct_entry;
typedef struct _i2o_lct {
- u32 table_size:16;
- u32 boot_tid:12;
- u32 lct_ver:4;
- u32 iop_flags;
- u32 change_ind;
+ __u32 table_size:16;
+ __u32 boot_tid:12;
+ __u32 lct_ver:4;
+ __u32 iop_flags;
+ __u32 change_ind;
i2o_lct_entry lct_entry[1];
} i2o_lct;
typedef struct _i2o_status_block {
- u16 org_id;
- u16 reserved;
- u16 iop_id:12;
- u16 reserved1:4;
- u16 host_unit_id;
- u16 segment_number:12;
- u16 i2o_version:4;
- u8 iop_state;
- u8 msg_type;
- u16 inbound_frame_size;
- u8 init_code;
- u8 reserved2;
- u32 max_inbound_frames;
- u32 cur_inbound_frames;
- u32 max_outbound_frames;
+ __u16 org_id;
+ __u16 reserved;
+ __u16 iop_id:12;
+ __u16 reserved1:4;
+ __u16 host_unit_id;
+ __u16 segment_number:12;
+ __u16 i2o_version:4;
+ __u8 iop_state;
+ __u8 msg_type;
+ __u16 inbound_frame_size;
+ __u8 init_code;
+ __u8 reserved2;
+ __u32 max_inbound_frames;
+ __u32 cur_inbound_frames;
+ __u32 max_outbound_frames;
char product_id[24];
- u32 expected_lct_size;
- u32 iop_capabilities;
- u32 desired_mem_size;
- u32 current_mem_size;
- u32 current_mem_base;
- u32 desired_io_size;
- u32 current_io_size;
- u32 current_io_base;
- u32 reserved3:24;
- u32 cmd_status:8;
+ __u32 expected_lct_size;
+ __u32 iop_capabilities;
+ __u32 desired_mem_size;
+ __u32 current_mem_size;
+ __u32 current_mem_base;
+ __u32 desired_io_size;
+ __u32 current_io_size;
+ __u32 current_io_base;
+ __u32 reserved3:24;
+ __u32 cmd_status:8;
} i2o_status_block;
/* Event indicator mask flags */
#define I2O_CLASS_ATE_PERIPHERAL 0x061
#define I2O_CLASS_FLOPPY_CONTROLLER 0x070
#define I2O_CLASS_FLOPPY_DEVICE 0x071
-#define I2O_CLASS_BUS_ADAPTER_PORT 0x080
+#define I2O_CLASS_BUS_ADAPTER 0x080
#define I2O_CLASS_PEER_TRANSPORT_AGENT 0x090
#define I2O_CLASS_PEER_TRANSPORT 0x091
#define I2O_CLASS_END 0xfff
#define ADAPTER_STATE_FAILED 0x10
#define ADAPTER_STATE_FAULTED 0x11
+/*
+ * Software module types
+ */
+#define I2O_SOFTWARE_MODULE_IRTOS 0x11
+#define I2O_SOFTWARE_MODULE_IOP_PRIVATE 0x22
+#define I2O_SOFTWARE_MODULE_IOP_CONFIG 0x23
+
+/*
+ * Vendors
+ */
+#define I2O_VENDOR_DPT 0x001b
+
+/*
+ * DPT / Adaptec specific values for i2o_sg_io_hdr flags.
+ */
+#define I2O_DPT_SG_FLAG_INTERPRET 0x00010000
+#define I2O_DPT_SG_FLAG_PHYSICAL 0x00020000
+
+#define I2O_DPT_FLASH_FRAG_SIZE 0x10000
+#define I2O_DPT_FLASH_READ 0x0101
+#define I2O_DPT_FLASH_WRITE 0x0102
+
#endif /* _I2O_DEV_H */