#endif
/*
- * Vectors 0x20-0x2f are used for ISA interrupts on 32 bit.
- *
* Reserve the lowest usable priority level 0x20 - 0x2f for triggering
* cleanup after irq migration on 64 bit.
*/
#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
/*
- * Vectors 0x30-0x3f are used for ISA interrupts on 64 bit
+ * Vectors 0x20-0x2f are used for ISA interrupts on 32 bit.
+ * Vectors 0x30-0x3f are used for ISA interrupts on 64 bit.
*/
+#ifdef CONFIG_X86_32
+#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR)
+#else
#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
+#endif
#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
# define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
#endif
-#define FIRST_SYSTEM_VECTOR 0xef
-
#define NR_VECTORS 256
#define FPU_IRQ 13
#define LAST_VM86_IRQ 15
#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
-#if !defined(CONFIG_X86_VISWS) && !defined(CONFIG_X86_VOYAGER)
+#if !defined(CONFIG_X86_VOYAGER)
-# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT)
+# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS)
# define NR_IRQS 224