*/
#define HV_FAST_CPU_YIELD 0x12
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_cpu_yield(void);
+#endif
/* cpu_qconf()
* TRAP: HV_FAST_TRAP
* EBADALIGN Base real address is not correctly aligned
* for size.
*
- * Configure the given queue to be placed at the givem base real
+ * Configure the given queue to be placed at the given base real
* address, with the given number of entries. The number of entries
* must be a power of 2. The base real address must be aligned
* exactly to match the queue size. Each queue entry is 64 bytes
* long, so for example a 32 entry queue must be aligned on a 2048
* byte real address boundary.
*
- * The specified queue is unconfigured is number of entries is given as zero.
+ * The specified queue is unconfigured if the number of entries is given
+ * as zero.
*
* For the current version of this API service, the argument queue is defined
* as follows:
+ *
* queue description
* ----- -------------------------
* 0x3c cpu mondo queue
#define HV_CPU_QUEUE_RES_ERROR 0x3e
#define HV_CPU_QUEUE_NONRES_ERROR 0x3f
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_cpu_qconf(unsigned long type,
+ unsigned long queue_paddr,
+ unsigned long num_queue_entries);
+#endif
+
/* cpu_qinfo()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_CPU_QINFO
* ENOCPU Invalid cpu in CPU list
* EWOULDBLOCK Some or all of the listed CPUs did not receive
* the mondo
+ * ECPUERROR One or more of the listed CPUs are in error
+ * state, use HV_FAST_CPU_STATE to see which ones
* EINVAL CPU list includes caller's CPU ID
*
* Send a mondo interrupt to the CPUs in the given CPU list with the
*/
#define HV_FAST_CPU_MONDO_SEND 0x42
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_cpu_mondo_send(unsigned long cpu_count, unsigned long cpu_list_pa, unsigned long mondo_block_pa);
+#endif
+
/* cpu_myid()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_CPU_MYID
#define HV_CPU_STATE_RUNNING 0x02
#define HV_CPU_STATE_ERROR 0x03
+#ifndef __ASSEMBLY__
+extern long sun4v_cpu_state(unsigned long cpuid);
+#endif
+
/* cpu_set_rtba()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_CPU_SET_RTBA
* ARG0: character
* RET0: status
* ERRORS: EINVAL Illegal character
- * EWOULDBLOCK Output buffer currentl full, would block
+ * EWOULDBLOCK Output buffer currently full, would block
*
* Send a character to the console device. Only character values
* between 0 and 255 may be used. Values outside this range are
*/
#define HV_FAST_INTR_DEVINO2SYSINO 0xa0
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle,
+ unsigned long devino);
+#endif
+
/* intr_getenabled()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_GETENABLED
*/
#define HV_FAST_INTR_GETENABLED 0xa1
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_getenabled(unsigned long sysino);
+#endif
+
/* intr_setenabled()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_SETENABLED
*/
#define HV_FAST_INTR_SETENABLED 0xa2
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_setenabled(unsigned long sysino, unsigned long intr_enabled);
+#endif
+
/* intr_getstate()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_GETSTATE
*/
#define HV_FAST_INTR_GETSTATE 0xa3
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_getstate(unsigned long sysino);
+#endif
+
/* intr_setstate()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_SETSTATE
*/
#define HV_FAST_INTR_SETSTATE 0xa4
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_setstate(unsigned long sysino, unsigned long intr_state);
+#endif
+
/* intr_gettarget()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_GETTARGET
*/
#define HV_FAST_INTR_GETTARGET 0xa5
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_gettarget(unsigned long sysino);
+#endif
+
/* intr_settarget()
* TRAP: HV_FAST_TRAP
* FUNCTION: HV_FAST_INTR_SETTARGET
*/
#define HV_FAST_INTR_SETTARGET 0xa6
+#ifndef __ASSEMBLY__
+extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid);
+#endif
+
/* PCI IO services.
*
* See the terminology descriptions in the device interrupt services
* a tsbnum and a tsbindex. Bits 63:32 contain the
* tsbnum and bits 31:00 contain the tsbindex.
*
+ * Use the HV_PCI_TSBID() macro to construct such
+ * values.
+ *
* io_attributes IO attributes for IOMMU mappings. One of more
* of the attritbute bits are stores in a 64-bit
* value. The values are defined below.
(((d) & 0x1f) << 11) | \
(((f) & 0x07) << 8))
+#define HV_PCI_TSBID(__tsb_num, __tsb_index) \
+ ((((u64)(__tsb_num)) << 32UL) | ((u64)(__tsb_index)))
+
#define HV_PCI_SYNC_FOR_DEVICE 0x01
#define HV_PCI_SYNC_FOR_CPU 0x02