#include <asm/psr.h>
#include <asm/ptrace.h>
#include <asm/btfixup.h>
+#include <asm/smp.h>
#ifndef __ASSEMBLY__
+#include <linux/irqflags.h>
+
/*
* Sparc (general) CPU types
*/
"o0", "o1", "o2", "o3", "o7"); \
} while(0)
-/*
- * On SMP systems, when the scheduler does migration-cost autodetection,
- * it needs a way to flush as much of the CPU's caches as possible.
- *
- * TODO: fill this in!
- */
-static inline void sched_cacheflush(void)
-{
-}
-
-/*
- * Changing the IRQ level on the Sparc.
- */
-extern void local_irq_restore(unsigned long);
-extern unsigned long __local_irq_save(void);
-extern void local_irq_enable(void);
-
-static inline unsigned long getipl(void)
-{
- unsigned long retval;
-
- __asm__ __volatile__("rd %%psr, %0" : "=r" (retval));
- return retval;
-}
-
-#define local_save_flags(flags) ((flags) = getipl())
-#define local_irq_save(flags) ((flags) = __local_irq_save())
-#define local_irq_disable() ((void) __local_irq_save())
-#define irqs_disabled() ((getipl() & PSR_PIL) != 0)
-
/* XXX Change this if we ever use a PSO mode kernel. */
#define mb() __asm__ __volatile__ ("" : : : "memory")
#define rmb() mb()