"here:\n" \
: "=&r" (last) \
: "r" (&(current_set[hard_smp_processor_id()])), \
- "r" ((next)->thread_info), \
+ "r" (task_thread_info(next)), \
"i" (TI_KPSR), \
"i" (TI_KSP), \
"i" (TI_TASK) \
"o0", "o1", "o2", "o3", "o7"); \
} while(0)
+/*
+ * On SMP systems, when the scheduler does migration-cost autodetection,
+ * it needs a way to flush as much of the CPU's caches as possible.
+ *
+ * TODO: fill this in!
+ */
+static inline void sched_cacheflush(void)
+{
+}
+
/*
* Changing the IRQ level on the Sparc.
*/
BTFIXUPDEF_CALL(void, ___xchg32, void)
#endif
-extern __inline__ unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
+static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
{
#ifdef CONFIG_SMP
__asm__ __volatile__("swap [%2], %0"