#define __S390_MMU_CONTEXT_H
#include <asm/pgalloc.h>
+#include <asm/uaccess.h>
#include <asm-generic/mm_hooks.h>
-/*
- * get a new mmu context.. S390 don't know about contexts.
- */
-#define init_new_context(tsk,mm) 0
+static inline int init_new_context(struct task_struct *tsk,
+ struct mm_struct *mm)
+{
+ mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS;
+#ifdef CONFIG_64BIT
+ mm->context.asce_bits |= _ASCE_TYPE_REGION3;
+#endif
+ if (current->mm->context.pgstes) {
+ mm->context.noexec = 0;
+ mm->context.pgstes = 1;
+ } else {
+ mm->context.noexec = s390_noexec;
+ mm->context.pgstes = 0;
+ }
+ mm->context.asce_limit = STACK_TOP_MAX;
+ crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
+ return 0;
+}
#define destroy_context(mm) do { } while (0)
#ifndef __s390x__
#define LCTL_OPCODE "lctl"
-#define PGTABLE_BITS (_SEGMENT_TABLE|USER_STD_MASK)
#else
#define LCTL_OPCODE "lctlg"
-#define PGTABLE_BITS (_REGION_TABLE|USER_STD_MASK)
#endif
-static inline void enter_lazy_tlb(struct mm_struct *mm,
- struct task_struct *tsk)
+static inline void update_mm(struct mm_struct *mm, struct task_struct *tsk)
{
+ pgd_t *pgd = mm->pgd;
+
+ S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd);
+ if (switch_amode) {
+ /* Load primary space page table origin. */
+ pgd = mm->context.noexec ? get_shadow_table(pgd) : pgd;
+ S390_lowcore.user_exec_asce = mm->context.asce_bits | __pa(pgd);
+ asm volatile(LCTL_OPCODE" 1,1,%0\n"
+ : : "m" (S390_lowcore.user_exec_asce) );
+ } else
+ /* Load home space page table origin. */
+ asm volatile(LCTL_OPCODE" 13,13,%0"
+ : : "m" (S390_lowcore.user_asce) );
+ set_fs(current->thread.mm_segment);
}
static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
struct task_struct *tsk)
{
- pgd_t *shadow_pgd = get_shadow_pgd(next->pgd);
-
- if (prev != next) {
- S390_lowcore.user_asce = (__pa(next->pgd) & PAGE_MASK) |
- PGTABLE_BITS;
- if (shadow_pgd) {
- /* Load primary/secondary space page table origin. */
- S390_lowcore.user_exec_asce =
- (__pa(shadow_pgd) & PAGE_MASK) | PGTABLE_BITS;
- asm volatile(LCTL_OPCODE" 1,1,%0\n"
- LCTL_OPCODE" 7,7,%1"
- : : "m" (S390_lowcore.user_exec_asce),
- "m" (S390_lowcore.user_asce) );
- } else if (switch_amode) {
- /* Load primary space page table origin. */
- asm volatile(LCTL_OPCODE" 1,1,%0"
- : : "m" (S390_lowcore.user_asce) );
- } else
- /* Load home space page table origin. */
- asm volatile(LCTL_OPCODE" 13,13,%0"
- : : "m" (S390_lowcore.user_asce) );
- }
cpu_set(smp_processor_id(), next->cpu_vm_mask);
+ update_mm(next, tsk);
}
+#define enter_lazy_tlb(mm,tsk) do { } while (0)
#define deactivate_mm(tsk,mm) do { } while (0)
static inline void activate_mm(struct mm_struct *prev,
struct mm_struct *next)
{
switch_mm(prev, next, current);
- set_fs(current->thread.mm_segment);
}
#endif /* __S390_MMU_CONTEXT_H */