fix hppfs Makefile breakage

[linux-2.6] / include / asm-powerpc / spu.h

diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 543c83c2dc62d68e3635e81d0dc813c7e0c3a149..6abead6e681aacd732efc40c5fd0431824af8f37 100644 (file)
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -98,9 +98,9 @@
 #define MFC_PRIV_ATTN_EVENT                 0x00000800
 #define MFC_MULTI_SRC_EVENT                 0x00001000
 
-/* Flags indicating progress during context switch. */
+/* Flag indicating progress during context switch. */
 #define SPU_CONTEXT_SWITCH_PENDING     0UL
-#define SPU_CONTEXT_SWITCH_ACTIVE      1UL
+#define SPU_CONTEXT_FAULT_PENDING      1UL
 
 struct spu_context;
 struct spu_runqueue;
@@ -129,9 +129,11 @@ struct spu {
        unsigned int irqs[3];
        u32 node;
        u64 flags;
-       u64 dar;
-       u64 dsisr;
        u64 class_0_pending;
+       u64 class_0_dar;
+       u64 class_0_dsisr;
+       u64 class_1_dar;
+       u64 class_1_dsisr;
        size_t ls_size;
        unsigned int slb_replace;
        struct mm_struct *mm;
@@ -144,9 +146,8 @@ struct spu {
 
        void (* wbox_callback)(struct spu *spu);
        void (* ibox_callback)(struct spu *spu);
-       void (* stop_callback)(struct spu *spu);
+       void (* stop_callback)(struct spu *spu, int irq);
        void (* mfc_callback)(struct spu *spu);
-       void (* dma_callback)(struct spu *spu, int type);
 
        char irq_c0[8];
        char irq_c1[8];
@@ -197,8 +198,6 @@ struct cbe_spu_info {
 extern struct cbe_spu_info cbe_spu_info[];
 
 void spu_init_channels(struct spu *spu);
-int spu_irq_class_0_bottom(struct spu *spu);
-int spu_irq_class_1_bottom(struct spu *spu);
 void spu_irq_setaffinity(struct spu *spu, int cpu);
 
 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
@@ -251,6 +250,7 @@ struct spufs_calls {
                                                __u32 __user *ustatus);
        int (*coredump_extra_notes_size)(void);
        int (*coredump_extra_notes_write)(struct file *file, loff_t *foffset);
+       void (*notify_spus_active)(void);
        struct module *owner;
 };
 
@@ -305,6 +305,9 @@ struct notifier_block;
 int spu_switch_event_register(struct notifier_block * n);
 int spu_switch_event_unregister(struct notifier_block * n);
 
+extern void notify_spus_active(void);
+extern void do_notify_spus_active(void);
+
 /*
  * This defines the Local Store, Problem Area and Privilege Area of an SPU.
  */
@@ -527,8 +530,24 @@ struct spu_priv1 {
 #define CLASS2_ENABLE_SPU_STOP_INTR                    0x2L
 #define CLASS2_ENABLE_SPU_HALT_INTR                    0x4L
 #define CLASS2_ENABLE_SPU_DMA_TAG_GROUP_COMPLETE_INTR  0x8L
+#define CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR           0x10L
        u8  pad_0x118_0x140[0x28];                              /* 0x118 */
        u64 int_stat_RW[3];                                     /* 0x140 */
+#define CLASS0_DMA_ALIGNMENT_INTR                      0x1L
+#define CLASS0_INVALID_DMA_COMMAND_INTR                        0x2L
+#define CLASS0_SPU_ERROR_INTR                          0x4L
+#define CLASS0_INTR_MASK                               0x7L
+#define CLASS1_SEGMENT_FAULT_INTR                      0x1L
+#define CLASS1_STORAGE_FAULT_INTR                      0x2L
+#define CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR          0x4L
+#define CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR          0x8L
+#define CLASS1_INTR_MASK                               0xfL
+#define CLASS2_MAILBOX_INTR                            0x1L
+#define CLASS2_SPU_STOP_INTR                           0x2L
+#define CLASS2_SPU_HALT_INTR                           0x4L
+#define CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR         0x8L
+#define CLASS2_MAILBOX_THRESHOLD_INTR                  0x10L
+#define CLASS2_INTR_MASK                               0x1fL
        u8  pad_0x158_0x180[0x28];                              /* 0x158 */
        u64 int_route_RW;                                       /* 0x180 */