[PATCH] slab: remove unused align parameter from alloc_percpu

[linux-2.6] / include / asm-powerpc / cputable.h

diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index c019501dacebad84b5e54b87f55b3dbf4c9ad1a1..d1cfa3f515ea2d2162941c42ea534a567d22d7b5 100644 (file)
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -2,7 +2,7 @@
 #define __ASM_POWERPC_CPUTABLE_H
 
 #include <linux/config.h>
-#include <asm/ppc_asm.h> /* for ASM_CONST */
+#include <asm/asm-compat.h>
 
 #define PPC_FEATURE_32                 0x80000000
 #define PPC_FEATURE_64                 0x40000000
@@ -16,6 +16,10 @@
 #define PPC_FEATURE_HAS_EFP_SINGLE     0x00400000
 #define PPC_FEATURE_HAS_EFP_DOUBLE     0x00200000
 #define PPC_FEATURE_NO_TB              0x00100000
+#define PPC_FEATURE_POWER4             0x00080000
+#define PPC_FEATURE_POWER5             0x00040000
+#define PPC_FEATURE_POWER5_PLUS                0x00020000
+#define PPC_FEATURE_CELL               0x00010000
 
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
@@ -86,6 +90,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_NEED_COHERENT          ASM_CONST(0x0000000000020000)
 #define CPU_FTR_NO_BTIC                        ASM_CONST(0x0000000000040000)
 #define CPU_FTR_BIG_PHYS               ASM_CONST(0x0000000000080000)
+#define CPU_FTR_NODSISRALIGN           ASM_CONST(0x0000000000100000)
 
 #ifdef __powerpc64__
 /* Add the 64b processor unique features in the top half of the word */
@@ -93,7 +98,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_16M_PAGE               ASM_CONST(0x0000000200000000)
 #define CPU_FTR_TLBIEL                         ASM_CONST(0x0000000400000000)
 #define CPU_FTR_NOEXECUTE              ASM_CONST(0x0000000800000000)
-#define CPU_FTR_NODSISRALIGN           ASM_CONST(0x0000001000000000)
 #define CPU_FTR_IABR                   ASM_CONST(0x0000002000000000)
 #define CPU_FTR_MMCRA                          ASM_CONST(0x0000004000000000)
 #define CPU_FTR_CTRL                   ASM_CONST(0x0000008000000000)
@@ -101,6 +105,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_COHERENT_ICACHE        ASM_CONST(0x0000020000000000)
 #define CPU_FTR_LOCKLESS_TLBIE         ASM_CONST(0x0000040000000000)
 #define CPU_FTR_MMCRA_SIHV             ASM_CONST(0x0000080000000000)
+#define CPU_FTR_CI_LARGE_PAGE          ASM_CONST(0x0000100000000000)
 #else
 /* ensure on 32b processors the flags are available for compiling but
  * don't do anything */
@@ -108,7 +113,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_16M_PAGE               ASM_CONST(0x0)
 #define CPU_FTR_TLBIEL                         ASM_CONST(0x0)
 #define CPU_FTR_NOEXECUTE              ASM_CONST(0x0)
-#define CPU_FTR_NODSISRALIGN           ASM_CONST(0x0)
 #define CPU_FTR_IABR                   ASM_CONST(0x0)
 #define CPU_FTR_MMCRA                          ASM_CONST(0x0)
 #define CPU_FTR_CTRL                   ASM_CONST(0x0)
@@ -116,6 +120,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_COHERENT_ICACHE        ASM_CONST(0x0)
 #define CPU_FTR_LOCKLESS_TLBIE         ASM_CONST(0x0)
 #define CPU_FTR_MMCRA_SIHV             ASM_CONST(0x0)
+#define CPU_FTR_CI_LARGE_PAGE          ASM_CONST(0x0)
 #endif
 
 #ifndef __ASSEMBLY__
@@ -267,18 +272,21 @@ enum {
        CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
            CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
        CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
-           CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
+           CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_NODSISRALIGN,
        CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
            CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP |
-           CPU_FTR_MAYBE_CAN_NAP,
+           CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN,
        CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
-       CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
-       CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
-       CPU_FTRS_E200 = CPU_FTR_USE_TB,
-       CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
+       CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
+           CPU_FTR_NODSISRALIGN,
+       CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
+           CPU_FTR_NODSISRALIGN,
+       CPU_FTRS_E200 = CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN,
+       CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
+           CPU_FTR_NODSISRALIGN,
        CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-           CPU_FTR_BIG_PHYS,
-       CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON,
+           CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN,
+       CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN,
 #ifdef __powerpc64__
        CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
            CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
@@ -339,6 +347,7 @@ enum {
 #ifdef __powerpc64__
            CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |
            CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL |
+            CPU_FTR_CI_LARGE_PAGE |
 #endif
            0,