]> err.no Git - linux-2.6/blobdiff - include/asm-powerpc/cputable.h
[PATCH] Remove debug.h from rio.h (unused file)
[linux-2.6] / include / asm-powerpc / cputable.h
index f4d5089324673c5c1293d981edbf88e54c420818..64210549f56b2b52cca83cddd84c489daec3c4e4 100644 (file)
@@ -19,6 +19,7 @@
 #define PPC_FEATURE_POWER5             0x00040000
 #define PPC_FEATURE_POWER5_PLUS                0x00020000
 #define PPC_FEATURE_CELL               0x00010000
+#define PPC_FEATURE_BOOKE              0x00008000
 
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
  * via the mkdefs mechanism.
  */
 struct cpu_spec;
-struct op_powerpc_model;
 
 typedef        void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
 
+enum powerpc_oprofile_type {
+       PPC_OPROFILE_INVALID = 0,
+       PPC_OPROFILE_RS64 = 1,
+       PPC_OPROFILE_POWER4 = 2,
+       PPC_OPROFILE_G4 = 3,
+       PPC_OPROFILE_BOOKE = 4,
+};
+
 struct cpu_spec {
        /* CPU is matched via (PVR & pvr_mask) == pvr_value */
        unsigned int    pvr_mask;
@@ -56,7 +64,10 @@ struct cpu_spec {
        char            *oprofile_cpu_type;
 
        /* Processor specific oprofile operations */
-       struct op_powerpc_model *oprofile_model;
+       enum powerpc_oprofile_type oprofile_type;
+
+       /* Name of processor class, for the ELF AT_PLATFORM entry */
+       char            *platform;
 };
 
 extern struct cpu_spec         *cur_cpu_spec;
@@ -105,6 +116,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_LOCKLESS_TLBIE         ASM_CONST(0x0000040000000000)
 #define CPU_FTR_MMCRA_SIHV             ASM_CONST(0x0000080000000000)
 #define CPU_FTR_CI_LARGE_PAGE          ASM_CONST(0x0000100000000000)
+#define CPU_FTR_PAUSE_ZERO             ASM_CONST(0x0000200000000000)
 #else
 /* ensure on 32b processors the flags are available for compiling but
  * don't do anything */
@@ -304,7 +316,8 @@ enum {
            CPU_FTR_MMCRA_SIHV,
        CPU_FTRS_CELL = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 |
-           CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT,
+           CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT |
+           CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO,
        CPU_FTRS_COMPATIBLE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2,
 #endif