#define SAL_PCI_CONFIG_READ 0x01000010
#define SAL_PCI_CONFIG_WRITE 0x01000011
#define SAL_FREQ_BASE 0x01000012
+#define SAL_PHYSICAL_ID_INFO 0x01000013
#define SAL_UPDATE_PAL 0x01000020
return isrv.status;
}
+/* Get physical processor die mapping in the platform. */
+static inline s64
+ia64_sal_physical_id_info(u16 *splid)
+{
+ struct ia64_sal_retval isrv;
+ SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
+ if (splid)
+ *splid = isrv.v0;
+ return isrv.status;
+}
+
extern unsigned long sal_platform_features;
extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);