#ifndef _CDEF_BF532_H
#define _CDEF_BF532_H
-/*
-#if !defined(__ADSPLPBLACKFIN__)
-#warning cdefBF532.h should only be included for 532 compatible chips.
-#endif
-*/
+
+#include <asm/blackfin.h>
+
/*include all Core registers and bit definitions*/
#include "defBF532.h"
/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
#define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
-#define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL,val)
+/* Writing to PLL_CTL initiates a PLL relock sequence. */
+static __inline__ void bfin_write_PLL_CTL(unsigned int val)
+{
+ unsigned long flags, iwr;
+
+ if (val == bfin_read_PLL_CTL())
+ return;
+
+ local_irq_save(flags);
+ /* Enable the PLL Wakeup bit in SIC IWR */
+ iwr = bfin_read32(SIC_IWR);
+ /* Only allow PPL Wakeup) */
+ bfin_write32(SIC_IWR, IWR_ENABLE(0));
+
+ bfin_write16(PLL_CTL, val);
+ SSYNC();
+ asm("IDLE;");
+
+ bfin_write32(SIC_IWR, iwr);
+ local_irq_restore(flags);
+}
#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val)
#define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
#define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val)
#define bfin_read_CHIPID() bfin_read32(CHIPID)
-#define bfin_read_SWRST() bfin_read16(SWRST)
-#define bfin_write_SWRST(val) bfin_write16(SWRST,val)
-#define bfin_read_SYSCR() bfin_read16(SYSCR)
-#define bfin_write_SYSCR(val) bfin_write16(SYSCR,val)
#define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
#define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val)
#define bfin_read_VR_CTL() bfin_read16(VR_CTL)
{
unsigned long flags, iwr;
+ if (val == bfin_read_VR_CTL())
+ return;
+
+ local_irq_save(flags);
/* Enable the PLL Wakeup bit in SIC IWR */
iwr = bfin_read32(SIC_IWR);
/* Only allow PPL Wakeup) */
bfin_write32(SIC_IWR, IWR_ENABLE(0));
bfin_write16(VR_CTL, val);
- __builtin_bfin_ssync();
-
- local_irq_save(flags);
+ SSYNC();
asm("IDLE;");
- local_irq_restore(flags);
+
bfin_write32(SIC_IWR, iwr);
+ local_irq_restore(flags);
}
/* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */
+#define bfin_read_SWRST() bfin_read16(SWRST)
+#define bfin_write_SWRST(val) bfin_write16(SWRST,val)
+#define bfin_read_SYSCR() bfin_read16(SYSCR)
+#define bfin_write_SYSCR(val) bfin_write16(SYSCR,val)
#define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
#define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0,val)
#define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
#define bfin_read_RTC_PREN() bfin_read16(RTC_PREN)
#define bfin_write_RTC_PREN(val) bfin_write16(RTC_PREN,val)
+/* DMA Traffic controls */
+#define bfin_read_DMA_TCPER() bfin_read16(DMA_TCPER)
+#define bfin_write_DMA_TCPER(val) bfin_write16(DMA_TCPER,val)
+#define bfin_read_DMA_TCCNT() bfin_read16(DMA_TCCNT)
+#define bfin_write_DMA_TCCNT(val) bfin_write16(DMA_TCCNT,val)
+
+/* Alternate deprecated register names (below) provided for backwards code compatibility */
+#define bfin_read_DMA_TC_PER() bfin_read16(DMA_TC_PER)
+#define bfin_write_DMA_TC_PER(val) bfin_write16(DMA_TC_PER,val)
+#define bfin_read_DMA_TC_CNT() bfin_read16(DMA_TC_CNT)
+#define bfin_write_DMA_TC_CNT(val) bfin_write16(DMA_TC_CNT,val)
+
/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */
#define bfin_read_FIO_DIR() bfin_read16(FIO_DIR)
#define bfin_write_FIO_DIR(val) bfin_write16(FIO_DIR,val)
-#define bfin_read_FIO_FLAG_C() bfin_read16(FIO_FLAG_C)
-#define bfin_write_FIO_FLAG_C(val) bfin_write16(FIO_FLAG_C,val)
-#define bfin_read_FIO_FLAG_S() bfin_read16(FIO_FLAG_S)
-#define bfin_write_FIO_FLAG_S(val) bfin_write16(FIO_FLAG_S,val)
#define bfin_read_FIO_MASKA_C() bfin_read16(FIO_MASKA_C)
#define bfin_write_FIO_MASKA_C(val) bfin_write16(FIO_MASKA_C,val)
#define bfin_read_FIO_MASKA_S() bfin_read16(FIO_MASKA_S)
#define bfin_write_FIO_BOTH(val) bfin_write16(FIO_BOTH,val)
#define bfin_read_FIO_INEN() bfin_read16(FIO_INEN)
#define bfin_write_FIO_INEN(val) bfin_write16(FIO_INEN,val)
-#define bfin_read_FIO_FLAG_D() bfin_read16(FIO_FLAG_D)
-#define bfin_write_FIO_FLAG_D(val) bfin_write16(FIO_FLAG_D,val)
-#define bfin_read_FIO_FLAG_T() bfin_read16(FIO_FLAG_T)
-#define bfin_write_FIO_FLAG_T(val) bfin_write16(FIO_FLAG_T,val)
#define bfin_read_FIO_MASKA_D() bfin_read16(FIO_MASKA_D)
#define bfin_write_FIO_MASKA_D(val) bfin_write16(FIO_MASKA_D,val)
#define bfin_read_FIO_MASKA_T() bfin_read16(FIO_MASKA_T)
#define bfin_read_FIO_MASKB_T() bfin_read16(FIO_MASKB_T)
#define bfin_write_FIO_MASKB_T(val) bfin_write16(FIO_MASKB_T,val)
-/* DMA Traffic controls */
-#define bfin_read_DMA_TCPER() bfin_read16(DMA_TCPER)
-#define bfin_write_DMA_TCPER(val) bfin_write16(DMA_TCPER,val)
-#define bfin_read_DMA_TCCNT() bfin_read16(DMA_TCCNT)
-#define bfin_write_DMA_TCCNT(val) bfin_write16(DMA_TCCNT,val)
-#define bfin_read_DMA_TC_PER() bfin_read16(DMA_TC_PER)
-#define bfin_write_DMA_TC_PER(val) bfin_write16(DMA_TC_PER,val)
-#define bfin_read_DMA_TC_CNT() bfin_read16(DMA_TC_CNT)
-#define bfin_write_DMA_TC_CNT(val) bfin_write16(DMA_TC_CNT,val)
+
+#if ANOMALY_05000311
+#define BFIN_WRITE_FIO_FLAG(name) \
+static __inline__ void bfin_write_FIO_FLAG_ ## name (unsigned short val)\
+{\
+ unsigned long flags;\
+ local_irq_save(flags);\
+ bfin_write16(FIO_FLAG_ ## name,val);\
+ bfin_read_CHIPID();\
+ local_irq_restore(flags);\
+}
+BFIN_WRITE_FIO_FLAG(D)
+BFIN_WRITE_FIO_FLAG(C)
+BFIN_WRITE_FIO_FLAG(S)
+BFIN_WRITE_FIO_FLAG(T)
+
+#define BFIN_READ_FIO_FLAG(name) \
+static __inline__ unsigned short bfin_read_FIO_FLAG_ ## name (void)\
+{\
+ unsigned long flags;\
+ unsigned short ret;\
+ local_irq_save(flags);\
+ ret = bfin_read16(FIO_FLAG_ ## name);\
+ bfin_read_CHIPID();\
+ local_irq_restore(flags);\
+ return ret;\
+}
+BFIN_READ_FIO_FLAG(D)
+BFIN_READ_FIO_FLAG(C)
+BFIN_READ_FIO_FLAG(S)
+BFIN_READ_FIO_FLAG(T)
+
+#else
+#define bfin_write_FIO_FLAG_D(val) bfin_write16(FIO_FLAG_D,val)
+#define bfin_write_FIO_FLAG_C(val) bfin_write16(FIO_FLAG_C,val)
+#define bfin_write_FIO_FLAG_S(val) bfin_write16(FIO_FLAG_S,val)
+#define bfin_write_FIO_FLAG_T(val) bfin_write16(FIO_FLAG_T,val)
+#define bfin_read_FIO_FLAG_T() bfin_read16(FIO_FLAG_T)
+#define bfin_read_FIO_FLAG_C() bfin_read16(FIO_FLAG_C)
+#define bfin_read_FIO_FLAG_S() bfin_read16(FIO_FLAG_S)
+#define bfin_read_FIO_FLAG_D() bfin_read16(FIO_FLAG_D)
+#endif
+
/* DMA Controller */
#define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
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