netfilter: nf_nat_snmp_basic: fix a range check in NAT for SNMP

[linux-2.6] / include / asm-avr32 / dma-mapping.h

diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h
index 115813e48fe0c11005181dee7bda548ebad73bb6..57dc672bab8ed3fb9666c15039fa07260fe80a4c 100644 (file)
--- a/include/asm-avr32/dma-mapping.h
+++ b/include/asm-avr32/dma-mapping.h
@@ -3,7 +3,7 @@
 
 #include <linux/mm.h>
 #include <linux/device.h>
-#include <asm/scatterlist.h>
+#include <linux/scatterlist.h>
 #include <asm/processor.h>
 #include <asm/cacheflush.h>
 #include <asm/io.h>
@@ -217,8 +217,8 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
        for (i = 0; i < nents; i++) {
                char *virt;
 
-               sg[i].dma_address = page_to_bus(sg[i].page) + sg[i].offset;
-               virt = page_address(sg[i].page) + sg[i].offset;
+               sg[i].dma_address = page_to_bus(sg_page(&sg[i])) + sg[i].offset;
+               virt = sg_virt(&sg[i]);
                dma_cache_sync(dev, virt, sg[i].length, direction);
        }
 
@@ -264,7 +264,11 @@ static inline void
 dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
                        size_t size, enum dma_data_direction direction)
 {
-       dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
+       /*
+        * No need to do anything since the CPU isn't supposed to
+        * touch this memory after we flushed it at mapping- or
+        * sync-for-device time.
+        */
 }
 
 static inline void
@@ -274,6 +278,24 @@ dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
        dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
 }
 
+static inline void
+dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
+                             unsigned long offset, size_t size,
+                             enum dma_data_direction direction)
+{
+       /* just sync everything, that's all the pci API can do */
+       dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction);
+}
+
+static inline void
+dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
+                                unsigned long offset, size_t size,
+                                enum dma_data_direction direction)
+{
+       /* just sync everything, that's all the pci API can do */
+       dma_sync_single_for_device(dev, dma_handle, offset+size, direction);
+}
+
 /**
  * dma_sync_sg_for_cpu
  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
@@ -291,12 +313,11 @@ static inline void
 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
                    int nents, enum dma_data_direction direction)
 {
-       int i;
-
-       for (i = 0; i < nents; i++) {
-               dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
-                              sg[i].length, direction);
-       }
+       /*
+        * No need to do anything since the CPU isn't supposed to
+        * touch this memory after we flushed it at mapping- or
+        * sync-for-device time.
+        */
 }
 
 static inline void
@@ -306,8 +327,7 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
        int i;
 
        for (i = 0; i < nents; i++) {
-               dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
-                              sg[i].length, direction);
+               dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, direction);
        }
 }